include/configs/s32v234evb.h

   1 /*
   2  * (C) Copyright 2015-2016 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  *
   6  * Configuration settings for the Freescale S32V234 EVB board.
   7  */
   8
   9 #ifndef __CONFIG_H
  10 #define __CONFIG_H
  11
  12 #ifndef CONFIG_SPL_BUILD
  13 #include <config_distro_defaults.h>
  14 #endif
  15
  16 #include <asm/arch/imx-regs.h>
  17
  18 #define CONFIG_S32V234
  19 #define CONFIG_DM
  20
  21 /* Config GIC */
  22 #define CONFIG_GICV2
  23 #define GICD_BASE 0x7D001000
  24 #define GICC_BASE 0x7D002000
  25
  26 #define CONFIG_REMAKE_ELF
  27 #undef CONFIG_RUN_FROM_IRAM_ONLY
  28
  29 #define CONFIG_RUN_FROM_DDR1
  30 #undef CONFIG_RUN_FROM_DDR0
  31
  32 /* Run by default from DDR1  */
  33 #ifdef CONFIG_RUN_FROM_DDR0
  34 #define DDR_BASE_ADDR           0x80000000
  35 #else
  36 #define DDR_BASE_ADDR           0xC0000000
  37 #endif
  38
  39 #define CONFIG_MACH_TYPE                4146
  40
  41 #define CONFIG_SKIP_LOWLEVEL_INIT
  42
  43 /* Config CACHE */
  44 #define CONFIG_CMD_CACHE
  45
  46 #define CONFIG_SYS_FULL_VA
  47
  48 /* Enable passing of ATAGs */
  49 #define CONFIG_CMDLINE_TAG
  50
  51 /* SMP Spin Table Definitions */
  52 #define CPU_RELEASE_ADDR                (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
  53
  54 /* Generic Timer Definitions */
  55 #define COUNTER_FREQUENCY               (1000000000)    /* 1000MHz */
  56 #define CONFIG_SYS_FSL_ERRATUM_A008585
  57
  58 /* Size of malloc() pool */
  59 #ifdef CONFIG_RUN_FROM_IRAM_ONLY
  60 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1 * 1024 * 1024)
  61 #else
  62 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
  63 #endif
  64 #define CONFIG_BOARD_EARLY_INIT_F
  65
  66 #define CONFIG_DM_SERIAL
  67 #define CONFIG_FSL_LINFLEXUART
  68 #define LINFLEXUART_BASE                LINFLEXD0_BASE_ADDR
  69
  70 #define CONFIG_DEBUG_UART_LINFLEXUART
  71 #define CONFIG_DEBUG_UART_BASE          LINFLEXUART_BASE
  72
  73 /* Allow to overwrite serial and ethaddr */
  74 #define CONFIG_ENV_OVERWRITE
  75 #define CONFIG_SYS_UART_PORT            (1)
  76 #define CONFIG_BAUDRATE                         115200
  77
  78 #undef CONFIG_CMD_IMLS
  79
  80 #define CONFIG_MMC
  81 #define CONFIG_FSL_ESDHC
  82 #define CONFIG_FSL_USDHC
  83 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC_BASE_ADDR
  84 #define CONFIG_SYS_FSL_ESDHC_NUM        1
  85
  86 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111
  87
  88 #define CONFIG_CMD_MMC
  89 #define CONFIG_GENERIC_MMC
  90 /* #define CONFIG_CMD_EXT2 EXT2 Support */
  91 #define CONFIG_CMD_FAT          /* FAT support */
  92 #define CONFIG_DOS_PARTITION
  93
  94 #if 0
  95
  96 /* Ethernet config */
  97 #define CONFIG_CMD_PING
  98 #define CONFIG_CMD_DHCP
  99 #define CONFIG_CMD_MII
 100 #define CONFIG_FEC_MXC
 101 #define CONFIG_MII
 102 #define IMX_FEC_BASE            ENET_BASE_ADDR
 103 #define CONFIG_FEC_XCV_TYPE     RMII
 104 #define CONFIG_FEC_MXC_PHYADDR  0
 105 #define CONFIG_PHYLIB
 106 #define CONFIG_PHY_MICREL
 107 #endif
 108
 109 #if 0                           /* Disable until the I2C driver will be updated */
 110
 111 /* I2C Configs */
 112 #define CONFIG_CMD_I2C
 113 #define CONFIG_HARD_I2C
 114 #define CONFIG_I2C_MXC
 115 #define CONFIG_SYS_I2C_BASE             I2C0_BASE_ADDR
 116 #define CONFIG_SYS_I2C_SPEED            100000
 117 #endif
 118
 119 #if 0                           /* Disable until the FLASH will be implemented */
 120 #define CONFIG_SYS_USE_NAND
 121 #endif
 122
 123 #ifdef CONFIG_SYS_USE_NAND
 124 /* Nand Flash Configs */
 125 #define CONFIG_CMD_NAND
 126 #define CONFIG_JFFS2_NAND
 127 #define MTD_NAND_FSL_NFC_SWECC 1
 128 #define CONFIG_NAND_FSL_NFC
 129 #define CONFIG_SYS_NAND_BASE            0x400E0000
 130 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 131 #define NAND_MAX_CHIPS                  CONFIG_SYS_MAX_NAND_DEVICE
 132 #define CONFIG_SYS_NAND_SELECT_DEVICE
 133 #define CONFIG_SYS_64BIT_VSPRINTF       /* needed for nand_util.c */
 134 #endif
 135
 136 #define CONFIG_CMD_DHCP
 137
 138 #define CONFIG_LOADADDR                 0xC307FFC0
 139 #define CONFIG_BOOTARGS                 "console=ttyLF0 root=/dev/ram rw"
 140
 141 #define CONFIG_CMD_ENV
 142 #define CONFIG_EXTRA_ENV_SETTINGS \
 143         "boot_scripts=boot.scr.uimg boot.scr\0" \
 144         "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
 145         "console=ttyLF0,115200\0" \
 146         "fdt_file=s32v234-evb.dtb\0" \
 147         "fdt_high=0xffffffff\0" \
 148         "initrd_high=0xffffffff\0" \
 149         "fdt_addr_r=0xC2000000\0" \
 150         "kernel_addr_r=0xC307FFC0\0" \
 151         "ramdisk_addr_r=0xC4000000\0" \
 152         "ramdisk=rootfs.uimg\0"\
 153         "ip_dyn=yes\0" \
 154         "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
 155         "update_sd_firmware_filename=u-boot.imx\0" \
 156         "update_sd_firmware=" \
 157                 "if test ${ip_dyn} = yes; then " \
 158                         "setenv get_cmd dhcp; " \
 159                 "else " \
 160                         "setenv get_cmd tftp; " \
 161                 "fi; " \
 162                 "if mmc dev ${mmcdev}; then "   \
 163                         "if ${get_cmd} ${update_sd_firmware_filename}; then " \
 164                                 "setexpr fw_sz ${filesize} / 0x200; " \
 165                                 "setexpr fw_sz ${fw_sz} + 1; "  \
 166                                 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
 167                         "fi; "  \
 168                 "fi\0" \
 169         "loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr} ${ramdisk}\0" \
 170         "jtagboot=echo Booting using jtag...; " \
 171                 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
 172         "jtagsdboot=echo Booting loading Linux with ramdisk from SD...; " \
 173                 "run loaduimage; run loadramdisk; run loadfdt;"\
 174                 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
 175         "boot_net_usb_start=true\0" \
 176         BOOTENV
 177
 178 #define BOOT_TARGET_DEVICES(func) \
 179         func(MMC, mmc, 1) \
 180         func(MMC, mmc, 0) \
 181         func(DHCP, dhcp, na)
 182
 183 #define CONFIG_BOOTCOMMAND \
 184         "run distro_bootcmd"
 185
 186 #include <config_distro_bootcmd.h>
 187
 188 /* Miscellaneous configurable options */
 189 #define CONFIG_SYS_LONGHELP     /* undef to save memory */
 190 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 191 #define CONFIG_SYS_PROMPT               "=> "
 192 #undef CONFIG_AUTO_COMPLETE
 193 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 194 #define CONFIG_SYS_PBSIZE               \
 195                         (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 196 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 197 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 198 #define CONFIG_CMDLINE_EDITING
 199
 200 #define CONFIG_CMD_MEMTEST
 201 #define CONFIG_SYS_MEMTEST_START        (DDR_BASE_ADDR)
 202 #define CONFIG_SYS_MEMTEST_END          (DDR_BASE_ADDR + 0x7C00000)
 203
 204 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 205 #define CONFIG_SYS_HZ                           1000
 206
 207 #define CONFIG_SYS_TEXT_BASE            0x3E800000      /* SDRAM */
 208
 209 #ifdef CONFIG_RUN_FROM_IRAM_ONLY
 210 #define CONFIG_SYS_MALLOC_BASE          (DDR_BASE_ADDR)
 211 #endif
 212
 213 /*
 214  * Stack sizes
 215  * The stack sizes are set up in start.S using the settings below
 216  */
 217 #define CONFIG_STACKSIZE                (128 * 1024)    /* regular stack */
 218
 219 #if 0
 220 /* Configure PXE */
 221 #define CONFIG_CMD_PXE
 222 #define CONFIG_BOOTP_PXE
 223 #define CONFIG_BOOTP_PXE_CLIENTARCH     0x100
 224 #endif
 225
 226 /* Physical memory map */
 227 /* EVB board has 2x256 MB DDR chips, DDR0 and DDR1, u-boot is using just one */
 228 #define CONFIG_NR_DRAM_BANKS            1
 229 #define PHYS_SDRAM                      (DDR_BASE_ADDR)
 230 #define PHYS_SDRAM_SIZE                 (256 * 1024 * 1024)
 231
 232 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
 233 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 234 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
 235
 236 #define CONFIG_SYS_INIT_SP_OFFSET \
 237         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 238 #define CONFIG_SYS_INIT_SP_ADDR \
 239         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 240
 241 /* FLASH and environment organization */
 242 #define CONFIG_SYS_NO_FLASH
 243
 244 #define CONFIG_ENV_SIZE                 (8 * 1024)
 245 #define CONFIG_ENV_IS_IN_MMC
 246
 247 #define CONFIG_ENV_OFFSET               (12 * 64 * 1024)
 248 #define CONFIG_SYS_MMC_ENV_DEV          0
 249
 250
 251 #define CONFIG_BOOTP_BOOTFILESIZE
 252 #define CONFIG_BOOTP_BOOTPATH
 253 #define CONFIG_BOOTP_GATEWAY
 254 #define CONFIG_BOOTP_HOSTNAME
 255
 256 #endif