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1 /*
2 * Copyright (C) 2010 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 *
5 * Configuation settings for the SAMSUNG Universal (EXYNOS4210) board.
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26 #ifndef __CONFIG_H
27 #define __CONFIG_H
28
29 /*
30 * High Level Configuration Options
31 * (easy to change)
32 */
33 #define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */
34 #define CONFIG_S5P 1 /* which is in a S5P Family */
35 #define CONFIG_EXYNOS4210 1 /* which is in a EXYNOS4210 */
36 #define CONFIG_UNIVERSAL 1 /* working with Universal */
37
38 #include <asm/arch/cpu.h> /* get chip and board defs */
39
40 #define CONFIG_ARCH_CPU_INIT
41 #define CONFIG_DISPLAY_CPUINFO
42 #define CONFIG_DISPLAY_BOARDINFO
43
44 /* Keep L2 Cache Disabled */
45 #define CONFIG_SYS_L2CACHE_OFF 1
46
47 #define CONFIG_SYS_SDRAM_BASE 0x40000000
48 #define CONFIG_SYS_TEXT_BASE 0x44800000
49
50 /* input clock of PLL: Universal has 24MHz input clock at EXYNOS4210 */
51 #define CONFIG_SYS_CLK_FREQ_C210 24000000
52 #define CONFIG_SYS_CLK_FREQ CONFIG_SYS_CLK_FREQ_C210
53
54 #define CONFIG_SETUP_MEMORY_TAGS
55 #define CONFIG_CMDLINE_TAG
56 #define CONFIG_INITRD_TAG
57 #define CONFIG_REVISION_TAG
58 #define CONFIG_CMDLINE_EDITING
59 #define CONFIG_SKIP_LOWLEVEL_INIT
60 #define CONFIG_BOARD_EARLY_INIT_F
61
62 /* Size of malloc() pool */
63 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (1 << 20))
64
65 /* select serial console configuration */
66 #define CONFIG_SERIAL2 1 /* use SERIAL 2 */
67 #define CONFIG_BAUDRATE 115200
68
69 /* MMC */
70 #define CONFIG_GENERIC_MMC
71 #define CONFIG_MMC
72 #define CONFIG_SDHCI
73 #define CONFIG_S5P_SDHCI
74
75 /* PWM */
76 #define CONFIG_PWM 1
77
78 /* It should define before config_cmd_default.h */
79 #define CONFIG_SYS_NO_FLASH 1
80
81 /* Command definition */
82 #include <config_cmd_default.h>
83
84 #undef CONFIG_CMD_FPGA
85 #undef CONFIG_CMD_MISC
86 #undef CONFIG_CMD_NET
87 #undef CONFIG_CMD_NFS
88 #undef CONFIG_CMD_XIMG
89 #define CONFIG_CMD_CACHE
90 #define CONFIG_CMD_ONENAND
91 #define CONFIG_CMD_MTDPARTS
92 #define CONFIG_CMD_MMC
93 #define CONFIG_CMD_FAT
94
95 #define CONFIG_BOOTDELAY 1
96 #define CONFIG_ZERO_BOOTDELAY_CHECK
97
98 #define CONFIG_MTD_DEVICE
99 #define CONFIG_MTD_PARTITIONS
100
101 /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */
102 #define MTDIDS_DEFAULT "onenand0=samsung-onenand"
103
104 #define MTDPARTS_DEFAULT "mtdparts=samsung-onenand:"\
105 "128k(s-boot)"\
106 ",896k(bootloader)"\
107 ",256k(params)"\
108 ",2816k(config)"\
109 ",8m(csa)"\
110 ",7m(kernel)"\
111 ",1m(log)"\
112 ",12m(modem)"\
113 ",60m(qboot)"\
114 ",-(UBI)\0"
115
116 #define NORMAL_MTDPARTS_DEFAULT MTDPARTS_DEFAULT
117
118 #define MBRPARTS_DEFAULT "20M(permanent)"\
119 ",20M(boot)"\
120 ",1G(system)"\
121 ",100M(swap)"\
122 ",-(UMS)\0"
123
124 #define CONFIG_BOOTARGS "Please use defined boot"
125 #define CONFIG_BOOTCOMMAND "run mmcboot"
126 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
127
128 #define CONFIG_ENV_UBI_MTD " ubi.mtd=${ubiblock} ubi.mtd=4 ubi.mtd=7"
129 #define CONFIG_BOOTBLOCK "10"
130 #define CONFIG_UBIBLOCK "9"
131
132 #define CONFIG_ENV_UBIFS_OPTION " rootflags=bulk_read,no_chk_data_crc "
133 #define CONFIG_ENV_FLASHBOOT CONFIG_ENV_UBI_MTD CONFIG_ENV_UBIFS_OPTION \
134 "${mtdparts}"
135
136 #define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}"
137
138 #define CONFIG_ENV_OVERWRITE
139 #define CONFIG_SYS_CONSOLE_INFO_QUIET
140 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
141
142 #define CONFIG_EXTRA_ENV_SETTINGS \
143 "updateb=" \
144 "onenand erase 0x0 0x100000;" \
145 "onenand write 0x42008000 0x0 0x100000\0" \
146 "updatek=" \
147 "onenand erase 0xc00000 0x500000;" \
148 "onenand write 0x41008000 0xc00000 0x500000\0" \
149 "bootk=" \
150 "run loaduimage; bootm 0x40007FC0\0" \
151 "updatemmc=" \
152 "mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \
153 "mmc boot 0 1 1 0\0" \
154 "updatebackup=" \
155 "mmc boot 0 1 1 2; mmc write 0 0x42100000 0 0x200;" \
156 "mmc boot 0 1 1 0\0" \
157 "updatebootb=" \
158 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
159 "lpj=lpj=3981312\0" \
160 "ubifsboot=" \
161 "set bootargs root=ubi0!rootfs rootfstype=ubifs ${lpj} " \
162 CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \
163 CONFIG_ENV_COMMON_BOOT "; run bootk\0" \
164 "tftpboot=" \
165 "set bootargs root=ubi0!rootfs rootfstype=ubifs " \
166 CONFIG_ENV_FLASHBOOT " ${opts} ${lcdinfo} " \
167 CONFIG_ENV_COMMON_BOOT \
168 "; tftp 0x40007FC0 uImage; bootm 0x40007FC0\0" \
169 "nfsboot=" \
170 "set bootargs root=/dev/nfs rw " \
171 "nfsroot=${nfsroot},nolock,tcp " \
172 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
173 "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
174 "; run bootk\0" \
175 "ramfsboot=" \
176 "set bootargs root=/dev/ram0 rw rootfstype=ext2 " \
177 "${console} ${meminfo} " \
178 "initrd=0x43000000,8M ramdisk=8192\0" \
179 "mmcboot=" \
180 "set bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
181 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
182 "run loaduimage; bootm 0x40007FC0\0" \
183 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
184 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
185 "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
186 "verify=n\0" \
187 "rootfstype=ext4\0" \
188 "console=" CONFIG_DEFAULT_CONSOLE \
189 "mtdparts=" MTDPARTS_DEFAULT \
190 "mbrparts=" MBRPARTS_DEFAULT \
191 "meminfo=crashkernel=32M@0x50000000\0" \
192 "nfsroot=/nfsroot/arm\0" \
193 "bootblock=" CONFIG_BOOTBLOCK "\0" \
194 "ubiblock=" CONFIG_UBIBLOCK" \0" \
195 "ubi=enabled\0" \
196 "loaduimage=fatload mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
197 "mmcdev=0\0" \
198 "mmcbootpart=2\0" \
199 "mmcrootpart=3\0" \
200 "opts=always_resume=1"
201
202 /* Miscellaneous configurable options */
203 #define CONFIG_SYS_LONGHELP /* undef to save memory */
204 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
205 #define CONFIG_SYS_PROMPT "Universal # "
206 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
207 #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
208 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
209 /* Boot Argument Buffer Size */
210 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
211 /* memtest works on */
212 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
213 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
214 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
215
216 #define CONFIG_SYS_HZ 1000
217
218 /* Universal has 2 banks of DRAM */
219 #define CONFIG_NR_DRAM_BANKS 2
220 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE /* LDDDR2 DMC 0 */
221 #define PHYS_SDRAM_1_SIZE (256 << 20) /* 256 MB in CS 0 */
222 #define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */
223 #define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in CS 0 */
224
225 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
226
227 #define CONFIG_SYS_MONITOR_BASE 0x00000000
228 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
229
230 #define CONFIG_USE_ONENAND_BOARD_INIT
231 #define CONFIG_SAMSUNG_ONENAND
232 #define CONFIG_SYS_ONENAND_BASE 0x0C000000
233
234 #define CONFIG_ENV_IS_IN_MMC 1
235 #define CONFIG_SYS_MMC_ENV_DEV 0
236 #define CONFIG_ENV_SIZE 4096
237 #define CONFIG_ENV_OFFSET ((32 - 4) << 10)/* 32KiB - 4KiB */
238
239 #define CONFIG_DOS_PARTITION 1
240
241 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
242
243 #define CONFIG_SYS_CACHELINE_SIZE 32
244
245 #include <asm/arch/gpio.h>
246 /*
247 * I2C Settings
248 */
249 #define CONFIG_SOFT_I2C_GPIO_SCL exynos4_gpio_part1_get_nr(b, 7)
250 #define CONFIG_SOFT_I2C_GPIO_SDA exynos4_gpio_part1_get_nr(b, 6)
251
252 #define CONFIG_SOFT_I2C
253 #define CONFIG_SOFT_I2C_READ_REPEATED_START
254 #define CONFIG_SYS_I2C_SPEED 50000
255 #define CONFIG_I2C_MULTI_BUS
256 #define CONFIG_SYS_MAX_I2C_BUS 7
257
258 #define CONFIG_PMIC
259 #define CONFIG_PMIC_I2C
260 #define CONFIG_PMIC_MAX8998
261
262 #define CONFIG_USB_GADGET
263 #define CONFIG_USB_GADGET_S3C_UDC_OTG
264 #define CONFIG_USB_GADGET_DUALSPEED
265
266 /*
267 * SPI Settings
268 */
269 #define CONFIG_SOFT_SPI
270 #define CONFIG_SOFT_SPI_MODE SPI_MODE_3
271 #define CONFIG_SOFT_SPI_GPIO_SCLK exynos4_gpio_part2_get_nr(y3, 1)
272 #define CONFIG_SOFT_SPI_GPIO_MOSI exynos4_gpio_part2_get_nr(y3, 3)
273 #define CONFIG_SOFT_SPI_GPIO_MISO exynos4_gpio_part2_get_nr(y3, 0)
274 #define CONFIG_SOFT_SPI_GPIO_CS exynos4_gpio_part2_get_nr(y4, 3)
275
276 #define SPI_DELAY udelay(1)
277 #undef SPI_INIT
278 #define SPI_SCL(bit) universal_spi_scl(bit)
279 #define SPI_SDA(bit) universal_spi_sda(bit)
280 #define SPI_READ universal_spi_read()
281 #ifndef __ASSEMBLY__
282 void universal_spi_scl(int bit);
283 void universal_spi_sda(int bit);
284 int universal_spi_read(void);
285 #endif
286
287 #endif /* __CONFIG_H */