include/configs/sama5d2_ptc.h

   1 /*
   2  * Configuration settings for the SAMA5D2 PTC Engineering board.
   3  *
   4  * Copyright (C) 2016 Atmel
   5  *                    Wenyou Yang <wenyou.yang@atmel.com>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef __CONFIG_H
  11 #define __CONFIG_H
  12
  13 #include "at91-sama5_common.h"
  14
  15 /* serial console */
  16 #define CONFIG_ATMEL_USART
  17 #define CONFIG_USART_BASE               0xf801c000
  18 #define CONFIG_USART_ID                 24
  19
  20 #define CONFIG_SYS_SDRAM_BASE           0x20000000
  21 #define CONFIG_SYS_SDRAM_SIZE           0x20000000
  22
  23 #define CONFIG_SYS_TIMER_COUNTER        0xf804803c
  24
  25 #ifdef CONFIG_SPL_BUILD
  26 #define CONFIG_SYS_INIT_SP_ADDR         0x210000
  27 #else
  28 #define CONFIG_SYS_INIT_SP_ADDR \
  29         (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE)
  30 #endif
  31
  32 #define CONFIG_SYS_LOAD_ADDR            0x22000000 /* load address */
  33
  34 #undef CONFIG_AT91_GPIO
  35 #define CONFIG_ATMEL_PIO4
  36
  37 /* SDRAM */
  38 #define CONFIG_NR_DRAM_BANKS            1
  39
  40 /* SerialFlash */
  41 #ifdef CONFIG_CMD_SF
  42 #define CONFIG_ATMEL_SPI
  43 #define CONFIG_SPI_FLASH_ATMEL
  44 #define CONFIG_SF_DEFAULT_BUS           0
  45 #define CONFIG_SF_DEFAULT_CS            0
  46 #define CONFIG_SF_DEFAULT_SPEED         30000000
  47 #endif
  48
  49 /* NAND flash */
  50 #ifdef CONFIG_CMD_NAND
  51 #define CONFIG_NAND_ATMEL
  52 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  53 #define CONFIG_SYS_NAND_BASE            0x80000000
  54 /* our ALE is AD21 */
  55 #define CONFIG_SYS_NAND_MASK_ALE        (1 << 21)
  56 /* our CLE is AD22 */
  57 #define CONFIG_SYS_NAND_MASK_CLE        (1 << 22)
  58 #define CONFIG_SYS_NAND_ONFI_DETECTION
  59 /* PMECC & PMERRLOC */
  60 #define CONFIG_ATMEL_NAND_HWECC
  61 #define CONFIG_ATMEL_NAND_HW_PMECC
  62 #endif
  63
  64 /* USB device */
  65
  66 /* Ethernet Hardware */
  67 #define CONFIG_MACB
  68 #define CONFIG_RMII
  69 #define CONFIG_NET_RETRY_COUNT          20
  70 #define CONFIG_MACB_SEARCH_PHY
  71
  72 #ifdef CONFIG_NAND_BOOT
  73 #undef CONFIG_ENV_OFFSET
  74 #undef CONFIG_ENV_OFFSET_REDUND
  75 #undef CONFIG_BOOTCOMMAND
  76 /* u-boot env in nand flash */
  77 #define CONFIG_ENV_OFFSET               0x200000
  78 #define CONFIG_ENV_OFFSET_REDUND        0x400000
  79 #define CONFIG_BOOTCOMMAND              "nand read 0x21000000 0xb80000 0x80000;"        \
  80                                         "nand read 0x22000000 0x600000 0x600000;"       \
  81                                         "bootz 0x22000000 - 0x21000000"
  82 #endif
  83
  84 /* SPL */
  85 #define CONFIG_SPL_FRAMEWORK
  86 #define CONFIG_SPL_TEXT_BASE            0x200000
  87 #define CONFIG_SPL_MAX_SIZE             0x10000
  88 #define CONFIG_SPL_BSS_START_ADDR       0x20000000
  89 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
  90 #define CONFIG_SYS_SPL_MALLOC_START     0x20080000
  91 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
  92
  93 #define CONFIG_SYS_MONITOR_LEN          (512 << 10)
  94
  95 #ifdef CONFIG_SPI_BOOT
  96 #define CONFIG_SPL_SPI_LOAD
  97 #define CONFIG_SYS_SPI_U_BOOT_OFFS      0x8000
  98
  99 #elif CONFIG_NAND_BOOT
 100 #define CONFIG_SPL_NAND_DRIVERS
 101 #define CONFIG_SPL_NAND_BASE
 102 #endif
 103 #define CONFIG_PMECC_CAP                8
 104 #define CONFIG_PMECC_SECTOR_SIZE        512
 105 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x40000
 106 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 107 #define CONFIG_SYS_NAND_PAGE_SIZE       0x1000
 108 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 109 #define CONFIG_SYS_NAND_OOBSIZE         224
 110 #define CONFIG_SYS_NAND_BLOCK_SIZE      0x40000
 111 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0x0
 112 #define CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER
 113
 114 #endif