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1 /*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 * SPDX-License-Identifier: GPL-2.0+
4 */
5
6 #ifndef __CONFIG_H
7 #define __CONFIG_H
8
9 #ifdef FTRACE
10 #define CONFIG_TRACE
11 #define CONFIG_CMD_TRACE
12 #define CONFIG_TRACE_BUFFER_SIZE (16 << 20)
13 #define CONFIG_TRACE_EARLY_SIZE (8 << 20)
14 #define CONFIG_TRACE_EARLY
15 #define CONFIG_TRACE_EARLY_ADDR 0x00100000
16
17 #endif
18
19 #ifndef CONFIG_SPL_BUILD
20 #define CONFIG_IO_TRACE
21 #define CONFIG_CMD_IOTRACE
22 #endif
23
24 #ifndef CONFIG_TIMER
25 #define CONFIG_SYS_TIMER_RATE 1000000
26 #endif
27
28 #define CONFIG_LMB
29 #define CONFIG_ANDROID_BOOT_IMAGE
30
31 #define CONFIG_CMD_PCI
32 #define CONFIG_CMD_IO
33
34 #define CONFIG_FS_FAT
35 #define CONFIG_FAT_WRITE
36 #define CONFIG_FS_EXT4
37 #define CONFIG_EXT4_WRITE
38 #define CONFIG_HOST_MAX_DEVICES 4
39
40 /*
41 * Size of malloc() pool, before and after relocation
42 */
43 #define CONFIG_MALLOC_F_ADDR 0x0010000
44 #define CONFIG_SYS_MALLOC_LEN (32 << 20) /* 32MB */
45
46 #define CONFIG_SYS_LONGHELP /* #undef to save memory */
47 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
48
49 /* Print Buffer Size */
50 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
51 #define CONFIG_SYS_MAXARGS 16
52
53 /* turn on command-line edit/c/auto */
54 #define CONFIG_CMDLINE_EDITING
55 #define CONFIG_AUTO_COMPLETE
56
57 #define CONFIG_ENV_SIZE 8192
58 #define CONFIG_ENV_IS_NOWHERE
59
60 /* SPI - enable all SPI flash types for testing purposes */
61 #define CONFIG_CMD_SF_TEST
62
63 #define CONFIG_I2C_EDID
64
65 /* Memory things - we don't really want a memory test */
66 #define CONFIG_SYS_LOAD_ADDR 0x00000000
67 #define CONFIG_SYS_MEMTEST_START 0x00100000
68 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1000)
69 #define CONFIG_SYS_FDT_LOAD_ADDR 0x100
70
71 #define CONFIG_PHYSMEM
72
73 /* Size of our emulated memory */
74 #define CONFIG_SYS_SDRAM_BASE 0
75 #define CONFIG_SYS_SDRAM_SIZE (128 << 20)
76 #define CONFIG_SYS_TEXT_BASE 0
77 #define CONFIG_SYS_MONITOR_BASE 0
78 #define CONFIG_NR_DRAM_BANKS 1
79
80 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
81 115200}
82
83 /* include default commands */
84 #include <config_distro_defaults.h>
85
86 #define BOOT_TARGET_DEVICES(func) \
87 func(HOST, host, 1) \
88 func(HOST, host, 0)
89
90 #define CONFIG_BOOTCOMMAND ""
91
92 #include <config_distro_bootcmd.h>
93
94 #define CONFIG_KEEP_SERVERADDR
95 #define CONFIG_UDP_CHECKSUM
96 #define CONFIG_TIMESTAMP
97 #define CONFIG_BOOTP_DNS
98 #define CONFIG_BOOTP_DNS2
99 #define CONFIG_BOOTP_SEND_HOSTNAME
100 #define CONFIG_BOOTP_SERVERIP
101 #define CONFIG_IP_DEFRAG
102
103 /* Can't boot elf images */
104
105 #define CONFIG_CMD_HASH
106 #define CONFIG_HASH_VERIFY
107 #define CONFIG_SHA1
108 #define CONFIG_SHA256
109
110 #define CONFIG_CMD_SANDBOX
111
112 #define CONFIG_CMD_ENV_FLAGS
113 #define CONFIG_CMD_ENV_CALLBACK
114
115 #define CONFIG_BOOTARGS ""
116
117 #ifndef SANDBOX_NO_SDL
118 #define CONFIG_SANDBOX_SDL
119 #endif
120
121 /* LCD and keyboard require SDL support */
122 #ifdef CONFIG_SANDBOX_SDL
123 #define LCD_BPP LCD_COLOR16
124 #define CONFIG_LCD_BMP_RLE8
125 #define CONFIG_VIDEO_BMP_RLE8
126 #define CONFIG_SPLASH_SCREEN_ALIGN
127
128 #define CONFIG_KEYBOARD
129
130 #define SANDBOX_SERIAL_SETTINGS "stdin=serial,cros-ec-keyb,usbkbd\0" \
131 "stdout=serial,vidconsole\0" \
132 "stderr=serial,vidconsole\0"
133 #else
134 #define SANDBOX_SERIAL_SETTINGS "stdin=serial\0" \
135 "stdout=serial,vidconsole\0" \
136 "stderr=serial,vidconsole\0"
137 #endif
138
139 #define SANDBOX_ETH_SETTINGS "ethaddr=00:00:11:22:33:44\0" \
140 "eth1addr=00:00:11:22:33:45\0" \
141 "eth3addr=00:00:11:22:33:46\0" \
142 "eth5addr=00:00:11:22:33:47\0" \
143 "ipaddr=1.2.3.4\0"
144
145 #define MEM_LAYOUT_ENV_SETTINGS \
146 "bootm_size=0x10000000\0" \
147 "kernel_addr_r=0x1000000\0" \
148 "fdt_addr_r=0xc00000\0" \
149 "ramdisk_addr_r=0x2000000\0" \
150 "scriptaddr=0x1000\0" \
151 "pxefile_addr_r=0x2000\0"
152
153 #define CONFIG_EXTRA_ENV_SETTINGS \
154 SANDBOX_SERIAL_SETTINGS \
155 SANDBOX_ETH_SETTINGS \
156 BOOTENV \
157 MEM_LAYOUT_ENV_SETTINGS
158
159 #define CONFIG_GZIP_COMPRESSED
160 #define CONFIG_BZIP2
161 #define CONFIG_LZO
162 #define CONFIG_LZMA
163
164 #define CONFIG_CMD_LZMADEC
165 #define CONFIG_CMD_DATE
166
167 #ifndef CONFIG_SPL_BUILD
168 #define CONFIG_CMD_IDE
169 #define CONFIG_SYS_IDE_MAXBUS 1
170 #define CONFIG_SYS_ATA_IDE0_OFFSET 0
171 #define CONFIG_SYS_IDE_MAXDEVICE 2
172 #define CONFIG_SYS_ATA_BASE_ADDR 0x100
173 #define CONFIG_SYS_ATA_DATA_OFFSET 0
174 #define CONFIG_SYS_ATA_REG_OFFSET 1
175 #define CONFIG_SYS_ATA_ALT_OFFSET 2
176 #define CONFIG_SYS_ATA_STRIDE 4
177 #endif
178
179 #define CONFIG_SCSI
180 #define CONFIG_SCSI_AHCI_PLAT
181 #define CONFIG_SYS_SCSI_MAX_DEVICE 2
182 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 8
183 #define CONFIG_SYS_SCSI_MAX_LUN 4
184
185 #define CONFIG_CMD_SATA
186 #define CONFIG_SYS_SATA_MAX_DEVICE 2
187
188 #define CONFIG_SYSTEMACE
189 #define CONFIG_SYS_SYSTEMACE_WIDTH 16
190 #define CONFIG_SYS_SYSTEMACE_BASE 0
191
192 #define CONFIG_MISC_INIT_F
193
194 #endif