include/configs/sc520_cdp.h

   1 /*
   2  * (C) Copyright 2002
   3  * Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /*
  25  * board/config.h - configuration options, board specific
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 #define CONFIG_SKIP_RELOCATE_UBOOT
  32
  33 /*
  34  * High Level Configuration Options
  35  * (easy to change)
  36  */
  37
  38 #define CONFIG_X86              1       /* This is a X86 CPU            */
  39 #define CONFIG_SYS_SC520        1       /* Include support for AMD SC520 */
  40 #define CONFIG_ALI152X          1       /* Include support for Ali 152x SIO */
  41
  42 #define CONFIG_SYS_SDRAM_PRECHARGE_DELAY 6     /* 6T */
  43 #define CONFIG_SYS_SDRAM_REFRESH_RATE    78    /* 7.8uS (choices are 7.8, 15.6, 31.2 or 62.5uS) */
  44 #define CONFIG_SYS_SDRAM_RAS_CAS_DELAY   3     /* 3T */
  45
  46 /* define at most one of these */
  47 #undef CONFIG_SYS_SDRAM_CAS_LATENCY_2T
  48 #define CONFIG_SYS_SDRAM_CAS_LATENCY_3T
  49
  50 #define CONFIG_SYS_SC520_HIGH_SPEED    0       /* 100 or 133MHz */
  51 #undef  CONFIG_SYS_SC520_RESET                 /* use SC520 MMCR's to reset cpu */
  52 #undef  CONFIG_SYS_SC520_TIMER                 /* use SC520 swtimers */
  53 #define CONFIG_SYS_GENERIC_TIMER       1       /* use the i8254 PIT timers */
  54 #undef  CONFIG_SYS_TSC_TIMER                   /* use the Pentium TSC timers */
  55 #define  CONFIG_SYS_USE_SIO_UART       0       /* prefer the uarts on the SIO to those
  56                                          * in the SC520 on the CDP */
  57 #define CONFIG_SYS_PCAT_INTERRUPTS
  58 #define CONFIG_SYS_NUM_IRQS             16
  59
  60 #define CONFIG_SYS_STACK_SIZE          0x8000  /* Size of bootloader stack */
  61
  62 #define CONFIG_SHOW_BOOT_PROGRESS 1
  63 #define CONFIG_LAST_STAGE_INIT    1
  64
  65 /*
  66  * Size of malloc() pool
  67  */
  68 #define CONFIG_MALLOC_SIZE      (CONFIG_ENV_SIZE + 128*1024)
  69
  70 #define CONFIG_BAUDRATE         9600
  71
  72 /*
  73  * BOOTP options
  74  */
  75 #define CONFIG_BOOTP_BOOTFILESIZE
  76 #define CONFIG_BOOTP_BOOTPATH
  77 #define CONFIG_BOOTP_GATEWAY
  78 #define CONFIG_BOOTP_HOSTNAME
  79
  80
  81 /*
  82  * Command line configuration.
  83  */
  84 #include <config_cmd_default.h>
  85
  86 #define CONFIG_CMD_PCI
  87 #define CONFIG_CMD_SATA
  88 #define CONFIG_CMD_JFFS2
  89 #define CONFIG_CMD_NET
  90 #define CONFIG_CMD_EEPROM
  91
  92 #define CONFIG_BOOTDELAY        15
  93 #define CONFIG_BOOTARGS         "root=/dev/mtdblock0 console=ttyS0,9600"
  94 /* #define CONFIG_BOOTCOMMAND   "bootm 38000000" */
  95
  96 #if defined(CONFIG_CMD_KGDB)
  97 #define CONFIG_KGDB_BAUDRATE    115200          /* speed to run kgdb serial port */
  98 #define CONFIG_KGDB_SER_INDEX   2               /* which serial port to use */
  99 #endif
 100
 101 /*
 102  * Miscellaneous configurable options
 103  */
 104 #define CONFIG_SYS_LONGHELP                             /* undef to save memory         */
 105 #define CONFIG_SYS_PROMPT               "boot > "       /* Monitor Command Prompt       */
 106 #define CONFIG_SYS_CBSIZE               256             /* Console I/O Buffer Size      */
 107 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 108 #define CONFIG_SYS_MAXARGS              16              /* max number of command args   */
 109 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size    */
 110
 111 #define CONFIG_SYS_MEMTEST_START        0x00100000      /* memtest works on     */
 112 #define CONFIG_SYS_MEMTEST_END          0x01000000      /* 1 ... 16 MB in DRAM  */
 113
 114 #define CONFIG_SYS_LOAD_ADDR            0x100000        /* default load address */
 115
 116 #define CONFIG_SYS_HZ                   1024            /* incrementer freq: 1kHz */
 117
 118                                                 /* valid baudrates */
 119 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
 120
 121 /*-----------------------------------------------------------------------
 122  * Physical Memory Map
 123  */
 124 #define CONFIG_NR_DRAM_BANKS    4          /* we have 4 banks of DRAM */
 125
 126 /*-----------------------------------------------------------------------
 127  * FLASH and environment organization
 128  */
 129 #define CONFIG_SYS_MAX_FLASH_BANKS      3       /* max number of memory banks           */
 130 #define CONFIG_SYS_MAX_FLASH_SECT       64      /* max number of sectors on one chip    */
 131
 132 /* timeout values are in ticks */
 133 #define CONFIG_SYS_FLASH_ERASE_TOUT     (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
 134 #define CONFIG_SYS_FLASH_WRITE_TOUT     (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
 135
 136 #define CONFIG_SPI_EEPROM      /* Support for SPI EEPROMs (AT25128) */
 137 #define CONFIG_MW_EEPROM       /* Support for MicroWire EEPROMs (AT93LC46) */
 138
 139 /* allow to overwrite serial and ethaddr */
 140 #define CONFIG_ENV_OVERWRITE
 141
 142 /* Environment in EEPROM */
 143 #define CONFIG_ENV_IS_IN_EEPROM   1
 144 #define CONFIG_SPI
 145 #define CONFIG_ENV_SIZE        0x4000   /* Total Size of Environment EEPROM 16k is SPI is used or 128 bytes if MW is used*/
 146 #define CONFIG_ENV_OFFSET         0
 147 #define CONFIG_SYS_SC520_CDP_USE_SPI  /* Store configuration in the SPI part */
 148 #undef CONFIG_SYS_SC520_CDP_USE_MW    /* Store configuration in the MicroWire part */
 149 #define CONFIG_SPI_X 1
 150
 151 /*
 152  * JFFS2 partitions
 153  */
 154 /* No command line, one static partition, whole device */
 155 #undef CONFIG_CMD_MTDPARTS
 156 #define CONFIG_JFFS2_DEV                "nor0"
 157 #define CONFIG_JFFS2_PART_SIZE          0xFFFFFFFF
 158 #define CONFIG_JFFS2_PART_OFFSET        0x00000000
 159
 160 /* mtdparts command line support */
 161 /*
 162 #define CONFIG_CMD_MTDPARTS
 163 #define MTDIDS_DEFAULT          "nor0=SC520CDP Flash Bank #0"
 164 #define MTDPARTS_DEFAULT        "mtdparts=SC520CDP Flash Bank #0:-(jffs2)"
 165 */
 166
 167 /*-----------------------------------------------------------------------
 168  * Device drivers
 169  */
 170 #define CONFIG_NET_MULTI        /* Multi ethernet cards support */
 171 #define CONFIG_PCNET
 172 #define CONFIG_PCNET_79C973
 173 #define CONFIG_PCNET_79C975
 174 #define PCNET_HAS_PROM         1
 175
 176 /************************************************************
 177 *SATA/Native Stuff
 178 ************************************************************/
 179 #define CONFIG_SYS_SATA_MAXBUS         2       /*Max Sata buses supported */
 180 #define CONFIG_SYS_SATA_DEVS_PER_BUS   2      /*Max no. of devices per bus/port */
 181 #define CONFIG_SYS_SATA_MAX_DEVICE     (CONFIG_SYS_SATA_MAXBUS* CONFIG_SYS_SATA_DEVS_PER_BUS)
 182 #define CONFIG_ATA_PIIX         1       /*Supports ata_piix driver */
 183
 184
 185 /************************************************************
 186  * DISK Partition support
 187  ************************************************************/
 188 #define CONFIG_DOS_PARTITION
 189 #define CONFIG_MAC_PARTITION
 190 #define CONFIG_ISO_PARTITION /* Experimental */
 191
 192 /************************************************************
 193  * Video/Keyboard support
 194  ************************************************************/
 195 #define CONFIG_VIDEO                    /* To enable video controller support */
 196 #define PCI_VIDEO_VENDOR_ID 0           /*Use the appropriate vendor ID*/
 197 #define PCI_VIDEO_DEVICE_ID 0           /*Use the appropriate Device ID*/
 198 #define CONFIG_I8042_KBD
 199 #define CONFIG_SYS_ISA_IO 0
 200
 201 /************************************************************
 202  * RTC
 203  ***********************************************************/
 204 #define CONFIG_RTC_MC146818
 205 #undef CONFIG_WATCHDOG                  /* watchdog disabled            */
 206
 207 /*
 208  * PCI stuff
 209  */
 210 #define CONFIG_PCI                                /* include pci support */
 211 #define CONFIG_PCI_PNP                            /* pci plug-and-play */
 212 #define CONFIG_PCI_SCAN_SHOW
 213
 214 #define CONFIG_SYS_FIRST_PCI_IRQ   10
 215 #define CONFIG_SYS_SECOND_PCI_IRQ  9
 216 #define CONFIG_SYS_THIRD_PCI_IRQ   11
 217 #define CONFIG_SYS_FORTH_PCI_IRQ   15
 218
 219
 220 #endif  /* __CONFIG_H */