include/configs/sc_sps_1.h

   1 /*
   2  * SchulerControl GmbH, SC_SPS_1 module config
   3  *
   4  * Copyright (C) 2012 Marek Vasut <marex@denx.de>
   5  * on behalf of DENX Software Engineering GmbH
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22 #ifndef __SC_SPS_1_H__
  23 #define __SC_SPS_1_H__
  24
  25 /*
  26  * SoC configurations
  27  */
  28 #define CONFIG_MX28                             /* i.MX28 SoC */
  29 #define CONFIG_MXS_GPIO                         /* GPIO control */
  30 #define CONFIG_SYS_HZ           1000            /* Ticks per second */
  31
  32 /*
  33  * Define SC_SPS_1 machine type by hand until it lands in mach-types
  34  */
  35 #define MACH_TYPE_SC_SPS_1      4172
  36
  37 #define CONFIG_MACH_TYPE        MACH_TYPE_SC_SPS_1
  38
  39 #include <asm/arch/regs-base.h>
  40
  41 #define CONFIG_SYS_NO_FLASH
  42 #define CONFIG_SYS_ICACHE_OFF
  43 #define CONFIG_SYS_DCACHE_OFF
  44 #define CONFIG_BOARD_EARLY_INIT_F
  45 #define CONFIG_ARCH_CPU_INIT
  46 #define CONFIG_ARCH_MISC_INIT
  47
  48 #define CONFIG_ENV_IS_IN_MMC
  49
  50 #define CONFIG_OF_LIBFDT
  51
  52 /*
  53  * SPL
  54  */
  55 #define CONFIG_SPL
  56 #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
  57 #define CONFIG_SPL_START_S_PATH         "arch/arm/cpu/arm926ejs/mxs"
  58 #define CONFIG_SPL_LDSCRIPT     "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
  59 #define CONFIG_SPL_LIBCOMMON_SUPPORT
  60 #define CONFIG_SPL_LIBGENERIC_SUPPORT
  61 #define CONFIG_SPL_GPIO_SUPPORT
  62
  63 /*
  64  * U-Boot Commands
  65  */
  66 #include <config_cmd_default.h>
  67 #define CONFIG_DISPLAY_CPUINFO
  68 #define CONFIG_DOS_PARTITION
  69
  70 #define CONFIG_CMD_CACHE
  71 #define CONFIG_CMD_DHCP
  72 #define CONFIG_CMD_EXT2
  73 #define CONFIG_CMD_FAT
  74 #define CONFIG_CMD_GPIO
  75 #define CONFIG_CMD_MII
  76 #define CONFIG_CMD_MMC
  77 #define CONFIG_CMD_NET
  78 #define CONFIG_CMD_NFS
  79 #define CONFIG_CMD_PING
  80 #define CONFIG_CMD_SETEXPR
  81 #define CONFIG_CMD_USB
  82
  83 /*
  84  * Memory configurations
  85  */
  86 #define CONFIG_NR_DRAM_BANKS            1               /* 1 bank of DRAM */
  87 #define PHYS_SDRAM_1                    0x40000000      /* Base address */
  88 #define PHYS_SDRAM_1_SIZE               0x40000000      /* Max 1 GB RAM */
  89 #define CONFIG_STACKSIZE                0x00010000      /* 128 KB stack */
  90 #define CONFIG_SYS_MALLOC_LEN           0x00400000      /* 4 MB for malloc */
  91 #define CONFIG_SYS_GBL_DATA_SIZE        128             /* Initial data */
  92 #define CONFIG_SYS_MEMTEST_START        0x40000000      /* Memtest start adr */
  93 #define CONFIG_SYS_MEMTEST_END          0x40400000      /* 4 MB RAM test */
  94 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
  95
  96 /* Point initial SP in SRAM so SPL can use it too. */
  97 #define CONFIG_SYS_INIT_RAM_ADDR        0x00000000
  98 #define CONFIG_SYS_INIT_RAM_SIZE        (128 * 1024)
  99
 100 #define CONFIG_SYS_INIT_SP_OFFSET \
 101         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 102 #define CONFIG_SYS_INIT_SP_ADDR \
 103         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 104 /*
 105  * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
 106  * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
 107  * binary. In case there was more of this mess, 0x100 bytes are skipped.
 108  */
 109 #define CONFIG_SYS_TEXT_BASE            0x40000100
 110
 111 /*
 112  * U-Boot general configurations
 113  */
 114 #define CONFIG_SYS_LONGHELP
 115 #define CONFIG_SYS_PROMPT       "=> "
 116 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O buffer size */
 117 #define CONFIG_SYS_PBSIZE       \
 118         (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 119                                                 /* Print buffer size */
 120 #define CONFIG_SYS_MAXARGS      32              /* Max number of command args */
 121 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE
 122                                                 /* Boot argument buffer size */
 123 #define CONFIG_VERSION_VARIABLE                 /* U-BOOT version */
 124 #define CONFIG_AUTO_COMPLETE                    /* Command auto complete */
 125 #define CONFIG_CMDLINE_EDITING                  /* Command history etc */
 126 #define CONFIG_SYS_HUSH_PARSER
 127 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 128
 129 /*
 130  * Serial Driver
 131  */
 132 #define CONFIG_PL011_SERIAL
 133 #define CONFIG_PL011_CLOCK              24000000
 134 #define CONFIG_PL01x_PORTS              { (void *)MXS_UARTDBG_BASE }
 135 #define CONFIG_CONS_INDEX               0
 136 #define CONFIG_BAUDRATE                 115200  /* Default baud rate */
 137 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
 138
 139 /*
 140  * MMC Driver
 141  */
 142 #ifdef CONFIG_CMD_MMC
 143 #define CONFIG_APBH_DMA
 144 #define CONFIG_MMC
 145 #define CONFIG_MMC_BOUNCE_BUFFER
 146 #define CONFIG_GENERIC_MMC
 147 #define CONFIG_MXS_MMC
 148 #endif
 149 #define CONFIG_ENV_SIZE                 (16 * 1024)
 150 #ifdef CONFIG_ENV_IS_IN_MMC
 151 #define CONFIG_ENV_OFFSET               (256 * 1024)
 152 #define CONFIG_SYS_MMC_ENV_DEV          0
 153 #else
 154 #define CONFIG_ENV_IS_NOWHERE
 155 #endif
 156
 157 /*
 158  * Ethernet on SOC (FEC)
 159  */
 160 #ifdef CONFIG_CMD_NET
 161 #define CONFIG_ETHPRIME                 "FEC0"
 162 #define CONFIG_FEC_MXC
 163 #define CONFIG_FEC_MXC_MULTI
 164 #define CONFIG_MII
 165 #define CONFIG_DISCOVER_PHY
 166 #define CONFIG_FEC_XCV_TYPE             RMII
 167 #define CONFIG_PHYLIB
 168 #define CONFIG_PHY_SMSC
 169 #endif
 170
 171 /*
 172  * USB
 173  */
 174 #ifdef CONFIG_CMD_USB
 175 #define CONFIG_USB_EHCI
 176 #define CONFIG_USB_EHCI_MXS
 177 #define CONFIG_EHCI_MXS_PORT            0
 178 #define CONFIG_EHCI_IS_TDI
 179 #define CONFIG_USB_STORAGE
 180 #endif
 181
 182 /*
 183  * Boot Linux
 184  */
 185 #define CONFIG_CMDLINE_TAG
 186 #define CONFIG_SETUP_MEMORY_TAGS
 187 #define CONFIG_BOOTDELAY        3
 188 #define CONFIG_BOOTFILE         "uImage"
 189 #define CONFIG_BOOTARGS         "console=ttyAMA0,115200"
 190 #define CONFIG_BOOTCOMMAND      "bootm "
 191 #define CONFIG_LOADADDR         0x42000000
 192 #define CONFIG_SYS_LOAD_ADDR    CONFIG_LOADADDR
 193
 194 /*
 195  * Extra Environments
 196  */
 197 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 198         "update_sd_firmware_filename=u-boot.sd\0"                       \
 199         "update_sd_firmware="           /* Update the SD firmware partition */ \
 200                 "if mmc rescan ; then "                                 \
 201                 "if tftp ${update_sd_firmware_filename} ; then "        \
 202                 "setexpr fw_sz ${filesize} / 0x200 ; "  /* SD block size */ \
 203                 "setexpr fw_sz ${fw_sz} + 1 ; "                         \
 204                 "mmc write ${loadaddr} 0x800 ${fw_sz} ; "               \
 205                 "fi ; "                                                 \
 206                 "fi\0"
 207
 208 #endif /* __SC_SPS_1_H__ */