include/configs/shmin.h

   1 /*
   2  * Configuation settings for shmin (T-SH7706LAN, T-SH7706LSR)
   3  *
   4  * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #ifndef __SHMIN_H
  10 #define __SHMIN_H
  11
  12 #define CONFIG_CPU_SH7706       1
  13 /* T-SH7706LAN */
  14 #define CONFIG_SHMIN            1
  15 /* T-SH7706LSR*/
  16 /* #define CONFIG_T_SH7706LSR   1 */
  17
  18 /*
  19  * This board has original boot loader. If you write u-boot to 0x0,
  20  * you should set undef.
  21  */
  22 #undef  CONFIG_SHOW_BOOT_PROGRESS
  23 #define CONFIG_DISPLAY_BOARDINFO
  24
  25 /* system */
  26 #define SHMIN_SDRAM_BASE                (0x8C000000)
  27 #define SHMIN_FLASH_BASE_1              (0xA0000000)
  28
  29 #define CONFIG_SYS_PBSIZE       256     /* Buffer size for Console output */
  30 /* List of legal baudrate settings for this board */
  31 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600,14400,19200,38400,57600,115200 }
  32
  33 /* SCIF */
  34 #define CONFIG_CONS_SCIF0       1
  35
  36 /* memory */
  37 #define CONFIG_SYS_SDRAM_BASE           SHMIN_SDRAM_BASE
  38 #define CONFIG_SYS_SDRAM_SIZE           (32 * 1024 * 1024)
  39 #define CONFIG_SYS_MEMTEST_START        SHMIN_SDRAM_BASE
  40 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE - (256 * 1024))
  41
  42 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 1 * 1024 * 1024)
  43 #define CONFIG_SYS_MONITOR_BASE         (SHMIN_FLASH_BASE_1 + CONFIG_ENV_SECT_SIZE)
  44 #define CONFIG_SYS_MONITOR_LEN          (128 * 1024)
  45 #define CONFIG_SYS_MALLOC_LEN           (256 * 1024)
  46 #define CONFIG_SYS_BOOTMAPSZ            (8 * 1024 * 1024)
  47
  48 /* FLASH */
  49 #define CONFIG_SYS_FLASH_CFI
  50 #define CONFIG_FLASH_CFI_DRIVER
  51 #undef  CONFIG_SYS_FLASH_QUIET_TEST
  52 #define CONFIG_SYS_FLASH_EMPTY_INFO     /* print 'E' for empty sector on flinfo */
  53 #define CONFIG_SYS_FLASH_BASE           SHMIN_FLASH_BASE_1
  54 #define CONFIG_SYS_MAX_FLASH_SECT 11
  55 #define CONFIG_SYS_MAX_FLASH_BANKS      1
  56
  57 #define CONFIG_FLASH_CFI_LEGACY
  58 #define CONFIG_SYS_ATMEL_BASE           CONFIG_SYS_FLASH_BASE
  59 #define CONFIG_SYS_ATMEL_TOTALSECT      CONFIG_SYS_MAX_FLASH_SECT
  60 #define CONFIG_SYS_ATMEL_REGION         4
  61 #define CONFIG_SYS_ATMEL_SECT           {1, 2, 1, 7}
  62 #define CONFIG_SYS_ATMEL_SECTSZ         {0x4000, 0x2000, 0x8000, 0x10000}
  63
  64 #define CONFIG_ENV_SECT_SIZE    (64 * 1024)
  65 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
  66
  67 #ifdef CONFIG_T_SH7706LSR
  68 #define CONFIG_ENV_ADDR         (SHMIN_FLASH_BASE_1 + 70000)
  69 #else
  70 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
  71 #endif
  72
  73 #define CONFIG_SYS_FLASH_ERASE_TOUT     120000
  74 #define CONFIG_SYS_FLASH_WRITE_TOUT     500
  75
  76 /* Board Clock */
  77 #ifdef CONFIG_T_SH7706LSR
  78 #define CONFIG_SYS_CLK_FREQ 40000000
  79 #else
  80 #define CONFIG_SYS_CLK_FREQ 33333333
  81 #endif /* CONFIG_T_SH7706LSR */
  82 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
  83 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
  84 #define CONFIG_SYS_TMU_CLK_DIV  4
  85
  86 /* Network device */
  87 #define CONFIG_DRIVER_NE2000
  88 #define CONFIG_DRIVER_NE2000_BASE   (0xb0000300)
  89
  90 #endif  /* __SHMIN_H */