include/configs/smartweb.h

   1 /*
   2  * (C) Copyright 2007-2008
   3  * Stelian Pop <stelian@popies.net>
   4  * Lead Tech Design <www.leadtechdesign.com>
   5  *
   6  * (C) Copyright 2010
   7  * Achim Ehrlich <aehrlich@taskit.de>
   8  * taskit GmbH <www.taskit.de>
   9  *
  10  * (C) Copyright 2012
  11  * Markus Hubig <mhubig@imko.de>
  12  * IMKO GmbH <www.imko.de>
  13  *
  14  * (C) Copyright 2014
  15  * Heiko Schocher <hs@denx.de>
  16  * DENX Software Engineering GmbH
  17  *
  18  * Configuation settings for the smartweb.
  19  *
  20  * SPDX-License-Identifier:     GPL-2.0+
  21  */
  22
  23 #ifndef __CONFIG_H
  24 #define __CONFIG_H
  25
  26 /*
  27  * SoC must be defined first, before hardware.h is included.
  28  * In this case SoC is defined in boards.cfg.
  29  */
  30 #include <asm/hardware.h>
  31 #include <linux/sizes.h>
  32
  33 /*
  34  * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot
  35  * program. Since the linker has to swallow that define, we must use a pure
  36  * hex number here!
  37  */
  38
  39 /* ARM asynchronous clock */
  40 #define CONFIG_SYS_AT91_SLOW_CLOCK      32768           /* slow clock xtal */
  41 #define CONFIG_SYS_AT91_MAIN_CLOCK      18432000        /* 18.432MHz crystal */
  42
  43 /* misc settings */
  44 #define CONFIG_CMDLINE_TAG              /* pass commandline to Kernel */
  45 #define CONFIG_SETUP_MEMORY_TAGS        /* pass memory defs to kernel */
  46 #define CONFIG_INITRD_TAG               /* pass initrd param to kernel */
  47 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY  /* U-Boot is loaded by a bootloader */
  48
  49 /* We set the max number of command args high to avoid HUSH bugs. */
  50 #define CONFIG_SYS_MAXARGS    32
  51
  52 /* setting board specific options */
  53 #define CONFIG_MACH_TYPE                MACH_TYPE_SMARTWEB
  54 #define CONFIG_ENV_OVERWRITE    1 /* Overwrite ethaddr / serial# */
  55 #define CONFIG_SYS_AUTOLOAD "yes"
  56 #define CONFIG_RESET_TO_RETRY
  57
  58 /* The LED PINs */
  59 #define CONFIG_RED_LED                  AT91_PIN_PA9
  60 #define CONFIG_GREEN_LED                AT91_PIN_PA6
  61
  62 /*
  63  * SDRAM: 1 bank, 64 MB, base address 0x20000000
  64  * Already initialized before u-boot gets started.
  65  */
  66 #define CONFIG_NR_DRAM_BANKS            1
  67 #define CONFIG_SYS_SDRAM_BASE           ATMEL_BASE_CS1
  68 #define CONFIG_SYS_SDRAM_SIZE           (64 * SZ_1M)
  69
  70 /*
  71  * Perform a SDRAM Memtest from the start of SDRAM
  72  * till the beginning of the U-Boot position in RAM.
  73  */
  74 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
  75 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_TEXT_BASE - 0x100000)
  76
  77 /* Size of malloc() pool */
  78 #define CONFIG_SYS_MALLOC_LEN \
  79         ROUND(3 * CONFIG_ENV_SIZE + (4 * SZ_1M), 0x1000)
  80
  81 /* NAND flash settings */
  82 #define CONFIG_NAND_ATMEL
  83 #define CONFIG_SYS_MAX_NAND_DEVICE      1
  84 #define CONFIG_SYS_NAND_BASE            ATMEL_BASE_CS3
  85 #define CONFIG_SYS_NAND_DBW_8
  86 #define CONFIG_SYS_NAND_MASK_ALE        (1 << 21)
  87 #define CONFIG_SYS_NAND_MASK_CLE        (1 << 22)
  88 #define CONFIG_SYS_NAND_ENABLE_PIN      AT91_PIN_PC14
  89 #define CONFIG_SYS_NAND_READY_PIN       AT91_PIN_PC13
  90
  91 #define CONFIG_MTD_DEVICE
  92
  93 /* general purpose I/O */
  94 #define CONFIG_ATMEL_LEGACY             /* required until (g)pio is fixed */
  95 #define CONFIG_AT91_GPIO                /* enable the GPIO features */
  96 #define CONFIG_AT91_GPIO_PULLUP 1       /* keep pullups on peripheral pins */
  97
  98 /* serial console */
  99 #define CONFIG_ATMEL_USART
 100 #define CONFIG_USART_BASE               ATMEL_BASE_DBGU
 101 #define CONFIG_USART_ID                 ATMEL_ID_SYS
 102
 103 /*
 104  * Ethernet configuration
 105  *
 106  */
 107 #define CONFIG_MACB
 108 #define CONFIG_RMII                     /* use reduced MII inteface */
 109 #define CONFIG_NET_RETRY_COUNT  20      /* # of DHCP/BOOTP retries */
 110 #define CONFIG_AT91_WANTS_COMMON_PHY
 111
 112 /* BOOTP and DHCP options */
 113 #define CONFIG_BOOTP_BOOTFILESIZE
 114 #define CONFIG_NFSBOOTCOMMAND                                           \
 115         "setenv autoload yes; setenv autoboot yes; "                    \
 116         "setenv bootargs ${basicargs} ${mtdparts} "                     \
 117         "root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; "   \
 118         "dhcp"
 119
 120 /* Enable the watchdog */
 121 #define CONFIG_AT91SAM9_WATCHDOG
 122 #if !defined(CONFIG_SPL_BUILD)
 123 #define CONFIG_HW_WATCHDOG
 124 #endif
 125 #define CONFIG_AT91_HW_WDT_TIMEOUT      15
 126
 127 #if !defined(CONFIG_SPL_BUILD)
 128 /* USB configuration */
 129 #define CONFIG_USB_ATMEL
 130 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
 131 #define CONFIG_USB_OHCI_NEW
 132 #define CONFIG_SYS_USB_OHCI_CPU_INIT
 133 #define CONFIG_SYS_USB_OHCI_REGS_BASE   ATMEL_UHP_BASE
 134 #define CONFIG_SYS_USB_OHCI_SLOT_NAME   "at91sam9260"
 135 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      2
 136
 137 /* USB DFU support */
 138 #define CONFIG_MTD_DEVICE
 139 #define CONFIG_MTD_PARTITIONS
 140
 141 #define CONFIG_USB_GADGET_AT91
 142
 143 /* DFU class support */
 144 #define CONFIG_SYS_DFU_DATA_BUF_SIZE    SZ_1M
 145 #define DFU_MANIFEST_POLL_TIMEOUT       25000
 146 #endif
 147
 148 /* General Boot Parameter */
 149 #define CONFIG_BOOTCOMMAND              "run flashboot"
 150 #define CONFIG_SYS_CBSIZE               512
 151
 152 /*
 153  * RAM Memory address where to put the
 154  * Linux Kernel befor starting.
 155  */
 156 #define CONFIG_SYS_LOAD_ADDR            0x22000000
 157
 158 /*
 159  * The NAND Flash partitions:
 160  */
 161 #define CONFIG_ENV_OFFSET               (0x100000)
 162 #define CONFIG_ENV_OFFSET_REDUND        (0x180000)
 163 #define CONFIG_ENV_RANGE                (SZ_512K)
 164 #define CONFIG_ENV_SIZE                 (SZ_128K)
 165
 166 /*
 167  * Predefined environment variables.
 168  * Usefull to define some easy to use boot commands.
 169  */
 170 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 171                                                                         \
 172         "basicargs=console=ttyS0,115200\0"                              \
 173                                                                         \
 174         "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0"
 175
 176 #ifdef CONFIG_SPL_BUILD
 177 #define CONFIG_SYS_INIT_SP_ADDR         0x301000
 178 #define CONFIG_SPL_STACK_R
 179 #define CONFIG_SPL_STACK_R_ADDR         CONFIG_SYS_TEXT_BASE
 180 #else
 181 /*
 182  * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
 183  * leaving the correct space for initial global data structure above that
 184  * address while providing maximum stack area below.
 185  */
 186 #define CONFIG_SYS_INIT_SP_ADDR \
 187         (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
 188 #endif
 189
 190 /* Defines for SPL */
 191 #define CONFIG_SPL_TEXT_BASE            0x0
 192 #define CONFIG_SPL_MAX_SIZE             (SZ_4K)
 193
 194 #define CONFIG_SPL_BSS_START_ADDR       CONFIG_SYS_SDRAM_BASE
 195 #define CONFIG_SPL_BSS_MAX_SIZE         (SZ_16K)
 196 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
 197                                         CONFIG_SPL_BSS_MAX_SIZE)
 198 #define CONFIG_SYS_SPL_MALLOC_SIZE      CONFIG_SYS_MALLOC_LEN
 199
 200 #define CONFIG_SYS_NAND_ENABLE_PIN_SPL  (2*32 + 14)
 201 #define CONFIG_SYS_USE_NANDFLASH        1
 202 #define CONFIG_SPL_NAND_DRIVERS
 203 #define CONFIG_SPL_NAND_BASE
 204 #define CONFIG_SPL_NAND_ECC
 205 #define CONFIG_SPL_NAND_RAW_ONLY
 206 #define CONFIG_SPL_NAND_SOFTECC
 207 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x20000
 208 #define CONFIG_SYS_NAND_U_BOOT_SIZE     SZ_512K
 209 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 210 #define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
 211 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 212
 213 #define CONFIG_SYS_NAND_SIZE            (SZ_256M)
 214 #define CONFIG_SYS_NAND_PAGE_SIZE       SZ_2K
 215 #define CONFIG_SYS_NAND_BLOCK_SIZE      (SZ_128K)
 216 #define CONFIG_SYS_NAND_PAGE_COUNT      (CONFIG_SYS_NAND_BLOCK_SIZE / \
 217                                          CONFIG_SYS_NAND_PAGE_SIZE)
 218 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 219 #define CONFIG_SYS_NAND_ECCSIZE         256
 220 #define CONFIG_SYS_NAND_ECCBYTES        3
 221 #define CONFIG_SYS_NAND_OOBSIZE         64
 222 #define CONFIG_SYS_NAND_ECCPOS          { 40, 41, 42, 43, 44, 45, 46, 47, \
 223                                           48, 49, 50, 51, 52, 53, 54, 55, \
 224                                           56, 57, 58, 59, 60, 61, 62, 63, }
 225
 226 #define CONFIG_SPL_ATMEL_SIZE
 227 #define CONFIG_SYS_MASTER_CLOCK         (198656000/2)
 228 #define AT91_PLL_LOCK_TIMEOUT           1000000
 229 #define CONFIG_SYS_AT91_PLLA            0x2060bf09
 230 #define CONFIG_SYS_MCKR                 0x100
 231 #define CONFIG_SYS_MCKR_CSS             (0x02 | CONFIG_SYS_MCKR)
 232 #define CONFIG_SYS_AT91_PLLB            0x10483f0e
 233
 234 #if defined(CONFIG_SPL_BUILD)
 235 #define CONFIG_SYS_ICACHE_OFF
 236 #define CONFIG_SYS_DCACHE_OFF
 237 #endif
 238 #endif /* __CONFIG_H */