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ARM: activate DISPLAY_CPUINFO for VCMA9 + SMDK2410 board
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1 /*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 * Gary Jennejohn <garyj@denx.de>
6 * David Mueller <d.mueller@elsoft.ch>
7 *
8 * Configuation settings for the SAMSUNG SMDK2410 board.
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29 #ifndef __CONFIG_H
30 #define __CONFIG_H
31
32 /*
33 * High Level Configuration Options
34 * (easy to change)
35 */
36 #define CONFIG_ARM920T /* This is an ARM920T Core */
37 #define CONFIG_S3C24X0 /* in a SAMSUNG S3C24x0-type SoC */
38 #define CONFIG_S3C2410 /* specifically a SAMSUNG S3C2410 SoC */
39 #define CONFIG_SMDK2410 /* on a SAMSUNG SMDK2410 Board */
40
41 #define CONFIG_SYS_TEXT_BASE 0x0
42
43 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
44
45 /* input clock of PLL (the SMDK2410 has 12MHz input clock) */
46 #define CONFIG_SYS_CLK_FREQ 12000000
47
48 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
49
50 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
51 #define CONFIG_SETUP_MEMORY_TAGS
52 #define CONFIG_INITRD_TAG
53
54 /*
55 * Hardware drivers
56 */
57 #define CONFIG_CS8900 /* we have a CS8900 on-board */
58 #define CONFIG_CS8900_BASE 0x19000300
59 #define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */
60
61 /*
62 * select serial console configuration
63 */
64 #define CONFIG_S3C24X0_SERIAL
65 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2410 */
66
67 /************************************************************
68 * USB support (currently only works with D-cache off)
69 ************************************************************/
70 #define CONFIG_USB_OHCI
71 #define CONFIG_USB_KEYBOARD
72 #define CONFIG_USB_STORAGE
73 #define CONFIG_DOS_PARTITION
74
75 /************************************************************
76 * RTC
77 ************************************************************/
78 #define CONFIG_RTC_S3C24X0
79
80
81 #define CONFIG_BAUDRATE 115200
82
83 /*
84 * BOOTP options
85 */
86 #define CONFIG_BOOTP_BOOTFILESIZE
87 #define CONFIG_BOOTP_BOOTPATH
88 #define CONFIG_BOOTP_GATEWAY
89 #define CONFIG_BOOTP_HOSTNAME
90
91 /*
92 * Command line configuration.
93 */
94 #include <config_cmd_default.h>
95
96 #define CONFIG_CMD_BSP
97 #define CONFIG_CMD_CACHE
98 #define CONFIG_CMD_DATE
99 #define CONFIG_CMD_DHCP
100 #define CONFIG_CMD_ELF
101 #define CONFIG_CMD_NAND
102 #define CONFIG_CMD_PING
103 #define CONFIG_CMD_REGINFO
104 #define CONFIG_CMD_USB
105
106 #define CONFIG_SYS_HUSH_PARSER
107 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
108 #define CONFIG_CMDLINE_EDITING
109
110 /* autoboot */
111 #define CONFIG_BOOTDELAY 5
112 #define CONFIG_BOOT_RETRY_TIME -1
113 #define CONFIG_RESET_TO_RETRY
114 #define CONFIG_ZERO_BOOTDELAY_CHECK
115
116 #define CONFIG_NETMASK 255.255.255.0
117 #define CONFIG_IPADDR 10.0.0.110
118 #define CONFIG_SERVERIP 10.0.0.1
119
120 #if defined(CONFIG_CMD_KGDB)
121 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
122 /* what's this ? it's not used anywhere */
123 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
124 #endif
125
126 /*
127 * Miscellaneous configurable options
128 */
129 #define CONFIG_SYS_LONGHELP /* undef to save memory */
130 #define CONFIG_SYS_PROMPT "SMDK2410 # "
131 #define CONFIG_SYS_CBSIZE 256
132 /* Print Buffer Size */
133 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
134 sizeof(CONFIG_SYS_PROMPT)+16)
135 #define CONFIG_SYS_MAXARGS 16
136 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
137
138 #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
139
140 #define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
141 #define CONFIG_SYS_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
142
143 #define CONFIG_SYS_LOAD_ADDR 0x30800000
144
145 #define CONFIG_SYS_HZ 1000
146
147 /* valid baudrates */
148 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
149
150 /* support additional compression methods */
151 #define CONFIG_BZIP2
152 #define CONFIG_LZO
153 #define CONFIG_LZMA
154
155 /*-----------------------------------------------------------------------
156 * Stack sizes
157 *
158 * The stack sizes are set up in start.S using the settings below
159 */
160 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
161 #ifdef CONFIG_USE_IRQ
162 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
163 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
164 #endif
165
166 /*-----------------------------------------------------------------------
167 * Physical Memory Map
168 */
169 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
170 #define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
171 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
172
173 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #0 */
174
175 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
176
177 /*-----------------------------------------------------------------------
178 * FLASH and environment organization
179 */
180
181 #define CONFIG_SYS_FLASH_CFI
182 #define CONFIG_FLASH_CFI_DRIVER
183 #define CONFIG_FLASH_CFI_LEGACY
184 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
185 #define CONFIG_FLASH_SHOW_PROGRESS 45
186
187 #define CONFIG_SYS_MAX_FLASH_BANKS 1
188 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
189 #define CONFIG_SYS_MAX_FLASH_SECT (19)
190
191 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x070000)
192 #define CONFIG_ENV_IS_IN_FLASH
193 #define CONFIG_ENV_SIZE 0x10000
194 /* allow to overwrite serial and ethaddr */
195 #define CONFIG_ENV_OVERWRITE
196
197 /*
198 * Size of malloc() pool
199 * BZIP2 / LZO / LZMA need a lot of RAM
200 */
201 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
202
203 #define CONFIG_SYS_MONITOR_LEN (448 * 1024)
204 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
205
206 /*
207 * NAND configuration
208 */
209 #ifdef CONFIG_CMD_NAND
210 #define CONFIG_NAND_S3C2410
211 #define CONFIG_SYS_S3C2410_NAND_HWECC
212 #define CONFIG_SYS_MAX_NAND_DEVICE 1
213 #define CONFIG_SYS_NAND_BASE 0x4E000000
214 #endif
215
216 /*
217 * File system
218 */
219 #define CONFIG_CMD_FAT
220 #define CONFIG_CMD_EXT2
221 #define CONFIG_CMD_UBI
222 #define CONFIG_CMD_UBIFS
223 #define CONFIG_CMD_MTDPARTS
224 #define CONFIG_MTD_DEVICE
225 #define CONFIG_MTD_PARTITIONS
226 #define CONFIG_YAFFS2
227 #define CONFIG_RBTREE
228
229 /* additions for new relocation code, must be added to all boards */
230 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
231 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
232 GENERATED_GBL_DATA_SIZE)
233
234 #define CONFIG_BOARD_EARLY_INIT_F
235
236 #endif /* __CONFIG_H */