include/configs/smdk2410.h

   1 /*
   2  * (C) Copyright 2002
   3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4  * Marius Groeger <mgroeger@sysgo.de>
   5  * Gary Jennejohn <garyj@denx.de>
   6  * David Mueller <d.mueller@elsoft.ch>
   7  *
   8  * Configuation settings for the SAMSUNG SMDK2410 board.
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef __CONFIG_H
  14 #define __CONFIG_H
  15
  16 /*
  17  * High Level Configuration Options
  18  * (easy to change)
  19  */
  20 #define CONFIG_S3C24X0          /* This is a SAMSUNG S3C24x0-type SoC */
  21 #define CONFIG_S3C2410          /* specifically a SAMSUNG S3C2410 SoC */
  22 #define CONFIG_SMDK2410         /* on a SAMSUNG SMDK2410 Board */
  23
  24 #define CONFIG_SYS_TEXT_BASE    0x0
  25
  26
  27 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
  28
  29 /* input clock of PLL (the SMDK2410 has 12MHz input clock) */
  30 #define CONFIG_SYS_CLK_FREQ     12000000
  31
  32 #define CONFIG_CMDLINE_TAG      /* enable passing of ATAGs */
  33 #define CONFIG_SETUP_MEMORY_TAGS
  34 #define CONFIG_INITRD_TAG
  35
  36 /*
  37  * Hardware drivers
  38  */
  39 #define CONFIG_CS8900           /* we have a CS8900 on-board */
  40 #define CONFIG_CS8900_BASE      0x19000300
  41 #define CONFIG_CS8900_BUS16     /* the Linux driver does accesses as shorts */
  42
  43 /*
  44  * select serial console configuration
  45  */
  46 #define CONFIG_S3C24X0_SERIAL
  47 #define CONFIG_SERIAL1          1       /* we use SERIAL 1 on SMDK2410 */
  48
  49 /************************************************************
  50  * USB support (currently only works with D-cache off)
  51  ************************************************************/
  52 #define CONFIG_USB_OHCI
  53 #define CONFIG_USB_OHCI_S3C24XX
  54 #define CONFIG_USB_KEYBOARD
  55 #define CONFIG_USB_STORAGE
  56 #define CONFIG_DOS_PARTITION
  57
  58 /************************************************************
  59  * RTC
  60  ************************************************************/
  61 #define CONFIG_RTC_S3C24X0
  62
  63
  64 #define CONFIG_BAUDRATE         115200
  65
  66 /*
  67  * BOOTP options
  68  */
  69 #define CONFIG_BOOTP_BOOTFILESIZE
  70 #define CONFIG_BOOTP_BOOTPATH
  71 #define CONFIG_BOOTP_GATEWAY
  72 #define CONFIG_BOOTP_HOSTNAME
  73
  74 /*
  75  * Command line configuration.
  76  */
  77 #define CONFIG_CMD_BSP
  78 #define CONFIG_CMD_CACHE
  79 #define CONFIG_CMD_DATE
  80 #define CONFIG_CMD_DHCP
  81 #define CONFIG_CMD_NAND
  82 #define CONFIG_CMD_PING
  83 #define CONFIG_CMD_REGINFO
  84 #define CONFIG_CMD_USB
  85
  86 #define CONFIG_SYS_HUSH_PARSER
  87 #define CONFIG_CMDLINE_EDITING
  88
  89 /* autoboot */
  90 #define CONFIG_BOOTDELAY        5
  91 #define CONFIG_BOOT_RETRY_TIME  -1
  92 #define CONFIG_RESET_TO_RETRY
  93 #define CONFIG_ZERO_BOOTDELAY_CHECK
  94
  95 #define CONFIG_NETMASK          255.255.255.0
  96 #define CONFIG_IPADDR           10.0.0.110
  97 #define CONFIG_SERVERIP         10.0.0.1
  98
  99 #if defined(CONFIG_CMD_KGDB)
 100 #define CONFIG_KGDB_BAUDRATE    115200  /* speed to run kgdb serial port */
 101 #endif
 102
 103 /*
 104  * Miscellaneous configurable options
 105  */
 106 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 107 #define CONFIG_SYS_CBSIZE       256
 108 /* Print Buffer Size */
 109 #define CONFIG_SYS_PBSIZE       (CONFIG_SYS_CBSIZE + \
 110                                 sizeof(CONFIG_SYS_PROMPT)+16)
 111 #define CONFIG_SYS_MAXARGS      16
 112 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE
 113
 114 #define CONFIG_DISPLAY_CPUINFO                          /* Display cpu info */
 115
 116 #define CONFIG_SYS_MEMTEST_START        0x30000000      /* memtest works on */
 117 #define CONFIG_SYS_MEMTEST_END          0x33F00000      /* 63 MB in DRAM */
 118
 119 #define CONFIG_SYS_LOAD_ADDR            0x30800000
 120
 121 /* support additional compression methods */
 122 #define CONFIG_BZIP2
 123 #define CONFIG_LZO
 124 #define CONFIG_LZMA
 125
 126 /*-----------------------------------------------------------------------
 127  * Physical Memory Map
 128  */
 129 #define CONFIG_NR_DRAM_BANKS    1          /* we have 1 bank of DRAM */
 130 #define PHYS_SDRAM_1            0x30000000 /* SDRAM Bank #1 */
 131 #define PHYS_SDRAM_1_SIZE       0x04000000 /* 64 MB */
 132
 133 #define PHYS_FLASH_1            0x00000000 /* Flash Bank #0 */
 134
 135 #define CONFIG_SYS_FLASH_BASE   PHYS_FLASH_1
 136
 137 /*-----------------------------------------------------------------------
 138  * FLASH and environment organization
 139  */
 140
 141 #define CONFIG_SYS_FLASH_CFI
 142 #define CONFIG_FLASH_CFI_DRIVER
 143 #define CONFIG_FLASH_CFI_LEGACY
 144 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
 145 #define CONFIG_FLASH_SHOW_PROGRESS      45
 146
 147 #define CONFIG_SYS_MAX_FLASH_BANKS      1
 148 #define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE }
 149 #define CONFIG_SYS_MAX_FLASH_SECT       (19)
 150
 151 #define CONFIG_ENV_ADDR                 (CONFIG_SYS_FLASH_BASE + 0x070000)
 152 #define CONFIG_ENV_IS_IN_FLASH
 153 #define CONFIG_ENV_SIZE                 0x10000
 154 /* allow to overwrite serial and ethaddr */
 155 #define CONFIG_ENV_OVERWRITE
 156
 157 /*
 158  * Size of malloc() pool
 159  * BZIP2 / LZO / LZMA need a lot of RAM
 160  */
 161 #define CONFIG_SYS_MALLOC_LEN   (4 * 1024 * 1024)
 162
 163 #define CONFIG_SYS_MONITOR_LEN  (448 * 1024)
 164 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
 165
 166 /*
 167  * NAND configuration
 168  */
 169 #ifdef CONFIG_CMD_NAND
 170 #define CONFIG_NAND_S3C2410
 171 #define CONFIG_SYS_S3C2410_NAND_HWECC
 172 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 173 #define CONFIG_SYS_NAND_BASE            0x4E000000
 174 #endif
 175
 176 /*
 177  * File system
 178  */
 179 #define CONFIG_CMD_FAT
 180 #define CONFIG_CMD_EXT2
 181 #define CONFIG_CMD_UBI
 182 #define CONFIG_CMD_UBIFS
 183 #define CONFIG_CMD_MTDPARTS
 184 #define CONFIG_MTD_DEVICE
 185 #define CONFIG_MTD_PARTITIONS
 186 #define CONFIG_YAFFS2
 187 #define CONFIG_RBTREE
 188
 189 /* additions for new relocation code, must be added to all boards */
 190 #define CONFIG_SYS_SDRAM_BASE   PHYS_SDRAM_1
 191 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
 192                                 GENERATED_GBL_DATA_SIZE)
 193
 194 #define CONFIG_BOARD_EARLY_INIT_F
 195
 196 #endif /* __CONFIG_H */