include/configs/socfpga_arria5_socdk.h

   1 /*
   2  * Copyright (C) 2014 Marek Vasut <marex@denx.de>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6 #ifndef __CONFIG_SOCFPGA_ARRIA5_H__
   7 #define __CONFIG_SOCFPGA_ARRIA5_H__
   8
   9 #include <asm/arch/base_addr_ac5.h>
  10
  11 /* U-Boot Commands */
  12 #define CONFIG_SYS_NO_FLASH
  13 #define CONFIG_DOS_PARTITION
  14 #define CONFIG_FAT_WRITE
  15 #define CONFIG_HW_WATCHDOG
  16
  17 #define CONFIG_CMD_ASKENV
  18 #define CONFIG_CMD_BOOTZ
  19 #define CONFIG_CMD_CACHE
  20 #define CONFIG_CMD_DFU
  21 #define CONFIG_CMD_EXT4
  22 #define CONFIG_CMD_EXT4_WRITE
  23 #define CONFIG_CMD_FAT
  24 #define CONFIG_CMD_FS_GENERIC
  25 #define CONFIG_CMD_GREPENV
  26 #define CONFIG_CMD_MII
  27 #define CONFIG_CMD_MMC
  28 #define CONFIG_CMD_USB_MASS_STORAGE
  29
  30 /* Memory configurations */
  31 #define PHYS_SDRAM_1_SIZE               0x40000000      /* 1GiB on SoCDK */
  32
  33 /* Booting Linux */
  34 #define CONFIG_BOOTDELAY        3
  35 #define CONFIG_BOOTFILE         "zImage"
  36 #define CONFIG_BOOTARGS         "console=ttyS0," __stringify(CONFIG_BAUDRATE)
  37 #ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
  38 #define CONFIG_BOOTCOMMAND      "run ramboot"
  39 #else
  40 #define CONFIG_BOOTCOMMAND      "run mmcload; run mmcboot"
  41 #endif
  42 #define CONFIG_LOADADDR         0x01000000
  43 #define CONFIG_SYS_LOAD_ADDR    CONFIG_LOADADDR
  44
  45 /* Ethernet on SoC (EMAC) */
  46 #if defined(CONFIG_CMD_NET)
  47 #define CONFIG_PHY_MICREL
  48 #define CONFIG_PHY_MICREL_KSZ9021
  49 #endif
  50
  51 #define CONFIG_ENV_IS_IN_MMC
  52
  53 /* Extra Environment */
  54 #define CONFIG_EXTRA_ENV_SETTINGS \
  55         "verify=n\0" \
  56         "loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
  57         "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
  58                 "bootm ${loadaddr} - ${fdt_addr}\0" \
  59         "bootimage=zImage\0" \
  60         "fdt_addr=100\0" \
  61         "fdtimage=socfpga.dtb\0" \
  62         "bootm ${loadaddr} - ${fdt_addr}\0" \
  63         "mmcroot=/dev/mmcblk0p2\0" \
  64         "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
  65                 " root=${mmcroot} rw rootwait;" \
  66                 "bootz ${loadaddr} - ${fdt_addr}\0" \
  67         "mmcload=mmc rescan;" \
  68                 "load mmc 0:1 ${loadaddr} ${bootimage};" \
  69                 "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
  70         "qspiload=sf probe && mtdparts default && run ubiload\0" \
  71         "qspiboot=setenv bootargs " CONFIG_BOOTARGS \
  72                 " ubi.mtd=1,64 root=ubi0:rootfs rw rootfstype=ubifs;"\
  73                 "bootz ${loadaddr} - ${fdt_addr}\0" \
  74         "ubiload=ubi part UBI && ubifsmount ubi0 && " \
  75                 "ubifsload ${loadaddr} /boot/${bootimage} && " \
  76                 "ubifsload ${fdt_addr} /boot/${fdtimage}\0"
  77
  78 /* The rest of the configuration is shared */
  79 #include <configs/socfpga_common.h>
  80
  81 #endif  /* __CONFIG_SOCFPGA_ARRIA5_H__ */