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[people/ms/u-boot.git] / include / configs / socfpga_vining_fpga.h
1 /*
2 * Copyright (C) 2015 Marek Vasut <marex@denx.de>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6 #ifndef __CONFIG_SAMTEC_VINING_FPGA_H__
7 #define __CONFIG_SAMTEC_VINING_FPGA_H__
8
9 #include <asm/arch/base_addr_ac5.h>
10
11 #define CONFIG_HW_WATCHDOG
12
13 /* Memory configurations */
14 #define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB on VINING_FPGA */
15
16 /* Booting Linux */
17 #define CONFIG_BOOTFILE "openwrt-socfpga-socfpga_cyclone5_vining_fpga-fit-uImage.itb"
18 #define CONFIG_BOOTARGS "console=ttyS0," __stringify(CONFIG_BAUDRATE)
19 #define CONFIG_BOOTCOMMAND "run selboot"
20 #define CONFIG_LOADADDR 0x01000000
21 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
22
23 /* I2C EEPROM */
24 #ifdef CONFIG_CMD_EEPROM
25 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
26 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
27 #define CONFIG_SYS_I2C_EEPROM_BUS 0
28 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
29 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70
30 #endif
31
32 /*
33 * Status LEDs:
34 * 0 ... Top Green
35 * 1 ... Top Red
36 * 2 ... Bottom Green
37 * 3 ... Bottom Red
38 */
39
40 /* Ethernet on SoC (EMAC) */
41 #if defined(CONFIG_CMD_NET)
42 #define CONFIG_BOOTP_SEND_HOSTNAME
43 /* PHY */
44 #define CONFIG_PHY_MICREL
45 #define CONFIG_PHY_MICREL_KSZ9021
46 #endif
47
48 /* Extra Environment */
49 #define CONFIG_HOSTNAME socfpga_vining_fpga
50
51 /*
52 * Active LOW GPIO buttons:
53 * A: GPIO 77 ... the button between USB B and ethernet
54 * B: GPIO 78 ... the button between USB A ports
55 *
56 * The logic:
57 * if button B is not pressed, boot normal Linux system immediatelly
58 * if button B is pressed, wait $bootdelay and boot recovery system
59 */
60 #define CONFIG_PREBOOT \
61 "setenv hostname vining-${unit_serial} ; " \
62 "setenv PS1 \"${unit_ident} (${unit_serial}) => \" ; " \
63 "if gpio input 78 ; then " \
64 "setenv bootdelay 10 ; " \
65 "setenv boottype rcvr ; " \
66 "else " \
67 "setenv bootdelay 5 ; " \
68 "setenv boottype norm ; " \
69 "fi"
70
71 #define CONFIG_EXTRA_ENV_SETTINGS \
72 "verify=n\0" \
73 "consdev=ttyS0\0" \
74 "baudrate=115200\0" \
75 "bootscript=boot.scr\0" \
76 "ubimtdnr=5\0" \
77 "ubimtd=rootfs\0" \
78 "ubipart=ubi0:rootfs\0" \
79 "ubisfcs=1\0" /* Default is flash at CS#1 */ \
80 "netdev=eth0\0" \
81 "hostname=vining_fpga\0" \
82 "kernel_addr_r=0x10000000\0" \
83 "mtdparts_0=ff705000.spi.0:" \
84 "1m(u-boot)," \
85 "64k(env1)," \
86 "64k(env2)," \
87 "256k(samtec1)," \
88 "256k(samtec2)," \
89 "-(rcvrfs)\0" /* Recovery */ \
90 "mtdparts_1=ff705000.spi.1:" \
91 "32m(rootfs)," \
92 "-(userfs)\0" \
93 "update_filename=u-boot-with-spl-dtb.sfp\0" \
94 "update_qspi_offset=0x0\0" \
95 "update_qspi=" /* Update the QSPI firmware */ \
96 "if sf probe ; then " \
97 "if tftp ${update_filename} ; then " \
98 "sf update ${loadaddr} ${update_qspi_offset} ${filesize} ; " \
99 "fi ; " \
100 "fi\0" \
101 "fpga_filename=output_file.rbf\0" \
102 "load_fpga=" /* Load FPGA bitstream */ \
103 "if tftp ${fpga_filename} ; then " \
104 "fpga load 0 $loadaddr $filesize ; " \
105 "bridge enable ; " \
106 "fi\0" \
107 "addcons=" \
108 "setenv bootargs ${bootargs} " \
109 "console=${consdev},${baudrate}\0" \
110 "addip=" \
111 "setenv bootargs ${bootargs} " \
112 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
113 "${netmask}:${hostname}:${netdev}:off\0" \
114 "addmisc=" \
115 "setenv bootargs ${bootargs} ${miscargs}\0" \
116 "addmtd=" \
117 "setenv mtdparts \"${mtdparts_0};${mtdparts_1}\" ; " \
118 "setenv bootargs ${bootargs} mtdparts=${mtdparts}\0" \
119 "addargs=run addcons addmtd addmisc\0" \
120 "ubiload=" \
121 "ubi part ${ubimtd} ; ubifsmount ${ubipart} ; " \
122 "ubifsload ${kernel_addr_r} /boot/${bootfile}\0" \
123 "netload=" \
124 "tftp ${kernel_addr_r} ${hostname}/${bootfile}\0" \
125 "miscargs=nohlt panic=1\0" \
126 "ubiargs=" \
127 "setenv bootargs ubi.mtd=${ubimtdnr} " \
128 "root=${ubipart} rootfstype=ubifs\0" \
129 "nfsargs=" \
130 "setenv bootargs root=/dev/nfs rw " \
131 "nfsroot=${serverip}:${rootpath},v3,tcp\0" \
132 "ubi_sfsel=" \
133 "if test \"${boottype}\" = \"rcvr\" ; then " \
134 "setenv ubisfcs 0 ; " \
135 "setenv ubimtd rcvrfs ; " \
136 "setenv ubimtdnr 5 ; " \
137 "setenv mtdparts mtdparts=${mtdparts_0} ; " \
138 "setenv mtdids nor0=ff705000.spi.0 ; " \
139 "setenv ubipart ubi0:rootfs ; " \
140 "else " \
141 "setenv ubisfcs 1 ; " \
142 "setenv ubimtd rootfs ; " \
143 "setenv ubimtdnr 6 ; " \
144 "setenv mtdparts mtdparts=${mtdparts_1} ; " \
145 "setenv mtdids nor0=ff705000.spi.1 ; " \
146 "setenv ubipart ubi0:rootfs ; " \
147 "fi ; " \
148 "sf probe 0:${ubisfcs}\0" \
149 "ubi_ubi=" \
150 "run ubi_sfsel ubiload ubiargs addargs ; " \
151 "bootm ${kernel_addr_r}\0" \
152 "ubi_nfs=" \
153 "run ubiload nfsargs addip addargs ; " \
154 "bootm ${kernel_addr_r}\0" \
155 "net_ubi=" \
156 "run netload ubiargs addargs ; " \
157 "bootm ${kernel_addr_r}\0" \
158 "net_nfs=" \
159 "run netload nfsargs addip addargs ; " \
160 "bootm ${kernel_addr_r}\0" \
161 "selboot=" /* Select from where to boot. */ \
162 "if test \"${bootmode}\" = \"qspi\" ; then " \
163 "led all off ; " \
164 "if test \"${boottype}\" = \"rcvr\" ; then " \
165 "echo \"Booting recovery system\" ; " \
166 "led 3 on ; " /* Bottom RED */ \
167 "fi ; " \
168 "led 1 on ; " /* Top RED */ \
169 "run ubi_ubi ; " \
170 "else echo \"Unsupported boot mode: \"${bootmode} ; " \
171 "fi\0" \
172
173 #define MTDPARTS_DEFAULT \
174 "mtdparts=ff705000.spi.0:" \
175 "1m(u-boot)," \
176 "64k(env1)," \
177 "64k(env2)," \
178 "256k(samtec1)," \
179 "256k(samtec2)," \
180 "-(rcvrfs);" /* Recovery */ \
181
182 #define CONFIG_ENV_IS_IN_SPI_FLASH
183 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
184 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
185 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
186 #define CONFIG_ENV_OFFSET 0x100000
187 #define CONFIG_ENV_OFFSET_REDUND \
188 (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE)
189
190 #define CONFIG_MISC_INIT_R
191
192 /* Support changing the prompt string */
193 #define CONFIG_CMDLINE_PS_SUPPORT
194
195 /* The rest of the configuration is shared */
196 #include <configs/socfpga_common.h>
197
198 #endif /* __CONFIG_SAMTEC_VINING_FPGA_H__ */