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mx53: Add Board support for GE PPD
[people/ms/u-boot.git] / include / configs / stm32f746-disco.h
1 /*
2 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
3 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 #ifndef __CONFIG_H
9 #define __CONFIG_H
10
11 #define CONFIG_SYS_FLASH_BASE 0x08000000
12 #define CONFIG_SYS_INIT_SP_ADDR 0x20050000
13
14 #ifdef CONFIG_SUPPORT_SPL
15 #define CONFIG_SYS_TEXT_BASE 0x08008000
16 #define CONFIG_SYS_LOAD_ADDR 0x08008000
17 #else
18 #define CONFIG_SYS_TEXT_BASE CONFIG_SYS_FLASH_BASE
19 #define CONFIG_SYS_LOAD_ADDR 0xC0400000
20 #define CONFIG_LOADADDR 0xC0400000
21 #endif
22
23 /*
24 * Configuration of the external SDRAM memory
25 */
26 #define CONFIG_NR_DRAM_BANKS 1
27
28 #define CONFIG_SYS_MAX_FLASH_SECT 8
29 #define CONFIG_SYS_MAX_FLASH_BANKS 1
30
31 #define CONFIG_ENV_SIZE (8 << 10)
32
33 #define CONFIG_STM32_FLASH
34
35 #define CONFIG_DW_GMAC_DEFAULT_DMA_PBL (8)
36 #define CONFIG_DW_ALTDESCRIPTOR
37 #define CONFIG_MII
38 #define CONFIG_PHY_SMSC
39
40 #define CONFIG_STM32_HSE_HZ 25000000
41 #define CONFIG_SYS_CLK_FREQ 200000000 /* 200 MHz */
42 #define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer is clocked at 1MHz */
43
44 #define CONFIG_CMDLINE_TAG
45 #define CONFIG_SETUP_MEMORY_TAGS
46 #define CONFIG_INITRD_TAG
47 #define CONFIG_REVISION_TAG
48
49 #define CONFIG_SYS_CBSIZE 1024
50
51 #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024)
52
53 #define CONFIG_BOOTCOMMAND \
54 "run bootcmd_romfs"
55
56 #define CONFIG_EXTRA_ENV_SETTINGS \
57 "bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \
58 "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \
59 "bootm 0x08044000 - 0x08042000\0"
60
61
62 /*
63 * Command line configuration.
64 */
65 #define CONFIG_SYS_LONGHELP
66 #define CONFIG_AUTO_COMPLETE
67 #define CONFIG_CMDLINE_EDITING
68 #define CONFIG_CMD_CACHE
69 #define CONFIG_BOARD_LATE_INIT
70 #define CONFIG_DISPLAY_BOARDINFO
71
72 /* For SPL */
73 #ifdef CONFIG_SUPPORT_SPL
74 #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
75 #define CONFIG_SPL_FRAMEWORK
76 #define CONFIG_SPL_BOARD_INIT
77 #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_FLASH_BASE
78 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
79 #define CONFIG_SYS_SPL_LEN 0x00008000
80 #define CONFIG_SYS_UBOOT_START 0x080083FD
81 #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + \
82 CONFIG_SYS_SPL_LEN)
83
84 /* DT blob (fdt) address */
85 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + \
86 0x1C0000)
87 #endif
88 /* For SPL ends */
89
90 #endif /* __CONFIG_H */