include/configs/stout.h

   1 /*
   2  * include/configs/stout.h
   3  *     This file is Stout board configuration.
   4  *
   5  * Copyright (C) 2015 Renesas Electronics Europe GmbH
   6  * Copyright (C) 2015 Renesas Electronics Corporation
   7  * Copyright (C) 2015 Cogent Embedded, Inc.
   8  *
   9  * SPDX-License-Identifier: GPL-2.0
  10  */
  11
  12 #ifndef __STOUT_H
  13 #define __STOUT_H
  14
  15 #undef DEBUG
  16 #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Stout"
  17
  18 #include "rcar-gen2-common.h"
  19
  20 /* STACK */
  21 #if defined(CONFIGF_RMOBILE_EXTRAM_BOOT)
  22 #define CONFIG_SYS_INIT_SP_ADDR         0xB003FFFC
  23 #else
  24 #define CONFIG_SYS_INIT_SP_ADDR         0xE827FFFC
  25 #endif
  26 #define STACK_AREA_SIZE                 0xC000
  27 #define LOW_LEVEL_MERAM_STACK   \
  28                 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
  29
  30 /* MEMORY */
  31 #define RCAR_GEN2_SDRAM_BASE            0x40000000
  32 #define RCAR_GEN2_SDRAM_SIZE            (1024u * 1024 * 1024)
  33 #define RCAR_GEN2_UBOOT_SDRAM_SIZE      (512 * 1024 * 1024)
  34
  35 /* SCIF */
  36 #define CONFIG_SCIF_A
  37
  38 /* SPI */
  39 #define CONFIG_SPI
  40 #define CONFIG_SH_QSPI
  41 #define CONFIG_SPI_FLASH_QUAD
  42
  43 /* SH Ether */
  44 #define CONFIG_SH_ETHER_USE_PORT        0
  45 #define CONFIG_SH_ETHER_PHY_ADDR        0x1
  46 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
  47 #define CONFIG_SH_ETHER_ALIGNE_SIZE     64
  48 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
  49 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
  50 #define CONFIG_BITBANGMII
  51 #define CONFIG_BITBANGMII_MULTI
  52
  53 /* I2C */
  54 #define CONFIG_SYS_I2C
  55 #define CONFIG_SYS_I2C_RCAR
  56 #define CONFIG_SYS_RCAR_I2C0_SPEED      400000
  57 #define CONFIG_SYS_RCAR_I2C1_SPEED      400000
  58 #define CONFIG_SYS_RCAR_I2C2_SPEED      400000
  59 #define CONFIG_SYS_RCAR_I2C3_SPEED      400000
  60 #define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS     4
  61
  62 #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
  63
  64 /* Board Clock */
  65 #define RMOBILE_XTAL_CLK        20000000u
  66 #define CONFIG_SYS_CLK_FREQ     RMOBILE_XTAL_CLK
  67 #define CONFIG_SH_TMU_CLK_FREQ  (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
  68 #define CONFIG_PLL1_CLK_FREQ    (CONFIG_SYS_CLK_FREQ * 156 / 2)
  69 #define CONFIG_PLL1_DIV2_CLK_FREQ       (CONFIG_PLL1_CLK_FREQ / 2)
  70 #define CONFIG_MP_CLK_FREQ      (CONFIG_PLL1_DIV2_CLK_FREQ / 15)
  71 #define CONFIG_HP_CLK_FREQ      (CONFIG_PLL1_CLK_FREQ / 12)
  72
  73 #define CONFIG_SYS_TMU_CLK_DIV  4
  74
  75 /* USB */
  76 #define CONFIG_USB_EHCI_RMOBILE
  77 #define CONFIG_USB_MAX_CONTROLLER_COUNT 3
  78
  79 /* Module stop status bits */
  80 /* INTC-RT */
  81 #define CONFIG_SMSTP0_ENA       0x00400000
  82 /* MSIF, SCIFA0 */
  83 #define CONFIG_SMSTP2_ENA       0x00002010
  84 /* INTC-SYS, IRQC */
  85 #define CONFIG_SMSTP4_ENA       0x00000180
  86
  87 /* SDHI */
  88 #define CONFIG_SH_SDHI_FREQ     97500000
  89
  90 #endif  /* __STOUT_H */