include/configs/sunxi-common.h

   1 /*
   2  * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
   3  *
   4  * (C) Copyright 2007-2011
   5  * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
   6  * Tom Cubie <tangliang@allwinnertech.com>
   7  *
   8  * Configuration settings for the Allwinner sunxi series of boards.
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef _SUNXI_COMMON_CONFIG_H
  14 #define _SUNXI_COMMON_CONFIG_H
  15
  16 #include <asm/arch/cpu.h>
  17 #include <linux/stringify.h>
  18
  19 #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
  20 /*
  21  * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
  22  * expense of restricting some features, so the regular machine id values can
  23  * be used.
  24  */
  25 # define CONFIG_MACH_TYPE_COMPAT_REV    0
  26 #else
  27 /*
  28  * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
  29  * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
  30  * beyond the machine id check.
  31  */
  32 # define CONFIG_MACH_TYPE_COMPAT_REV    1
  33 #endif
  34
  35 /*
  36  * High Level Configuration Options
  37  */
  38 #define CONFIG_SUNXI            /* sunxi family */
  39 #ifdef CONFIG_SPL_BUILD
  40 #define CONFIG_SYS_THUMB_BUILD  /* Thumbs mode to save space in SPL */
  41 #endif
  42
  43 /* Serial & console */
  44 #define CONFIG_SYS_NS16550
  45 #define CONFIG_SYS_NS16550_SERIAL
  46 /* ns16550 reg in the low bits of cpu reg */
  47 #define CONFIG_SYS_NS16550_CLK          24000000
  48 #ifdef CONFIG_DM_SERIAL
  49 # define CONFIG_DW_SERIAL
  50 #else
  51 # define CONFIG_SYS_NS16550_REG_SIZE    -4
  52 # define CONFIG_SYS_NS16550_COM1                SUNXI_UART0_BASE
  53 # define CONFIG_SYS_NS16550_COM2                SUNXI_UART1_BASE
  54 # define CONFIG_SYS_NS16550_COM3                SUNXI_UART2_BASE
  55 # define CONFIG_SYS_NS16550_COM4                SUNXI_UART3_BASE
  56 # define CONFIG_SYS_NS16550_COM5                SUNXI_R_UART_BASE
  57 #endif
  58
  59 /* CPU */
  60 #define CONFIG_DISPLAY_CPUINFO
  61 #define CONFIG_SYS_CACHELINE_SIZE       64
  62
  63 /*
  64  * The DRAM Base differs between some models. We cannot use macros for the
  65  * CONFIG_FOO defines which contain the DRAM base address since they end
  66  * up unexpanded in include/autoconf.mk .
  67  *
  68  * So we have to have this #ifdef #else #endif block for these.
  69  */
  70 #ifdef CONFIG_MACH_SUN9I
  71 #define SDRAM_OFFSET(x) 0x2##x
  72 #define CONFIG_SYS_SDRAM_BASE           0x20000000
  73 #define CONFIG_SYS_LOAD_ADDR            0x22000000 /* default load address */
  74 #define CONFIG_SYS_TEXT_BASE            0x2a000000
  75 #define CONFIG_PRE_CON_BUF_ADDR         0x2f000000
  76 #define CONFIG_SYS_SPL_MALLOC_START     0x2ff00000
  77 #define CONFIG_SPL_BSS_START_ADDR       0x2ff80000
  78 #else
  79 #define SDRAM_OFFSET(x) 0x4##x
  80 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  81 #define CONFIG_SYS_LOAD_ADDR            0x42000000 /* default load address */
  82 #define CONFIG_SYS_TEXT_BASE            0x4a000000
  83 #define CONFIG_PRE_CON_BUF_ADDR         0x4f000000
  84 #define CONFIG_SYS_SPL_MALLOC_START     0x4ff00000
  85 #define CONFIG_SPL_BSS_START_ADDR       0x4ff80000
  86 #endif
  87
  88 #define CONFIG_SPL_BSS_MAX_SIZE         0x00080000 /* 512 KiB */
  89 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x00080000 /* 512 KiB */
  90
  91 #ifdef CONFIG_MACH_SUN9I
  92 /*
  93  * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
  94  * slightly bigger. Note that it is possible to map the first 32 KiB of the
  95  * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
  96  * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
  97  * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
  98  */
  99 #define CONFIG_SYS_INIT_RAM_ADDR        0x10000
 100 #define CONFIG_SYS_INIT_RAM_SIZE        0x0a000 /* 40 KiB */
 101 #else
 102 #define CONFIG_SYS_INIT_RAM_ADDR        0x0
 103 #define CONFIG_SYS_INIT_RAM_SIZE        0x8000  /* 32 KiB */
 104 #endif
 105
 106 #define CONFIG_SYS_INIT_SP_OFFSET \
 107         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 108 #define CONFIG_SYS_INIT_SP_ADDR \
 109         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 110
 111 #define CONFIG_NR_DRAM_BANKS            1
 112 #define PHYS_SDRAM_0                    CONFIG_SYS_SDRAM_BASE
 113 #define PHYS_SDRAM_0_SIZE               0x80000000 /* 2 GiB */
 114
 115 #ifdef CONFIG_AHCI
 116 #define CONFIG_LIBATA
 117 #define CONFIG_SCSI_AHCI
 118 #define CONFIG_SCSI_AHCI_PLAT
 119 #define CONFIG_SUNXI_AHCI
 120 #define CONFIG_SYS_64BIT_LBA
 121 #define CONFIG_SYS_SCSI_MAX_SCSI_ID     1
 122 #define CONFIG_SYS_SCSI_MAX_LUN         1
 123 #define CONFIG_SYS_SCSI_MAX_DEVICE      (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
 124                                          CONFIG_SYS_SCSI_MAX_LUN)
 125 #define CONFIG_CMD_SCSI
 126 #endif
 127
 128 #define CONFIG_SETUP_MEMORY_TAGS
 129 #define CONFIG_CMDLINE_TAG
 130 #define CONFIG_INITRD_TAG
 131 #define CONFIG_SERIAL_TAG
 132
 133 #ifdef CONFIG_NAND_SUNXI
 134 #define CONFIG_SPL_NAND_SUPPORT 1
 135 #endif
 136
 137 /* mmc config */
 138 #if !defined(CONFIG_UART0_PORT_F)
 139 #define CONFIG_MMC
 140 #define CONFIG_GENERIC_MMC
 141 #define CONFIG_CMD_MMC
 142 #define CONFIG_MMC_SUNXI
 143 #define CONFIG_MMC_SUNXI_SLOT           0
 144 #define CONFIG_ENV_IS_IN_MMC
 145 #define CONFIG_SYS_MMC_ENV_DEV          0       /* first detected MMC controller */
 146 #endif
 147
 148 /* 64MB of malloc() pool */
 149 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (64 << 20))
 150
 151 /*
 152  * Miscellaneous configurable options
 153  */
 154 #define CONFIG_SYS_CBSIZE       1024    /* Console I/O Buffer Size */
 155 #define CONFIG_SYS_PBSIZE       1024    /* Print Buffer Size */
 156 #define CONFIG_SYS_MAXARGS      16      /* max number of command args */
 157 #define CONFIG_SYS_GENERIC_BOARD
 158
 159 /* Boot Argument Buffer Size */
 160 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 161
 162 /* standalone support */
 163 #define CONFIG_STANDALONE_LOAD_ADDR     CONFIG_SYS_LOAD_ADDR
 164
 165 /* baudrate */
 166 #define CONFIG_BAUDRATE                 115200
 167
 168 /* The stack sizes are set up in start.S using the settings below */
 169 #define CONFIG_STACKSIZE                (256 << 10)     /* 256 KiB */
 170
 171 /* FLASH and environment organization */
 172
 173 #define CONFIG_SYS_NO_FLASH
 174
 175 #define CONFIG_SYS_MONITOR_LEN          (768 << 10)     /* 768 KiB */
 176 #define CONFIG_IDENT_STRING             " Allwinner Technology"
 177
 178 #define CONFIG_ENV_OFFSET               (544 << 10) /* (8 + 24 + 512) KiB */
 179 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB */
 180
 181 #define CONFIG_FAT_WRITE        /* enable write access */
 182
 183 #define CONFIG_SPL_FRAMEWORK
 184 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 185 #define CONFIG_SPL_SERIAL_SUPPORT
 186 #define CONFIG_SPL_LIBGENERIC_SUPPORT
 187
 188 #define CONFIG_SPL_BOARD_LOAD_IMAGE
 189
 190 #define CONFIG_SPL_TEXT_BASE            0x20            /* sram start+header */
 191 #define CONFIG_SPL_MAX_SIZE             0x5fe0          /* 24KB on sun4i/sun7i */
 192
 193 #define CONFIG_SPL_LIBDISK_SUPPORT
 194
 195 #if !defined(CONFIG_UART0_PORT_F)
 196 #define CONFIG_SPL_MMC_SUPPORT
 197 #endif
 198
 199 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
 200
 201 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 80      /* 40KiB */
 202 #define CONFIG_SPL_PAD_TO               32768           /* decimal for 'dd' */
 203
 204 /* end of 32 KiB in sram */
 205 #define LOW_LEVEL_SRAM_STACK            0x00008000 /* End of sram */
 206 #define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
 207
 208 /* I2C */
 209 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER
 210 #define CONFIG_SPL_I2C_SUPPORT
 211 #endif
 212
 213 #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
 214     defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
 215     defined CONFIG_I2C4_ENABLE
 216 #define CONFIG_SYS_I2C
 217 #define CONFIG_SYS_I2C_MVTWSI
 218 #define CONFIG_SYS_I2C_SPEED            400000
 219 #define CONFIG_SYS_I2C_SLAVE            0x7f
 220 #define CONFIG_CMD_I2C
 221 #endif
 222
 223 #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
 224 #define CONFIG_SYS_I2C_SOFT
 225 #define CONFIG_SYS_I2C_SOFT_SPEED       50000
 226 #define CONFIG_SYS_I2C_SOFT_SLAVE       0x00
 227 /* We use pin names in Kconfig and sunxi_name_to_gpio() */
 228 #define CONFIG_SOFT_I2C_GPIO_SDA        soft_i2c_gpio_sda
 229 #define CONFIG_SOFT_I2C_GPIO_SCL        soft_i2c_gpio_scl
 230 #ifndef __ASSEMBLY__
 231 extern int soft_i2c_gpio_sda;
 232 extern int soft_i2c_gpio_scl;
 233 #endif
 234 #define CONFIG_VIDEO_LCD_I2C_BUS        0 /* The lcd panel soft i2c is bus 0 */
 235 #define CONFIG_SYS_SPD_BUS_NUM          1 /* And the axp209 i2c bus is bus 1 */
 236 #else
 237 #define CONFIG_SYS_SPD_BUS_NUM          0 /* The axp209 i2c bus is bus 0 */
 238 #define CONFIG_VIDEO_LCD_I2C_BUS        -1 /* NA, but necessary to compile */
 239 #endif
 240
 241 /* PMU */
 242 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || defined CONFIG_AXP221_POWER
 243 #define CONFIG_SPL_POWER_SUPPORT
 244 #endif
 245
 246 #ifndef CONFIG_CONS_INDEX
 247 #define CONFIG_CONS_INDEX              1       /* UART0 */
 248 #endif
 249
 250 #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
 251 #if CONFIG_CONS_INDEX == 1
 252 #ifdef CONFIG_MACH_SUN9I
 253 #define OF_STDOUT_PATH          "/soc/serial@07000000:115200"
 254 #else
 255 #define OF_STDOUT_PATH          "/soc@01c00000/serial@01c28000:115200"
 256 #endif
 257 #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
 258 #define OF_STDOUT_PATH          "/soc@01c00000/serial@01c28400:115200"
 259 #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
 260 #define OF_STDOUT_PATH          "/soc@01c00000/serial@01c28800:115200"
 261 #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
 262 #define OF_STDOUT_PATH          "/soc@01c00000/serial@01f02800:115200"
 263 #else
 264 #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
 265 #endif
 266 #endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */
 267
 268 /* GPIO */
 269 #define CONFIG_SUNXI_GPIO
 270 #define CONFIG_SPL_GPIO_SUPPORT
 271 #define CONFIG_CMD_GPIO
 272
 273 #ifdef CONFIG_VIDEO
 274 /*
 275  * The amount of RAM to keep free at the top of RAM when relocating u-boot,
 276  * to use as framebuffer. This must be a multiple of 4096.
 277  */
 278 #define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)
 279
 280 /* Do we want to initialize a simple FB? */
 281 #define CONFIG_VIDEO_DT_SIMPLEFB
 282
 283 #define CONFIG_VIDEO_SUNXI
 284
 285 #define CONFIG_CFB_CONSOLE
 286 #define CONFIG_VIDEO_SW_CURSOR
 287 #define CONFIG_VIDEO_LOGO
 288 #define CONFIG_VIDEO_STD_TIMINGS
 289 #define CONFIG_I2C_EDID
 290 #define VIDEO_LINE_LEN (pGD->plnSizeX)
 291
 292 /* allow both serial and cfb console. */
 293 #define CONFIG_CONSOLE_MUX
 294 /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
 295 #define CONFIG_VGA_AS_SINGLE_DEVICE
 296
 297 /* To be able to hook simplefb into dt */
 298 #ifdef CONFIG_VIDEO_DT_SIMPLEFB
 299 #define CONFIG_OF_BOARD_SETUP
 300 #endif
 301
 302 #endif /* CONFIG_VIDEO */
 303
 304 /* Ethernet support */
 305 #ifdef CONFIG_SUNXI_EMAC
 306 #define CONFIG_PHY_ADDR         1
 307 #define CONFIG_MII                      /* MII PHY management           */
 308 #define CONFIG_PHYLIB
 309 #endif
 310
 311 #ifdef CONFIG_SUNXI_GMAC
 312 #define CONFIG_DW_AUTONEG
 313 #define CONFIG_PHY_GIGE                 /* GMAC can use gigabit PHY     */
 314 #define CONFIG_PHY_ADDR         1
 315 #define CONFIG_MII                      /* MII PHY management           */
 316 #define CONFIG_PHYLIB
 317 #endif
 318
 319 #ifdef CONFIG_USB_EHCI_HCD
 320 #define CONFIG_USB_OHCI_NEW
 321 #define CONFIG_USB_OHCI_SUNXI
 322 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
 323 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
 324 #endif
 325
 326 #ifdef CONFIG_USB_MUSB_SUNXI
 327 #define CONFIG_USB_MUSB_PIO_ONLY
 328 #endif
 329
 330 #ifdef CONFIG_USB_MUSB_GADGET
 331 #define CONFIG_USB_GADGET
 332 #define CONFIG_USB_GADGET_DUALSPEED
 333 #define CONFIG_USB_GADGET_VBUS_DRAW     0
 334
 335 #define CONFIG_USB_GADGET_DOWNLOAD
 336 #define CONFIG_USB_FUNCTION_FASTBOOT
 337 #define CONFIG_USB_FUNCTION_MASS_STORAGE
 338 #endif
 339
 340 #ifdef CONFIG_USB_GADGET_DOWNLOAD
 341 #define CONFIG_G_DNL_VENDOR_NUM         0x1f3a
 342 #define CONFIG_G_DNL_PRODUCT_NUM        0x1010
 343 #define CONFIG_G_DNL_MANUFACTURER       "Allwinner Technology"
 344 #endif
 345
 346 #ifdef CONFIG_USB_FUNCTION_FASTBOOT
 347 #define CONFIG_CMD_FASTBOOT
 348 #define CONFIG_FASTBOOT_BUF_ADDR        CONFIG_SYS_LOAD_ADDR
 349 #define CONFIG_FASTBOOT_BUF_SIZE        0x2000000
 350
 351 #define CONFIG_FASTBOOT_FLASH
 352 #define CONFIG_FASTBOOT_FLASH_MMC_DEV   0
 353 #define CONFIG_EFI_PARTITION
 354 #endif
 355
 356 #ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
 357 #define CONFIG_CMD_USB_MASS_STORAGE
 358 #endif
 359
 360 #ifdef CONFIG_USB_KEYBOARD
 361 #define CONFIG_CONSOLE_MUX
 362 #define CONFIG_PREBOOT
 363 #define CONFIG_SYS_STDIO_DEREGISTER
 364 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
 365 #endif
 366
 367 #if !defined CONFIG_ENV_IS_IN_MMC && \
 368     !defined CONFIG_ENV_IS_IN_NAND && \
 369     !defined CONFIG_ENV_IS_IN_FAT && \
 370     !defined CONFIG_ENV_IS_IN_SPI_FLASH
 371 #define CONFIG_ENV_IS_NOWHERE
 372 #endif
 373
 374 #define CONFIG_MISC_INIT_R
 375 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
 376
 377 #ifndef CONFIG_SPL_BUILD
 378 #include <config_distro_defaults.h>
 379
 380 /* Enable pre-console buffer to get complete log on the VGA console */
 381 #define CONFIG_PRE_CONSOLE_BUFFER
 382 #define CONFIG_PRE_CON_BUF_SZ           4096 /* Aprox 2 80*25 screens */
 383
 384 /*
 385  * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
 386  * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
 387  * 1M script, 1M pxe and the ramdisk at the end.
 388  */
 389 #define MEM_LAYOUT_ENV_SETTINGS \
 390         "bootm_size=0xa000000\0" \
 391         "kernel_addr_r=" __stringify(SDRAM_OFFSET(2000000)) "\0" \
 392         "fdt_addr_r=" __stringify(SDRAM_OFFSET(3000000)) "\0" \
 393         "scriptaddr=" __stringify(SDRAM_OFFSET(3100000)) "\0" \
 394         "pxefile_addr_r=" __stringify(SDRAM_OFFSET(3200000)) "\0" \
 395         "ramdisk_addr_r=" __stringify(SDRAM_OFFSET(3300000)) "\0"
 396
 397 #ifdef CONFIG_MMC
 398 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
 399 #else
 400 #define BOOT_TARGET_DEVICES_MMC(func)
 401 #endif
 402
 403 #ifdef CONFIG_AHCI
 404 #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
 405 #else
 406 #define BOOT_TARGET_DEVICES_SCSI(func)
 407 #endif
 408
 409 #ifdef CONFIG_USB_STORAGE
 410 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
 411 #else
 412 #define BOOT_TARGET_DEVICES_USB(func)
 413 #endif
 414
 415 /* FEL boot support, auto-execute boot.scr if a script address was provided */
 416 #define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
 417         "bootcmd_fel=" \
 418                 "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
 419                         "echo '(FEL boot)'; " \
 420                         "source ${fel_scriptaddr}; " \
 421                 "fi\0"
 422 #define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
 423         "fel "
 424
 425 #define BOOT_TARGET_DEVICES(func) \
 426         func(FEL, fel, na) \
 427         BOOT_TARGET_DEVICES_MMC(func) \
 428         BOOT_TARGET_DEVICES_SCSI(func) \
 429         BOOT_TARGET_DEVICES_USB(func) \
 430         func(PXE, pxe, na) \
 431         func(DHCP, dhcp, na)
 432
 433 #include <config_distro_bootcmd.h>
 434
 435 #ifdef CONFIG_USB_KEYBOARD
 436 #define CONSOLE_STDIN_SETTINGS \
 437         "preboot=usb start\0" \
 438         "stdin=serial,usbkbd\0"
 439 #else
 440 #define CONSOLE_STDIN_SETTINGS \
 441         "stdin=serial\0"
 442 #endif
 443
 444 #ifdef CONFIG_VIDEO
 445 #define CONSOLE_STDOUT_SETTINGS \
 446         "stdout=serial,vga\0" \
 447         "stderr=serial,vga\0"
 448 #else
 449 #define CONSOLE_STDOUT_SETTINGS \
 450         "stdout=serial\0" \
 451         "stderr=serial\0"
 452 #endif
 453
 454 #define CONSOLE_ENV_SETTINGS \
 455         CONSOLE_STDIN_SETTINGS \
 456         CONSOLE_STDOUT_SETTINGS
 457
 458 #define CONFIG_EXTRA_ENV_SETTINGS \
 459         CONSOLE_ENV_SETTINGS \
 460         MEM_LAYOUT_ENV_SETTINGS \
 461         "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
 462         "console=ttyS0,115200\0" \
 463         BOOTENV
 464
 465 #else /* ifndef CONFIG_SPL_BUILD */
 466 #define CONFIG_EXTRA_ENV_SETTINGS
 467 #endif
 468
 469 #endif /* _SUNXI_COMMON_CONFIG_H */