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1 /*
2 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3 *
4 * (C) Copyright 2007-2011
5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6 * Tom Cubie <tangliang@allwinnertech.com>
7 *
8 * Configuration settings for the Allwinner sunxi series of boards.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13 #ifndef _SUNXI_COMMON_CONFIG_H
14 #define _SUNXI_COMMON_CONFIG_H
15
16 #include <asm/arch/cpu.h>
17 #include <linux/stringify.h>
18
19 #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
20 /*
21 * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
22 * expense of restricting some features, so the regular machine id values can
23 * be used.
24 */
25 # define CONFIG_MACH_TYPE_COMPAT_REV 0
26 #else
27 /*
28 * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
29 * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
30 * beyond the machine id check.
31 */
32 # define CONFIG_MACH_TYPE_COMPAT_REV 1
33 #endif
34
35 #ifdef CONFIG_ARM64
36 #define CONFIG_BUILD_TARGET "u-boot.itb"
37 #endif
38
39 /* Serial & console */
40 #define CONFIG_SYS_NS16550_SERIAL
41 /* ns16550 reg in the low bits of cpu reg */
42 #define CONFIG_SYS_NS16550_CLK 24000000
43 #ifndef CONFIG_DM_SERIAL
44 # define CONFIG_SYS_NS16550_REG_SIZE -4
45 # define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
46 # define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
47 # define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
48 # define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
49 # define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
50 #endif
51
52 /* CPU */
53 #define COUNTER_FREQUENCY 24000000
54
55 /*
56 * The DRAM Base differs between some models. We cannot use macros for the
57 * CONFIG_FOO defines which contain the DRAM base address since they end
58 * up unexpanded in include/autoconf.mk .
59 *
60 * So we have to have this #ifdef #else #endif block for these.
61 */
62 #ifdef CONFIG_MACH_SUN9I
63 #define SDRAM_OFFSET(x) 0x2##x
64 #define CONFIG_SYS_SDRAM_BASE 0x20000000
65 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */
66 #define CONFIG_SYS_TEXT_BASE 0x2a000000
67 /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
68 * since it needs to fit in with the other values. By also #defining it
69 * we get warnings if the Kconfig value mismatches. */
70 #define CONFIG_SPL_STACK_R_ADDR 0x2fe00000
71 #define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
72 #else
73 #define SDRAM_OFFSET(x) 0x4##x
74 #define CONFIG_SYS_SDRAM_BASE 0x40000000
75 #define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
76 /* V3s do not have enough memory to place code at 0x4a000000 */
77 #ifndef CONFIG_MACH_SUN8I_V3S
78 #define CONFIG_SYS_TEXT_BASE 0x4a000000
79 #else
80 #define CONFIG_SYS_TEXT_BASE 0x42e00000
81 #endif
82 /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
83 * since it needs to fit in with the other values. By also #defining it
84 * we get warnings if the Kconfig value mismatches. */
85 #define CONFIG_SPL_STACK_R_ADDR 0x4fe00000
86 #define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
87 #endif
88
89 #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
90
91 #ifdef CONFIG_SUNXI_HIGH_SRAM
92 /*
93 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
94 * slightly bigger. Note that it is possible to map the first 32 KiB of the
95 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
96 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
97 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
98 */
99 #define CONFIG_SYS_INIT_RAM_ADDR 0x10000
100 #define CONFIG_SYS_INIT_RAM_SIZE 0x08000 /* FIXME: 40 KiB ? */
101 #else
102 #define CONFIG_SYS_INIT_RAM_ADDR 0x0
103 #define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
104 #endif
105
106 #define CONFIG_SYS_INIT_SP_OFFSET \
107 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
108 #define CONFIG_SYS_INIT_SP_ADDR \
109 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
110
111 #define CONFIG_NR_DRAM_BANKS 1
112 #define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
113 #define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
114
115 #ifdef CONFIG_AHCI
116 #define CONFIG_LIBATA
117 #define CONFIG_SCSI_AHCI
118 #define CONFIG_SCSI_AHCI_PLAT
119 #define CONFIG_SUNXI_AHCI
120 #define CONFIG_SYS_64BIT_LBA
121 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
122 #define CONFIG_SYS_SCSI_MAX_LUN 1
123 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
124 CONFIG_SYS_SCSI_MAX_LUN)
125 #define CONFIG_SCSI
126 #endif
127
128 #define CONFIG_SETUP_MEMORY_TAGS
129 #define CONFIG_CMDLINE_TAG
130 #define CONFIG_INITRD_TAG
131 #define CONFIG_SERIAL_TAG
132
133 #ifdef CONFIG_NAND_SUNXI
134 #define CONFIG_SYS_NAND_MAX_ECCPOS 1664
135 #define CONFIG_SYS_NAND_ONFI_DETECTION
136 #define CONFIG_SYS_MAX_NAND_DEVICE 8
137
138 #define CONFIG_MTD_DEVICE
139 #define CONFIG_MTD_PARTITIONS
140 #endif
141
142 #ifdef CONFIG_SPL_SPI_SUNXI
143 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
144 #endif
145
146 /* mmc config */
147 #ifdef CONFIG_MMC
148 #define CONFIG_MMC_SUNXI_SLOT 0
149 #endif
150
151 #if defined(CONFIG_ENV_IS_IN_MMC)
152 #define CONFIG_SYS_MMC_ENV_DEV 0 /* first detected MMC controller */
153 #define CONFIG_SYS_MMC_MAX_DEVICE 4
154 #elif defined(CONFIG_ENV_IS_NOWHERE)
155 #define CONFIG_ENV_SIZE (128 << 10)
156 #endif
157
158 #ifndef CONFIG_MACH_SUN8I_V3S
159 /* 64MB of malloc() pool */
160 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20))
161 #else
162 /* 2MB of malloc() pool */
163 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (2 << 20))
164 #endif
165
166 /*
167 * Miscellaneous configurable options
168 */
169 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
170 #define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
171 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
172
173 /* Boot Argument Buffer Size */
174 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
175
176 /* standalone support */
177 #define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
178
179 /* FLASH and environment organization */
180
181 #define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
182
183 #define CONFIG_FAT_WRITE /* enable write access */
184
185 #define CONFIG_SPL_FRAMEWORK
186
187 #ifndef CONFIG_ARM64 /* AArch64 FEL support is not ready yet */
188 #define CONFIG_SPL_BOARD_LOAD_IMAGE
189 #endif
190
191 #ifdef CONFIG_SUNXI_HIGH_SRAM
192 #define CONFIG_SPL_TEXT_BASE 0x10060 /* sram start+header */
193 #define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */
194 #ifdef CONFIG_ARM64
195 /* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
196 #define LOW_LEVEL_SRAM_STACK 0x00054000
197 #else
198 #define LOW_LEVEL_SRAM_STACK 0x00018000
199 #endif /* !CONFIG_ARM64 */
200 #else
201 #define CONFIG_SPL_TEXT_BASE 0x60 /* sram start+header */
202 #define CONFIG_SPL_MAX_SIZE 0x5fa0 /* 24KB on sun4i/sun7i */
203 #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
204 #endif
205
206 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
207
208 #ifndef CONFIG_ARM64
209 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
210 #endif
211
212 #define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
213
214
215 /* I2C */
216 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
217 defined CONFIG_SY8106A_POWER
218 #endif
219
220 #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
221 defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
222 defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
223 #define CONFIG_SYS_I2C_MVTWSI
224 #ifndef CONFIG_DM_I2C
225 #define CONFIG_SYS_I2C
226 #define CONFIG_SYS_I2C_SPEED 400000
227 #define CONFIG_SYS_I2C_SLAVE 0x7f
228 #endif
229 #endif
230
231 #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
232 #define CONFIG_SYS_I2C_SOFT
233 #define CONFIG_SYS_I2C_SOFT_SPEED 50000
234 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
235 /* We use pin names in Kconfig and sunxi_name_to_gpio() */
236 #define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda
237 #define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl
238 #ifndef __ASSEMBLY__
239 extern int soft_i2c_gpio_sda;
240 extern int soft_i2c_gpio_scl;
241 #endif
242 #define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */
243 #define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */
244 #else
245 #define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */
246 #define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */
247 #endif
248
249 /* PMU */
250 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
251 defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \
252 defined CONFIG_SY8106A_POWER
253 #endif
254
255 #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
256 #if CONFIG_CONS_INDEX == 1
257 #ifdef CONFIG_MACH_SUN9I
258 #define OF_STDOUT_PATH "/soc/serial@07000000:115200"
259 #else
260 #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200"
261 #endif
262 #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
263 #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200"
264 #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
265 #define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200"
266 #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
267 #define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200"
268 #else
269 #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
270 #endif
271 #endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */
272
273 /* GPIO */
274 #define CONFIG_SUNXI_GPIO
275
276 #ifdef CONFIG_VIDEO
277 /*
278 * The amount of RAM to keep free at the top of RAM when relocating u-boot,
279 * to use as framebuffer. This must be a multiple of 4096.
280 */
281 #define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)
282
283 /* Do we want to initialize a simple FB? */
284 #define CONFIG_VIDEO_DT_SIMPLEFB
285
286 #define CONFIG_VIDEO_SUNXI
287
288 #define CONFIG_VIDEO_LOGO
289 #define CONFIG_VIDEO_STD_TIMINGS
290 #define CONFIG_I2C_EDID
291 #define VIDEO_LINE_LEN (pGD->plnSizeX)
292
293 /* allow both serial and cfb console. */
294 /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
295
296 #endif /* CONFIG_VIDEO */
297
298 /* Ethernet support */
299 #ifdef CONFIG_SUNXI_EMAC
300 #define CONFIG_PHY_ADDR 1
301 #define CONFIG_MII /* MII PHY management */
302 #define CONFIG_PHYLIB
303 #endif
304
305 #ifdef CONFIG_SUNXI_GMAC
306 #define CONFIG_PHY_GIGE /* GMAC can use gigabit PHY */
307 #define CONFIG_PHY_ADDR 1
308 #define CONFIG_MII /* MII PHY management */
309 #define CONFIG_PHY_REALTEK
310 #endif
311
312 #ifdef CONFIG_USB_EHCI_HCD
313 #define CONFIG_USB_OHCI_NEW
314 #define CONFIG_USB_OHCI_SUNXI
315 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
316 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
317 #endif
318
319 #ifdef CONFIG_USB_MUSB_SUNXI
320 #define CONFIG_USB_MUSB_PIO_ONLY
321 #endif
322
323 #ifdef CONFIG_USB_MUSB_GADGET
324 #define CONFIG_USB_FUNCTION_FASTBOOT
325 #define CONFIG_USB_FUNCTION_MASS_STORAGE
326 #endif
327
328 #ifdef CONFIG_USB_FUNCTION_FASTBOOT
329 #define CONFIG_CMD_FASTBOOT
330 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR
331 #define CONFIG_FASTBOOT_BUF_SIZE 0x2000000
332 #define CONFIG_ANDROID_BOOT_IMAGE
333
334 #define CONFIG_FASTBOOT_FLASH
335
336 #ifdef CONFIG_MMC
337 #define CONFIG_FASTBOOT_FLASH_MMC_DEV 0
338 #endif
339 #endif
340
341 #ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
342 #endif
343
344 #ifdef CONFIG_USB_KEYBOARD
345 #define CONFIG_PREBOOT
346 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
347 #endif
348
349 #define CONFIG_MISC_INIT_R
350
351 #ifndef CONFIG_SPL_BUILD
352 #include <config_distro_defaults.h>
353
354 #ifdef CONFIG_ARM64
355 /*
356 * Boards seem to come with at least 512MB of DRAM.
357 * The kernel should go at 512K, which is the default text offset (that will
358 * be adjusted at runtime if needed).
359 * There is no compression for arm64 kernels (yet), so leave some space
360 * for really big kernels, say 256MB for now.
361 * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
362 * Align the initrd to a 2MB page.
363 */
364 #define BOOTM_SIZE __stringify(0xa000000)
365 #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
366 #define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
367 #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
368 #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000))
369 #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FE00000))
370
371 #else
372 /*
373 * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
374 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
375 * 1M script, 1M pxe and the ramdisk at the end.
376 */
377 #ifndef CONFIG_MACH_SUN8I_V3S
378 #define BOOTM_SIZE __stringify(0xa000000)
379 #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
380 #define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
381 #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
382 #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
383 #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
384 #else
385 /*
386 * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
387 * 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
388 * 1M script, 1M pxe and the ramdisk at the end.
389 */
390 #define BOOTM_SIZE __stringify(0x2e00000)
391 #define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
392 #define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000))
393 #define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000))
394 #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
395 #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
396 #endif
397 #endif
398
399 #define MEM_LAYOUT_ENV_SETTINGS \
400 "bootm_size=" BOOTM_SIZE "\0" \
401 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
402 "fdt_addr_r=" FDT_ADDR_R "\0" \
403 "scriptaddr=" SCRIPT_ADDR_R "\0" \
404 "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
405 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
406
407 #define DFU_ALT_INFO_RAM \
408 "dfu_alt_info_ram=" \
409 "kernel ram " KERNEL_ADDR_R " 0x1000000;" \
410 "fdt ram " FDT_ADDR_R " 0x100000;" \
411 "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
412
413 #ifdef CONFIG_MMC
414 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
415 #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
416 #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1)
417 #else
418 #define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
419 #endif
420 #else
421 #define BOOT_TARGET_DEVICES_MMC(func)
422 #define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
423 #endif
424
425 #ifdef CONFIG_AHCI
426 #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
427 #else
428 #define BOOT_TARGET_DEVICES_SCSI(func)
429 #endif
430
431 #ifdef CONFIG_USB_STORAGE
432 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
433 #else
434 #define BOOT_TARGET_DEVICES_USB(func)
435 #endif
436
437 /* FEL boot support, auto-execute boot.scr if a script address was provided */
438 #define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
439 "bootcmd_fel=" \
440 "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
441 "echo '(FEL boot)'; " \
442 "source ${fel_scriptaddr}; " \
443 "fi\0"
444 #define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
445 "fel "
446
447 #define BOOT_TARGET_DEVICES(func) \
448 func(FEL, fel, na) \
449 BOOT_TARGET_DEVICES_MMC(func) \
450 BOOT_TARGET_DEVICES_MMC_EXTRA(func) \
451 BOOT_TARGET_DEVICES_SCSI(func) \
452 BOOT_TARGET_DEVICES_USB(func) \
453 func(PXE, pxe, na) \
454 func(DHCP, dhcp, na)
455
456 #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
457 #define BOOTCMD_SUNXI_COMPAT \
458 "bootcmd_sunxi_compat=" \
459 "setenv root /dev/mmcblk0p3 rootwait; " \
460 "if ext2load mmc 0 0x44000000 uEnv.txt; then " \
461 "echo Loaded environment from uEnv.txt; " \
462 "env import -t 0x44000000 ${filesize}; " \
463 "fi; " \
464 "setenv bootargs console=${console} root=${root} ${extraargs}; " \
465 "ext2load mmc 0 0x43000000 script.bin && " \
466 "ext2load mmc 0 0x48000000 uImage && " \
467 "bootm 0x48000000\0"
468 #else
469 #define BOOTCMD_SUNXI_COMPAT
470 #endif
471
472 #include <config_distro_bootcmd.h>
473
474 #ifdef CONFIG_USB_KEYBOARD
475 #define CONSOLE_STDIN_SETTINGS \
476 "preboot=usb start\0" \
477 "stdin=serial,usbkbd\0"
478 #else
479 #define CONSOLE_STDIN_SETTINGS \
480 "stdin=serial\0"
481 #endif
482
483 #ifdef CONFIG_VIDEO
484 #define CONSOLE_STDOUT_SETTINGS \
485 "stdout=serial,vga\0" \
486 "stderr=serial,vga\0"
487 #elif CONFIG_DM_VIDEO
488 #define CONFIG_SYS_WHITE_ON_BLACK
489 #define CONSOLE_STDOUT_SETTINGS \
490 "stdout=serial,vidconsole\0" \
491 "stderr=serial,vidconsole\0"
492 #else
493 #define CONSOLE_STDOUT_SETTINGS \
494 "stdout=serial\0" \
495 "stderr=serial\0"
496 #endif
497
498 #ifdef CONFIG_MTDIDS_DEFAULT
499 #define SUNXI_MTDIDS_DEFAULT \
500 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0"
501 #else
502 #define SUNXI_MTDIDS_DEFAULT
503 #endif
504
505 #ifdef CONFIG_MTDPARTS_DEFAULT
506 #define SUNXI_MTDPARTS_DEFAULT \
507 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
508 #else
509 #define SUNXI_MTDPARTS_DEFAULT
510 #endif
511
512 #define CONSOLE_ENV_SETTINGS \
513 CONSOLE_STDIN_SETTINGS \
514 CONSOLE_STDOUT_SETTINGS
515
516 #ifdef CONFIG_ARM64
517 #define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
518 #else
519 #define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
520 #endif
521
522 #define CONFIG_EXTRA_ENV_SETTINGS \
523 CONSOLE_ENV_SETTINGS \
524 MEM_LAYOUT_ENV_SETTINGS \
525 DFU_ALT_INFO_RAM \
526 "fdtfile=" FDTFILE "\0" \
527 "console=ttyS0,115200\0" \
528 SUNXI_MTDIDS_DEFAULT \
529 SUNXI_MTDPARTS_DEFAULT \
530 BOOTCMD_SUNXI_COMPAT \
531 BOOTENV
532
533 #else /* ifndef CONFIG_SPL_BUILD */
534 #define CONFIG_EXTRA_ENV_SETTINGS
535 #endif
536
537 #endif /* _SUNXI_COMMON_CONFIG_H */