include/configs/tam3517-common.h

   1 /*
   2  * Copyright (C) 2011
   3  * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
   4  *
   5  * Copyright (C) 2009 TechNexion Ltd.
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef __TAM3517_H
  11 #define __TAM3517_H
  12
  13 /*
  14  * High Level Configuration Options
  15  */
  16
  17 #include <asm/arch/cpu.h>               /* get chip and board defs */
  18 #include <asm/arch/omap.h>
  19
  20 /* Clock Defines */
  21 #define V_OSCK                  26000000        /* Clock output from T2 */
  22 #define V_SCLK                  (V_OSCK >> 1)
  23
  24 #define CONFIG_MISC_INIT_R
  25
  26 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
  27 #define CONFIG_SETUP_MEMORY_TAGS
  28 #define CONFIG_INITRD_TAG
  29 #define CONFIG_REVISION_TAG
  30
  31 /*
  32  * Size of malloc() pool
  33  */
  34 #define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB sector */
  35 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10) + \
  36                                         2 * 1024 * 1024)
  37 /*
  38  * DDR related
  39  */
  40 #define CONFIG_SYS_CS0_SIZE             (256 * 1024 * 1024)
  41
  42 /*
  43  * Hardware drivers
  44  */
  45
  46 /*
  47  * NS16550 Configuration
  48  */
  49 #define CONFIG_SYS_NS16550_SERIAL
  50 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  51 #define CONFIG_SYS_NS16550_CLK          48000000        /* 48MHz (APLL96/2) */
  52
  53 /*
  54  * select serial console configuration
  55  */
  56 #define CONFIG_CONS_INDEX               1
  57 #define CONFIG_SYS_NS16550_COM1         OMAP34XX_UART1
  58 #define CONFIG_SERIAL1                  /* UART1 */
  59
  60 /* allow to overwrite serial and ethaddr */
  61 #define CONFIG_ENV_OVERWRITE
  62 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  63                                         115200}
  64 /* EHCI */
  65 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO        25
  66
  67 #define CONFIG_SYS_I2C
  68 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50            /* base address */
  69 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1               /* bytes of address */
  70 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW     0x07
  71
  72 /*
  73  * Board NAND Info.
  74  */
  75 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
  76                                                         /* to access */
  77                                                         /* nand at CS0 */
  78
  79 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of */
  80                                                         /* NAND devices */
  81
  82 /*
  83  * Miscellaneous configurable options
  84  */
  85 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
  86
  87 #define CONFIG_SYS_MAXARGS              32      /* max number of command */
  88                                                 /* args */
  89 /* memtest works on */
  90 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)
  91 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
  92                                         0x01F00000) /* 31MB */
  93
  94 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0) /* default load */
  95                                                                 /* address */
  96
  97 /*
  98  * AM3517 has 12 GP timers, they can be driven by the system clock
  99  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 100  * This rate is divided by a local divisor.
 101  */
 102 #define CONFIG_SYS_TIMERBASE            OMAP34XX_GPT2
 103 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 104
 105 /*
 106  * Physical Memory Map
 107  */
 108 #define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 109 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 110 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 111
 112 /*
 113  * FLASH and environment organization
 114  */
 115
 116 /* **** PISMO SUPPORT *** */
 117
 118 /* Redundant Environment */
 119 #define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 120 #define CONFIG_ENV_OFFSET               0x180000
 121 #define CONFIG_ENV_ADDR                 0x180000
 122 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + \
 123                                                 2 * CONFIG_SYS_ENV_SECT_SIZE)
 124 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
 125
 126 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 127 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 128 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 129 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 130                                          CONFIG_SYS_INIT_RAM_SIZE - \
 131                                          GENERATED_GBL_DATA_SIZE)
 132
 133 /*
 134  * ethernet support, EMAC
 135  *
 136  */
 137 #define CONFIG_DRIVER_TI_EMAC
 138 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
 139 #define CONFIG_MII
 140 #define CONFIG_BOOTP_DNS2
 141 #define CONFIG_BOOTP_SEND_HOSTNAME
 142 #define CONFIG_NET_RETRY_COUNT 10
 143
 144 /* Defines for SPL */
 145 #define CONFIG_SPL_CONSOLE
 146 #define CONFIG_SPL_NAND_SOFTECC
 147 #define CONFIG_SPL_NAND_WORKSPACE       0x8f07f000 /* below BSS */
 148
 149 #define CONFIG_SPL_NAND_BASE
 150 #define CONFIG_SPL_NAND_DRIVERS
 151 #define CONFIG_SPL_NAND_ECC
 152
 153 #define CONFIG_SPL_TEXT_BASE            0x40200000 /*CONFIG_SYS_SRAM_START*/
 154 #define CONFIG_SPL_MAX_SIZE             (SRAM_SCRATCH_SPACE_ADDR - \
 155                                          CONFIG_SPL_TEXT_BASE)
 156 #define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
 157
 158 #define CONFIG_SYS_SPL_MALLOC_START     0x8f000000
 159 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
 160 #define CONFIG_SPL_BSS_START_ADDR       0x8f080000 /* end of RAM */
 161 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 162
 163 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
 164 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME         "u-boot.img"
 165
 166 /* FAT */
 167 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME          "uImage"
 168 #define CONFIG_SPL_FS_LOAD_ARGS_NAME            "args"
 169
 170 /* RAW SD card / eMMC */
 171 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900   /* address 0x120000 */
 172 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR   0x80    /* address 0x10000 */
 173 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS  0x80    /* 64KiB */
 174
 175 /* NAND boot config */
 176 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 177 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 178 #define CONFIG_SYS_NAND_OOBSIZE         64
 179 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
 180 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 181 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
 182 #define CONFIG_SYS_NAND_ECCPOS          {40, 41, 42, 43, 44, 45, 46, 47,\
 183                                          48, 49, 50, 51, 52, 53, 54, 55,\
 184                                          56, 57, 58, 59, 60, 61, 62, 63}
 185 #define CONFIG_SYS_NAND_ECCSIZE         256
 186 #define CONFIG_SYS_NAND_ECCBYTES        3
 187 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_HAM1_CODE_SW
 188
 189 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 190
 191 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
 192 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x80000
 193
 194 #define CONFIG_MTD_PARTITIONS
 195 #define CONFIG_MTD_DEVICE
 196
 197 /* Setup MTD for NAND on the SOM */
 198
 199 #define CONFIG_TAM3517_SETTINGS                                         \
 200         "netdev=eth0\0"                                                 \
 201         "nandargs=setenv bootargs root=${nandroot} "                    \
 202                 "rootfstype=${nandrootfstype}\0"                        \
 203         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 204                 "nfsroot=${serverip}:${rootpath}\0"                     \
 205         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 206         "addip_sta=setenv bootargs ${bootargs} "                        \
 207                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 208                 ":${hostname}:${netdev}:off panic=1\0"                  \
 209         "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"               \
 210         "addip=if test -n ${ipdyn};then run addip_dyn;"                 \
 211                 "else run addip_sta;fi\0"                               \
 212         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
 213         "addtty=setenv bootargs ${bootargs}"                            \
 214                 " console=ttyO0,${baudrate}\0"                          \
 215         "addmisc=setenv bootargs ${bootargs} ${misc}\0"                 \
 216         "loadaddr=82000000\0"                                           \
 217         "kernel_addr_r=82000000\0"                                      \
 218         "hostname=" __stringify(CONFIG_HOSTNAME) "\0"                   \
 219         "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"            \
 220         "flash_self=run ramargs addip addtty addmtd addmisc;"           \
 221                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
 222         "flash_nfs=run nfsargs addip addtty addmtd addmisc;"            \
 223                 "bootm ${kernel_addr}\0"                                \
 224         "nandboot=run nandargs addip addtty addmtd addmisc;"            \
 225                 "nand read ${kernel_addr_r} kernel\0"                   \
 226                 "bootm ${kernel_addr_r}\0"                              \
 227         "net_nfs=tftp ${kernel_addr_r} ${bootfile}; "                   \
 228                 "run nfsargs addip addtty addmtd addmisc;"              \
 229                 "bootm ${kernel_addr_r}\0"                              \
 230         "net_self=if run net_self_load;then "                           \
 231                 "run ramargs addip addtty addmtd addmisc;"              \
 232                 "bootm ${kernel_addr_r} ${ramdisk_addr_r};"             \
 233                 "else echo Images not loades;fi\0"                      \
 234         "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0"          \
 235         "load=tftp ${loadaddr} ${u-boot}\0"                             \
 236         "loadmlo=tftp ${loadaddr} ${mlo}\0"                             \
 237         "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0"                    \
 238         "uboot_addr=0x80000\0"                                          \
 239         "update=nandecc sw;nand erase ${uboot_addr} 100000;"            \
 240                 "nand write ${loadaddr} ${uboot_addr} 80000\0"          \
 241         "updatemlo=nandecc hw;nand erase 0 20000;"                      \
 242                 "nand write ${loadaddr} 0 20000\0"                      \
 243         "upd=if run load;then echo Updating u-boot;if run update;"      \
 244                 "then echo U-Boot updated;"                             \
 245                         "else echo Error updating u-boot !;"            \
 246                         "echo Board without bootloader !!;"             \
 247                 "fi;"                                                   \
 248                 "else echo U-Boot not downloaded..exiting;fi\0"         \
 249
 250 /*
 251  * this is common code for all TAM3517 boards.
 252  * MAC address is stored from manufacturer in
 253  * I2C EEPROM
 254  */
 255 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
 256 /*
 257  * The I2C EEPROM on the TAM3517 contains
 258  * mac address and production data
 259  */
 260 struct tam3517_module_info {
 261         char customer[48];
 262         char product[48];
 263
 264         /*
 265          * bit 0~47  : sequence number
 266          * bit 48~55 : week of year, from 0.
 267          * bit 56~63 : year
 268          */
 269         unsigned long long sequence_number;
 270
 271         /*
 272          * bit 0~7   : revision fixed
 273          * bit 8~15  : revision major
 274          * bit 16~31 : TNxxx
 275          */
 276         unsigned int revision;
 277         unsigned char eth_addr[4][8];
 278         unsigned char _rev[100];
 279 };
 280
 281 #define TAM3517_READ_EEPROM(info, ret) \
 282 do {                                                            \
 283         i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \
 284         if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,          \
 285                 (void *)info, sizeof(*info)))                   \
 286                 ret = 1;                                        \
 287         else                                                    \
 288                 ret = 0;                                        \
 289 } while (0)
 290
 291 #define TAM3517_READ_MAC_FROM_EEPROM(info)                      \
 292 do {                                                            \
 293         char buf[80], ethname[20];                              \
 294         int i;                                                  \
 295         memset(buf, 0, sizeof(buf));                            \
 296         for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) {   \
 297                 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X",   \
 298                         (info)->eth_addr[i][5],                 \
 299                         (info)->eth_addr[i][4],                 \
 300                         (info)->eth_addr[i][3],                 \
 301                         (info)->eth_addr[i][2],                 \
 302                         (info)->eth_addr[i][1],                 \
 303                         (info)->eth_addr[i][0]);                        \
 304                                                                 \
 305                 if (i)                                          \
 306                         sprintf(ethname, "eth%daddr", i);       \
 307                 else                                            \
 308                         strcpy(ethname, "ethaddr");             \
 309                 printf("Setting %s from EEPROM with %s\n", ethname, buf);\
 310                 env_set(ethname, buf);                          \
 311         }                                                       \
 312 } while (0)
 313
 314 /* The following macros are taken from Technexion's documentation */
 315 #define TAM3517_sequence_number(info) \
 316         ((info)->sequence_number % 0x1000000000000LL)
 317 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100)
 318 #define TAM3517_year(info) ((info)->sequence_number >> 56)
 319 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100)
 320 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100)
 321 #define TAM3517_revision_tn(info) ((info)->revision >> 16)
 322
 323 #define TAM3517_PRINT_SOM_INFO(info)                            \
 324 do {                                                            \
 325         printf("Vendor:%s\n", (info)->customer);                \
 326         printf("SOM:   %s\n", (info)->product);                 \
 327         printf("SeqNr: %02llu%02llu%012llu\n",                  \
 328                 TAM3517_year(info),                             \
 329                 TAM3517_week_of_year(info),                     \
 330                 TAM3517_sequence_number(info));                 \
 331         printf("Rev:   TN%u %u.%u\n",                           \
 332                 TAM3517_revision_tn(info),                      \
 333                 TAM3517_revision_major(info),                   \
 334                 TAM3517_revision_fixed(info));                  \
 335 } while (0)
 336
 337 #endif
 338
 339 #endif /* __TAM3517_H */