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Convert CONFIG_SPL_I2C_SUPPORT to Kconfig
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1 /*
2 * Copyright (C) 2011
3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4 *
5 * Copyright (C) 2009 TechNexion Ltd.
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef __TAM3517_H
11 #define __TAM3517_H
12
13 /*
14 * High Level Configuration Options
15 */
16 #define CONFIG_OMAP /* in a TI OMAP core */
17 #define CONFIG_OMAP_GPIO
18 #define CONFIG_OMAP_COMMON
19 /* Common ARM Erratas */
20 #define CONFIG_ARM_ERRATA_454179
21 #define CONFIG_ARM_ERRATA_430973
22 #define CONFIG_ARM_ERRATA_621766
23
24 #define CONFIG_SYS_TEXT_BASE 0x80008000
25
26 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */
27
28 #include <asm/arch/cpu.h> /* get chip and board defs */
29 #include <asm/arch/omap.h>
30
31 /*
32 * Display CPU and Board information
33 */
34 #define CONFIG_DISPLAY_CPUINFO
35 #define CONFIG_DISPLAY_BOARDINFO
36
37 /* Clock Defines */
38 #define V_OSCK 26000000 /* Clock output from T2 */
39 #define V_SCLK (V_OSCK >> 1)
40
41 #define CONFIG_MISC_INIT_R
42
43 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
44 #define CONFIG_SETUP_MEMORY_TAGS
45 #define CONFIG_INITRD_TAG
46 #define CONFIG_REVISION_TAG
47
48 /*
49 * Size of malloc() pool
50 */
51 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
52 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \
53 2 * 1024 * 1024)
54 /*
55 * DDR related
56 */
57 #define CONFIG_OMAP3_MICRON_DDR /* Micron DDR */
58 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
59
60 /*
61 * Hardware drivers
62 */
63
64 /*
65 * NS16550 Configuration
66 */
67 #define CONFIG_SYS_NS16550_SERIAL
68 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
69 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
70
71 /*
72 * select serial console configuration
73 */
74 #define CONFIG_CONS_INDEX 1
75 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
76 #define CONFIG_SERIAL1 /* UART1 */
77
78 /* allow to overwrite serial and ethaddr */
79 #define CONFIG_ENV_OVERWRITE
80 #define CONFIG_BAUDRATE 115200
81 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
82 115200}
83 #define CONFIG_MMC
84 #define CONFIG_OMAP_HSMMC
85 #define CONFIG_GENERIC_MMC
86 #define CONFIG_DOS_PARTITION
87
88 /* EHCI */
89 #define CONFIG_OMAP3_GPIO_5
90 #define CONFIG_USB_EHCI
91 #define CONFIG_USB_EHCI_OMAP
92 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
93 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
94
95 /* commands to include */
96 #define CONFIG_CMD_NAND /* NAND support */
97 #define CONFIG_CMD_EEPROM
98
99 #define CONFIG_SYS_NO_FLASH
100 #define CONFIG_SYS_I2C
101 #define CONFIG_SYS_OMAP24_I2C_SPEED 400000
102 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
103 #define CONFIG_SYS_I2C_OMAP34XX
104 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
105 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
106 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
107
108 /*
109 * Board NAND Info.
110 */
111 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
112 /* to access */
113 /* nand at CS0 */
114
115 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
116 /* NAND devices */
117
118 #define CONFIG_AUTO_COMPLETE
119
120 /*
121 * Miscellaneous configurable options
122 */
123 #define CONFIG_SYS_LONGHELP /* undef to save memory */
124 #define CONFIG_CMDLINE_EDITING
125 #define CONFIG_AUTO_COMPLETE
126 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
127
128 /* Print Buffer Size */
129 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
130 sizeof(CONFIG_SYS_PROMPT) + 16)
131 #define CONFIG_SYS_MAXARGS 32 /* max number of command */
132 /* args */
133 /* Boot Argument Buffer Size */
134 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
135 /* memtest works on */
136 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
137 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
138 0x01F00000) /* 31MB */
139
140 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
141 /* address */
142
143 /*
144 * AM3517 has 12 GP timers, they can be driven by the system clock
145 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
146 * This rate is divided by a local divisor.
147 */
148 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
149 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
150
151 /*
152 * Physical Memory Map
153 */
154 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
155 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
156 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
157
158 /*
159 * FLASH and environment organization
160 */
161
162 /* **** PISMO SUPPORT *** */
163 #define CONFIG_NAND
164 #define CONFIG_NAND_OMAP_GPMC
165 #define CONFIG_ENV_IS_IN_NAND
166 #define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */
167
168 /* Redundant Environment */
169 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
170 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
171 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
172 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
173 2 * CONFIG_SYS_ENV_SECT_SIZE)
174 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
175
176 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
177 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
178 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
179 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
180 CONFIG_SYS_INIT_RAM_SIZE - \
181 GENERATED_GBL_DATA_SIZE)
182
183 /*
184 * ethernet support, EMAC
185 *
186 */
187 #define CONFIG_DRIVER_TI_EMAC
188 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
189 #define CONFIG_MII
190 #define CONFIG_EMAC_MDIO_PHY_NUM 0
191 #define CONFIG_BOOTP_DNS
192 #define CONFIG_BOOTP_DNS2
193 #define CONFIG_BOOTP_SEND_HOSTNAME
194 #define CONFIG_NET_RETRY_COUNT 10
195
196 /* Defines for SPL */
197 #define CONFIG_SPL_FRAMEWORK
198 #define CONFIG_SPL_BOARD_INIT
199 #define CONFIG_SPL_CONSOLE
200 #define CONFIG_SPL_NAND_SIMPLE
201 #define CONFIG_SPL_NAND_SOFTECC
202 #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */
203
204 #define CONFIG_SPL_LIBCOMMON_SUPPORT
205 #define CONFIG_SPL_LIBDISK_SUPPORT
206 #define CONFIG_SPL_MMC_SUPPORT
207 #define CONFIG_SPL_LIBGENERIC_SUPPORT
208 #define CONFIG_SPL_SERIAL_SUPPORT
209 #define CONFIG_SPL_POWER_SUPPORT
210 #define CONFIG_SPL_NAND_SUPPORT
211 #define CONFIG_SPL_NAND_BASE
212 #define CONFIG_SPL_NAND_DRIVERS
213 #define CONFIG_SPL_NAND_ECC
214 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
215
216 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
217 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
218 CONFIG_SPL_TEXT_BASE)
219 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
220
221 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
222 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
223 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
224 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
225
226 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
227 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
228 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
229
230 /* FAT */
231 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
232 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
233
234 /* RAW SD card / eMMC */
235 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x900 /* address 0x120000 */
236 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x80 /* address 0x10000 */
237 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x80 /* 64KiB */
238
239 /* NAND boot config */
240 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
241 #define CONFIG_SYS_NAND_PAGE_COUNT 64
242 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
243 #define CONFIG_SYS_NAND_OOBSIZE 64
244 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
245 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
246 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
247 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
248 48, 49, 50, 51, 52, 53, 54, 55,\
249 56, 57, 58, 59, 60, 61, 62, 63}
250 #define CONFIG_SYS_NAND_ECCSIZE 256
251 #define CONFIG_SYS_NAND_ECCBYTES 3
252 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
253 #define CONFIG_NAND_OMAP_GPMC_PREFETCH
254
255 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
256
257 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
258 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
259
260 #define CONFIG_CMD_UBI
261 #define CONFIG_CMD_UBIFS
262 #define CONFIG_RBTREE
263 #define CONFIG_LZO
264 #define CONFIG_MTD_PARTITIONS
265 #define CONFIG_MTD_DEVICE
266 #define CONFIG_CMD_MTDPARTS
267
268 /* Setup MTD for NAND on the SOM */
269 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
270 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
271 "1m(u-boot),256k(env1)," \
272 "256k(env2),6m(kernel),-(rootfs)"
273
274 #define CONFIG_TAM3517_SETTINGS \
275 "netdev=eth0\0" \
276 "nandargs=setenv bootargs root=${nandroot} " \
277 "rootfstype=${nandrootfstype}\0" \
278 "nfsargs=setenv bootargs root=/dev/nfs rw " \
279 "nfsroot=${serverip}:${rootpath}\0" \
280 "ramargs=setenv bootargs root=/dev/ram rw\0" \
281 "addip_sta=setenv bootargs ${bootargs} " \
282 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
283 ":${hostname}:${netdev}:off panic=1\0" \
284 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
285 "addip=if test -n ${ipdyn};then run addip_dyn;" \
286 "else run addip_sta;fi\0" \
287 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
288 "addtty=setenv bootargs ${bootargs}" \
289 " console=ttyO0,${baudrate}\0" \
290 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
291 "loadaddr=82000000\0" \
292 "kernel_addr_r=82000000\0" \
293 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
294 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
295 "flash_self=run ramargs addip addtty addmtd addmisc;" \
296 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
297 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
298 "bootm ${kernel_addr}\0" \
299 "nandboot=run nandargs addip addtty addmtd addmisc;" \
300 "nand read ${kernel_addr_r} kernel\0" \
301 "bootm ${kernel_addr_r}\0" \
302 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
303 "run nfsargs addip addtty addmtd addmisc;" \
304 "bootm ${kernel_addr_r}\0" \
305 "net_self=if run net_self_load;then " \
306 "run ramargs addip addtty addmtd addmisc;" \
307 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
308 "else echo Images not loades;fi\0" \
309 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \
310 "load=tftp ${loadaddr} ${u-boot}\0" \
311 "loadmlo=tftp ${loadaddr} ${mlo}\0" \
312 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \
313 "uboot_addr=0x80000\0" \
314 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
315 "nand write ${loadaddr} ${uboot_addr} 80000\0" \
316 "updatemlo=nandecc hw;nand erase 0 20000;" \
317 "nand write ${loadaddr} 0 20000\0" \
318 "upd=if run load;then echo Updating u-boot;if run update;" \
319 "then echo U-Boot updated;" \
320 "else echo Error updating u-boot !;" \
321 "echo Board without bootloader !!;" \
322 "fi;" \
323 "else echo U-Boot not downloaded..exiting;fi\0" \
324
325 /*
326 * this is common code for all TAM3517 boards.
327 * MAC address is stored from manufacturer in
328 * I2C EEPROM
329 */
330 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
331 /*
332 * The I2C EEPROM on the TAM3517 contains
333 * mac address and production data
334 */
335 struct tam3517_module_info {
336 char customer[48];
337 char product[48];
338
339 /*
340 * bit 0~47 : sequence number
341 * bit 48~55 : week of year, from 0.
342 * bit 56~63 : year
343 */
344 unsigned long long sequence_number;
345
346 /*
347 * bit 0~7 : revision fixed
348 * bit 8~15 : revision major
349 * bit 16~31 : TNxxx
350 */
351 unsigned int revision;
352 unsigned char eth_addr[4][8];
353 unsigned char _rev[100];
354 };
355
356 #define TAM3517_READ_EEPROM(info, ret) \
357 do { \
358 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \
359 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
360 (void *)info, sizeof(*info))) \
361 ret = 1; \
362 else \
363 ret = 0; \
364 } while (0)
365
366 #define TAM3517_READ_MAC_FROM_EEPROM(info) \
367 do { \
368 char buf[80], ethname[20]; \
369 int i; \
370 memset(buf, 0, sizeof(buf)); \
371 for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \
372 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \
373 (info)->eth_addr[i][5], \
374 (info)->eth_addr[i][4], \
375 (info)->eth_addr[i][3], \
376 (info)->eth_addr[i][2], \
377 (info)->eth_addr[i][1], \
378 (info)->eth_addr[i][0]); \
379 \
380 if (i) \
381 sprintf(ethname, "eth%daddr", i); \
382 else \
383 strcpy(ethname, "ethaddr"); \
384 printf("Setting %s from EEPROM with %s\n", ethname, buf);\
385 setenv(ethname, buf); \
386 } \
387 } while (0)
388
389 /* The following macros are taken from Technexion's documentation */
390 #define TAM3517_sequence_number(info) \
391 ((info)->sequence_number % 0x1000000000000LL)
392 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100)
393 #define TAM3517_year(info) ((info)->sequence_number >> 56)
394 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100)
395 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100)
396 #define TAM3517_revision_tn(info) ((info)->revision >> 16)
397
398 #define TAM3517_PRINT_SOM_INFO(info) \
399 do { \
400 printf("Vendor:%s\n", (info)->customer); \
401 printf("SOM: %s\n", (info)->product); \
402 printf("SeqNr: %02llu%02llu%012llu\n", \
403 TAM3517_year(info), \
404 TAM3517_week_of_year(info), \
405 TAM3517_sequence_number(info)); \
406 printf("Rev: TN%u %u.%u\n", \
407 TAM3517_revision_tn(info), \
408 TAM3517_revision_major(info), \
409 TAM3517_revision_fixed(info)); \
410 } while (0)
411
412 #endif
413
414 #endif /* __TAM3517_H */