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1 /*
2 * Copyright (C) 2011
3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4 *
5 * Copyright (C) 2009 TechNexion Ltd.
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef __TAM3517_H
11 #define __TAM3517_H
12
13 /*
14 * High Level Configuration Options
15 */
16 #define CONFIG_OMAP /* in a TI OMAP core */
17 #define CONFIG_OMAP_GPIO
18 #define CONFIG_OMAP_COMMON
19 /* Common ARM Erratas */
20 #define CONFIG_ARM_ERRATA_454179
21 #define CONFIG_ARM_ERRATA_430973
22 #define CONFIG_ARM_ERRATA_621766
23
24 #define CONFIG_SYS_TEXT_BASE 0x80008000
25
26 #define CONFIG_SYS_CACHELINE_SIZE 64
27
28 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */
29
30 #include <asm/arch/cpu.h> /* get chip and board defs */
31 #include <asm/arch/omap.h>
32
33 /*
34 * Display CPU and Board information
35 */
36 #define CONFIG_DISPLAY_CPUINFO
37 #define CONFIG_DISPLAY_BOARDINFO
38
39 /* Clock Defines */
40 #define V_OSCK 26000000 /* Clock output from T2 */
41 #define V_SCLK (V_OSCK >> 1)
42
43 #define CONFIG_MISC_INIT_R
44
45 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
46 #define CONFIG_SETUP_MEMORY_TAGS
47 #define CONFIG_INITRD_TAG
48 #define CONFIG_REVISION_TAG
49
50 /*
51 * Size of malloc() pool
52 */
53 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
54 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \
55 2 * 1024 * 1024)
56 /*
57 * DDR related
58 */
59 #define CONFIG_OMAP3_MICRON_DDR /* Micron DDR */
60 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
61
62 /*
63 * Hardware drivers
64 */
65
66 /*
67 * NS16550 Configuration
68 */
69 #define CONFIG_SYS_NS16550
70 #define CONFIG_SYS_NS16550_SERIAL
71 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
72 #define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
73
74 /*
75 * select serial console configuration
76 */
77 #define CONFIG_CONS_INDEX 1
78 #define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
79 #define CONFIG_SERIAL1 /* UART1 */
80
81 /* allow to overwrite serial and ethaddr */
82 #define CONFIG_ENV_OVERWRITE
83 #define CONFIG_BAUDRATE 115200
84 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
85 115200}
86 #define CONFIG_MMC
87 #define CONFIG_OMAP_HSMMC
88 #define CONFIG_GENERIC_MMC
89 #define CONFIG_DOS_PARTITION
90
91 /* EHCI */
92 #define CONFIG_OMAP3_GPIO_5
93 #define CONFIG_USB_EHCI
94 #define CONFIG_USB_EHCI_OMAP
95 #define CONFIG_USB_ULPI
96 #define CONFIG_USB_ULPI_VIEWPORT_OMAP
97 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
98 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
99 #define CONFIG_USB_STORAGE
100
101 /* commands to include */
102 #define CONFIG_CMD_CACHE
103 #define CONFIG_CMD_DHCP
104 #define CONFIG_CMD_EXT2 /* EXT2 Support */
105 #define CONFIG_CMD_FAT /* FAT support */
106 #define CONFIG_CMD_I2C /* I2C serial bus support */
107 #define CONFIG_CMD_MII
108 #define CONFIG_CMD_MMC /* MMC support */
109 #define CONFIG_CMD_NAND /* NAND support */
110 #define CONFIG_CMD_PING
111 #define CONFIG_CMD_USB
112 #define CONFIG_CMD_EEPROM
113
114 #define CONFIG_SYS_NO_FLASH
115 #define CONFIG_SYS_I2C
116 #define CONFIG_SYS_OMAP24_I2C_SPEED 400000
117 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
118 #define CONFIG_SYS_I2C_OMAP34XX
119 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
120 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
121 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
122
123 /*
124 * Board NAND Info.
125 */
126 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
127 /* to access */
128 /* nand at CS0 */
129
130 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
131 /* NAND devices */
132
133 #define CONFIG_AUTO_COMPLETE
134
135 /*
136 * Miscellaneous configurable options
137 */
138 #define CONFIG_SYS_LONGHELP /* undef to save memory */
139 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
140 #define CONFIG_CMDLINE_EDITING
141 #define CONFIG_AUTO_COMPLETE
142 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
143
144 /* Print Buffer Size */
145 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
146 sizeof(CONFIG_SYS_PROMPT) + 16)
147 #define CONFIG_SYS_MAXARGS 32 /* max number of command */
148 /* args */
149 /* Boot Argument Buffer Size */
150 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
151 /* memtest works on */
152 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
153 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
154 0x01F00000) /* 31MB */
155
156 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
157 /* address */
158
159 /*
160 * AM3517 has 12 GP timers, they can be driven by the system clock
161 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
162 * This rate is divided by a local divisor.
163 */
164 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
165 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
166
167 /*
168 * Physical Memory Map
169 */
170 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
171 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
172 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
173
174 /*
175 * FLASH and environment organization
176 */
177
178 /* **** PISMO SUPPORT *** */
179 #define CONFIG_NAND
180 #define CONFIG_NAND_OMAP_GPMC
181 #define CONFIG_ENV_IS_IN_NAND
182 #define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */
183
184 /* Redundant Environment */
185 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
186 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
187 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
188 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
189 2 * CONFIG_SYS_ENV_SECT_SIZE)
190 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
191
192 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
193 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
194 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
195 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
196 CONFIG_SYS_INIT_RAM_SIZE - \
197 GENERATED_GBL_DATA_SIZE)
198
199 /*
200 * ethernet support, EMAC
201 *
202 */
203 #define CONFIG_DRIVER_TI_EMAC
204 #define CONFIG_DRIVER_TI_EMAC_USE_RMII
205 #define CONFIG_MII
206 #define CONFIG_EMAC_MDIO_PHY_NUM 0
207 #define CONFIG_BOOTP_DNS
208 #define CONFIG_BOOTP_DNS2
209 #define CONFIG_BOOTP_SEND_HOSTNAME
210 #define CONFIG_NET_RETRY_COUNT 10
211
212 /* Defines for SPL */
213 #define CONFIG_SPL_FRAMEWORK
214 #define CONFIG_SPL_BOARD_INIT
215 #define CONFIG_SPL_CONSOLE
216 #define CONFIG_SPL_NAND_SIMPLE
217 #define CONFIG_SPL_NAND_SOFTECC
218 #define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */
219
220 #define CONFIG_SPL_LIBCOMMON_SUPPORT
221 #define CONFIG_SPL_LIBDISK_SUPPORT
222 #define CONFIG_SPL_I2C_SUPPORT
223 #define CONFIG_SPL_LIBGENERIC_SUPPORT
224 #define CONFIG_SPL_SERIAL_SUPPORT
225 #define CONFIG_SPL_GPIO_SUPPORT
226 #define CONFIG_SPL_POWER_SUPPORT
227 #define CONFIG_SPL_NAND_SUPPORT
228 #define CONFIG_SPL_NAND_BASE
229 #define CONFIG_SPL_NAND_DRIVERS
230 #define CONFIG_SPL_NAND_ECC
231 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
232
233 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
234 #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
235
236 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
237 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
238 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
239 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
240
241 /* NAND boot config */
242 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
243 #define CONFIG_SYS_NAND_PAGE_COUNT 64
244 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
245 #define CONFIG_SYS_NAND_OOBSIZE 64
246 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
247 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
248 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
249 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
250 48, 49, 50, 51, 52, 53, 54, 55,\
251 56, 57, 58, 59, 60, 61, 62, 63}
252 #define CONFIG_SYS_NAND_ECCSIZE 256
253 #define CONFIG_SYS_NAND_ECCBYTES 3
254 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
255 #define CONFIG_NAND_OMAP_GPMC_PREFETCH
256
257 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
258
259 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
260 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
261
262 #define CONFIG_OF_LIBFDT
263 #define CONFIG_FIT
264 #define CONFIG_CMD_UBI
265 #define CONFIG_CMD_UBIFS
266 #define CONFIG_RBTREE
267 #define CONFIG_LZO
268 #define CONFIG_MTD_PARTITIONS
269 #define CONFIG_MTD_DEVICE
270 #define CONFIG_CMD_MTDPARTS
271
272 /* Setup MTD for NAND on the SOM */
273 #define MTDIDS_DEFAULT "nand0=omap2-nand.0"
274 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
275 "1m(u-boot),256k(env1)," \
276 "256k(env2),6m(kernel),-(rootfs)"
277
278 #define CONFIG_TAM3517_SETTINGS \
279 "netdev=eth0\0" \
280 "nandargs=setenv bootargs root=${nandroot} " \
281 "rootfstype=${nandrootfstype}\0" \
282 "nfsargs=setenv bootargs root=/dev/nfs rw " \
283 "nfsroot=${serverip}:${rootpath}\0" \
284 "ramargs=setenv bootargs root=/dev/ram rw\0" \
285 "addip_sta=setenv bootargs ${bootargs} " \
286 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
287 ":${hostname}:${netdev}:off panic=1\0" \
288 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
289 "addip=if test -n ${ipdyn};then run addip_dyn;" \
290 "else run addip_sta;fi\0" \
291 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
292 "addtty=setenv bootargs ${bootargs}" \
293 " console=ttyO0,${baudrate}\0" \
294 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
295 "loadaddr=82000000\0" \
296 "kernel_addr_r=82000000\0" \
297 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
298 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
299 "flash_self=run ramargs addip addtty addmtd addmisc;" \
300 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
301 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
302 "bootm ${kernel_addr}\0" \
303 "nandboot=run nandargs addip addtty addmtd addmisc;" \
304 "nand read ${kernel_addr_r} kernel\0" \
305 "bootm ${kernel_addr_r}\0" \
306 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
307 "run nfsargs addip addtty addmtd addmisc;" \
308 "bootm ${kernel_addr_r}\0" \
309 "net_self=if run net_self_load;then " \
310 "run ramargs addip addtty addmtd addmisc;" \
311 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
312 "else echo Images not loades;fi\0" \
313 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \
314 "load=tftp ${loadaddr} ${u-boot}\0" \
315 "loadmlo=tftp ${loadaddr} ${mlo}\0" \
316 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \
317 "uboot_addr=0x80000\0" \
318 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
319 "nand write ${loadaddr} ${uboot_addr} 80000\0" \
320 "updatemlo=nandecc hw;nand erase 0 20000;" \
321 "nand write ${loadaddr} 0 20000\0" \
322 "upd=if run load;then echo Updating u-boot;if run update;" \
323 "then echo U-Boot updated;" \
324 "else echo Error updating u-boot !;" \
325 "echo Board without bootloader !!;" \
326 "fi;" \
327 "else echo U-Boot not downloaded..exiting;fi\0" \
328
329
330 /*
331 * this is common code for all TAM3517 boards.
332 * MAC address is stored from manufacturer in
333 * I2C EEPROM
334 */
335 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
336 /*
337 * The I2C EEPROM on the TAM3517 contains
338 * mac address and production data
339 */
340 struct tam3517_module_info {
341 char customer[48];
342 char product[48];
343
344 /*
345 * bit 0~47 : sequence number
346 * bit 48~55 : week of year, from 0.
347 * bit 56~63 : year
348 */
349 unsigned long long sequence_number;
350
351 /*
352 * bit 0~7 : revision fixed
353 * bit 8~15 : revision major
354 * bit 16~31 : TNxxx
355 */
356 unsigned int revision;
357 unsigned char eth_addr[4][8];
358 unsigned char _rev[100];
359 };
360
361 #define TAM3517_READ_EEPROM(info, ret) \
362 do { \
363 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \
364 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
365 (void *)info, sizeof(*info))) \
366 ret = 1; \
367 else \
368 ret = 0; \
369 } while (0)
370
371 #define TAM3517_READ_MAC_FROM_EEPROM(info) \
372 do { \
373 char buf[80], ethname[20]; \
374 int i; \
375 memset(buf, 0, sizeof(buf)); \
376 for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \
377 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \
378 (info)->eth_addr[i][5], \
379 (info)->eth_addr[i][4], \
380 (info)->eth_addr[i][3], \
381 (info)->eth_addr[i][2], \
382 (info)->eth_addr[i][1], \
383 (info)->eth_addr[i][0]); \
384 \
385 if (i) \
386 sprintf(ethname, "eth%daddr", i); \
387 else \
388 sprintf(ethname, "ethaddr"); \
389 printf("Setting %s from EEPROM with %s\n", ethname, buf);\
390 setenv(ethname, buf); \
391 } \
392 } while (0)
393
394 /* The following macros are taken from Technexion's documentation */
395 #define TAM3517_sequence_number(info) \
396 ((info)->sequence_number % 0x1000000000000LL)
397 #define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100)
398 #define TAM3517_year(info) ((info)->sequence_number >> 56)
399 #define TAM3517_revision_fixed(info) ((info)->revision % 0x100)
400 #define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100)
401 #define TAM3517_revision_tn(info) ((info)->revision >> 16)
402
403 #define TAM3517_PRINT_SOM_INFO(info) \
404 do { \
405 printf("Vendor:%s\n", (info)->customer); \
406 printf("SOM: %s\n", (info)->product); \
407 printf("SeqNr: %02llu%02llu%012llu\n", \
408 TAM3517_year(info), \
409 TAM3517_week_of_year(info), \
410 TAM3517_sequence_number(info)); \
411 printf("Rev: TN%u %u.%u\n", \
412 TAM3517_revision_tn(info), \
413 TAM3517_revision_major(info), \
414 TAM3517_revision_fixed(info)); \
415 } while (0)
416
417 #endif
418
419 #endif /* __TAM3517_H */