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1 /*
2 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
3 * (C) Copyright 2013 Siemens AG
4 *
5 * Based on:
6 * U-Boot file: include/configs/at91sam9260ek.h
7 *
8 * (C) Copyright 2007-2008
9 * Stelian Pop <stelian@popies.net>
10 * Lead Tech Design <www.leadtechdesign.com>
11 *
12 * SPDX-License-Identifier: GPL-2.0+
13 */
14
15 #ifndef __CONFIG_H
16 #define __CONFIG_H
17
18 /*
19 * SoC must be defined first, before hardware.h is included.
20 * In this case SoC is defined in boards.cfg.
21 */
22 #include <asm/hardware.h>
23 #include <linux/sizes.h>
24
25 #if defined(CONFIG_SPL_BUILD)
26 #define CONFIG_SYS_ICACHE_OFF
27 #define CONFIG_SYS_DCACHE_OFF
28 #endif
29 /*
30 * Warning: changing CONFIG_SYS_TEXT_BASE requires
31 * adapting the initial boot program.
32 * Since the linker has to swallow that define, we must use a pure
33 * hex number here!
34 */
35
36 #define CONFIG_SYS_TEXT_BASE 0x21000000
37
38 /* ARM asynchronous clock */
39 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
40 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
41
42 /* Misc CPU related */
43 #define CONFIG_ARCH_CPU_INIT
44 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
45 #define CONFIG_SETUP_MEMORY_TAGS
46 #define CONFIG_INITRD_TAG
47 #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
48
49 /* general purpose I/O */
50 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
51 #define CONFIG_AT91_GPIO
52 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
53
54 /* serial console */
55 #define CONFIG_ATMEL_USART
56 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
57 #define CONFIG_USART_ID ATMEL_ID_SYS
58 #define CONFIG_BAUDRATE 115200
59
60
61 /*
62 * Command line configuration.
63 */
64 #define CONFIG_CMD_NAND
65
66 /*
67 * SDRAM: 1 bank, min 32, max 128 MB
68 * Initialized before u-boot gets started.
69 */
70 #define CONFIG_NR_DRAM_BANKS 1
71 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
72 #define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M)
73
74 /*
75 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
76 * leaving the correct space for initial global data structure above
77 * that address while providing maximum stack area below.
78 */
79 #define CONFIG_SYS_INIT_SP_ADDR \
80 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
81
82 /* NAND flash */
83 #ifdef CONFIG_CMD_NAND
84 #define CONFIG_NAND_ATMEL
85 #define CONFIG_SYS_MAX_NAND_DEVICE 1
86 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
87 #define CONFIG_SYS_NAND_DBW_8
88 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
89 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
90 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
91 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
92 #endif
93
94 /* Ethernet */
95 #define CONFIG_MACB
96 #define CONFIG_PHYLIB
97 #define CONFIG_RMII
98 #define CONFIG_AT91_WANTS_COMMON_PHY
99
100 #define CONFIG_AT91SAM9_WATCHDOG
101 #define CONFIG_AT91_HW_WDT_TIMEOUT 15
102 #if !defined(CONFIG_SPL_BUILD)
103 /* Enable the watchdog */
104 #define CONFIG_HW_WATCHDOG
105 #endif
106
107 /* USB */
108 #if defined(CONFIG_BOARD_TAURUS)
109 #define CONFIG_USB_ATMEL
110 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
111 #define CONFIG_USB_OHCI_NEW
112 #define CONFIG_SYS_USB_OHCI_CPU_INIT
113 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
114 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
115 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
116
117 /* USB DFU support */
118 #define CONFIG_CMD_MTDPARTS
119 #define CONFIG_MTD_DEVICE
120 #define CONFIG_MTD_PARTITIONS
121
122 #define CONFIG_USB_GADGET_AT91
123
124 /* DFU class support */
125 #define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M)
126 #define DFU_MANIFEST_POLL_TIMEOUT 25000
127 #endif
128
129 /* SPI EEPROM */
130 #define CONFIG_SPI
131 #define CONFIG_ATMEL_SPI
132 #define TAURUS_SPI_MASK (1 << 4)
133 #define TAURUS_SPI_CS_PIN AT91_PIN_PA3
134
135 #if defined(CONFIG_SPL_BUILD)
136 /* SPL related */
137 #define CONFIG_SPL_SPI_LOAD
138 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
139
140 #define CONFIG_SF_DEFAULT_BUS 0
141 #define CONFIG_SF_DEFAULT_SPEED 1000000
142 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
143 #endif
144
145 /* load address */
146 #define CONFIG_SYS_LOAD_ADDR 0x22000000
147
148 /* bootstrap in spi flash , u-boot + env + linux in nandflash */
149 #define CONFIG_ENV_IS_IN_NAND
150 #define CONFIG_ENV_OFFSET 0x100000
151 #define CONFIG_ENV_OFFSET_REDUND 0x180000
152 #define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */
153 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
154
155 #if defined(CONFIG_BOARD_TAURUS)
156 #define CONFIG_BOOTARGS_TAURUS \
157 "console=ttyS0,115200 earlyprintk " \
158 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
159 "256k(env),256k(env_redundant),256k(spare)," \
160 "512k(dtb),6M(kernel)ro,-(rootfs) " \
161 "root=/dev/mtdblock7 rw rootfstype=jffs2"
162 #endif
163
164 #if defined(CONFIG_BOARD_AXM)
165 #define CONFIG_BOOTARGS_AXM \
166 "\0" \
167 "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
168 "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
169 "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
170 "baudrate=115200\0" \
171 "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
172 "boot_retries=0\0" \
173 "bootcmd=run flash_self\0" \
174 "bootdelay=3\0" \
175 "ethact=macb0\0" \
176 "flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;"\
177 "bootm ${kernel_ram};reset\0" \
178 "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
179 "bootm ${kernel_ram};reset\0" \
180 "flash_self_test=run nand_kernel;run setbootargs addtest; " \
181 "upgrade_available;bootm ${kernel_ram};reset\0" \
182 "hostname=systemone\0" \
183 "kernel_Off=0x00200000\0" \
184 "kernel_Off_fallback=0x03800000\0" \
185 "kernel_ram=0x21500000\0" \
186 "kernel_size=0x00400000\0" \
187 "kernel_size_fallback=0x00400000\0" \
188 "loads_echo=1\0" \
189 "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
190 "${kernel_size}\0" \
191 "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
192 "run nfsargs;run addip;upgrade_available;bootm " \
193 "${kernel_ram};reset\0" \
194 "netdev=eth0\0" \
195 "nfsargs=run root_path;setenv bootargs ${bootargs} " \
196 "root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
197 "at91sam9_wdt.wdt_timeout=16\0" \
198 "partitionset_active=A\0" \
199 "preboot=echo;echo Type 'run flash_self' to use kernel and root "\
200 "filesystem on memory;echo Type 'run flash_nfs' to use kernel " \
201 "from memory and root filesystem over NFS;echo Type 'run net_nfs' "\
202 "to get Kernel over TFTP and mount root filesystem over NFS;echo\0"\
203 "project_dir=systemone\0" \
204 "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0"\
205 "rootfs=/dev/mtdblock5\0" \
206 "rootfs_fallback=/dev/mtdblock7\0" \
207 "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops "\
208 "root=${rootfs} rootfstype=jffs2 panic=7 " \
209 "at91sam9_wdt.wdt_timeout=16\0" \
210 "stderr=serial\0" \
211 "stdin=serial\0" \
212 "stdout=serial\0" \
213 "upgrade_available=0\0"
214 #endif
215
216 #if defined(CONFIG_BOARD_TAURUS)
217 #define CONFIG_BOOTARGS CONFIG_BOOTARGS_TAURUS
218 #endif
219
220 #if defined(CONFIG_BOARD_AXM)
221 #define CONFIG_BOOTARGS CONFIG_BOOTARGS_AXM
222 #endif
223
224 #define CONFIG_SYS_CBSIZE 256
225 #define CONFIG_SYS_MAXARGS 16
226 #define CONFIG_SYS_PBSIZE \
227 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
228 #define CONFIG_SYS_LONGHELP
229 #define CONFIG_CMDLINE_EDITING
230 #define CONFIG_AUTO_COMPLETE
231
232 /*
233 * Size of malloc() pool
234 */
235 #define CONFIG_SYS_MALLOC_LEN \
236 ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)
237
238 /* Defines for SPL */
239 #define CONFIG_SPL_FRAMEWORK
240 #define CONFIG_SPL_TEXT_BASE 0x0
241 #define CONFIG_SPL_MAX_SIZE (31 * SZ_512)
242 #define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K)
243 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
244 CONFIG_SYS_MALLOC_LEN)
245 #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
246
247 #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
248 #define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512)
249
250 #define CONFIG_SPL_BOARD_INIT
251 #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
252 #define CONFIG_SYS_USE_NANDFLASH 1
253 #define CONFIG_SPL_NAND_DRIVERS
254 #define CONFIG_SPL_NAND_BASE
255 #define CONFIG_SPL_NAND_ECC
256 #define CONFIG_SPL_NAND_RAW_ONLY
257 #define CONFIG_SPL_NAND_SOFTECC
258 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
259 #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
260 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
261 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
262 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
263
264 #define CONFIG_SYS_NAND_SIZE (256 * SZ_1M)
265 #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K
266 #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K)
267 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
268 CONFIG_SYS_NAND_PAGE_SIZE)
269 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
270 #define CONFIG_SYS_NAND_ECCSIZE 256
271 #define CONFIG_SYS_NAND_ECCBYTES 3
272 #define CONFIG_SYS_NAND_OOBSIZE 64
273 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
274 48, 49, 50, 51, 52, 53, 54, 55, \
275 56, 57, 58, 59, 60, 61, 62, 63, }
276
277 #define CONFIG_SPL_ATMEL_SIZE
278 #define CONFIG_SYS_MASTER_CLOCK 132096000
279 #define AT91_PLL_LOCK_TIMEOUT 1000000
280 #define CONFIG_SYS_AT91_PLLA 0x202A3F01
281 #define CONFIG_SYS_MCKR 0x1300
282 #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR)
283 #define CONFIG_SYS_AT91_PLLB 0x10193F05
284
285 #endif