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1 /*
2 * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards
3 * (C) Copyright 2013 Siemens AG
4 *
5 * Based on:
6 * U-Boot file: include/configs/at91sam9260ek.h
7 *
8 * (C) Copyright 2007-2008
9 * Stelian Pop <stelian@popies.net>
10 * Lead Tech Design <www.leadtechdesign.com>
11 *
12 * SPDX-License-Identifier: GPL-2.0+
13 */
14
15 #ifndef __CONFIG_H
16 #define __CONFIG_H
17
18 /*
19 * SoC must be defined first, before hardware.h is included.
20 * In this case SoC is defined in boards.cfg.
21 */
22 #include <asm/hardware.h>
23 #include <linux/sizes.h>
24
25
26 #if defined(CONFIG_SPL_BUILD)
27 #define CONFIG_SYS_THUMB_BUILD
28 #define CONFIG_SYS_ICACHE_OFF
29 #define CONFIG_SYS_DCACHE_OFF
30 #endif
31 /*
32 * Warning: changing CONFIG_SYS_TEXT_BASE requires
33 * adapting the initial boot program.
34 * Since the linker has to swallow that define, we must use a pure
35 * hex number here!
36 */
37
38
39 #define CONFIG_SYS_TEXT_BASE 0x21000000
40
41 /* ARM asynchronous clock */
42 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
43 #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */
44
45 /* Misc CPU related */
46 #define CONFIG_ARCH_CPU_INIT
47 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
48 #define CONFIG_SETUP_MEMORY_TAGS
49 #define CONFIG_INITRD_TAG
50 #define CONFIG_SKIP_LOWLEVEL_INIT
51 #define CONFIG_BOARD_EARLY_INIT_F
52 #define CONFIG_DISPLAY_CPUINFO
53
54 #define CONFIG_CMD_BOOTZ
55 #define CONFIG_OF_LIBFDT
56
57 /* general purpose I/O */
58 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
59 #define CONFIG_AT91_GPIO
60 #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
61
62 /* serial console */
63 #define CONFIG_ATMEL_USART
64 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
65 #define CONFIG_USART_ID ATMEL_ID_SYS
66 #define CONFIG_BAUDRATE 115200
67
68 #define CONFIG_BOOTDELAY 3
69
70 /*
71 * Command line configuration.
72 */
73 #define CONFIG_CMD_PING
74 #define CONFIG_CMD_DHCP
75 #define CONFIG_CMD_NAND
76
77 /*
78 * SDRAM: 1 bank, min 32, max 128 MB
79 * Initialized before u-boot gets started.
80 */
81 #define CONFIG_NR_DRAM_BANKS 1
82 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
83 #define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M)
84
85 /*
86 * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
87 * leaving the correct space for initial global data structure above
88 * that address while providing maximum stack area below.
89 */
90 #define CONFIG_SYS_INIT_SP_ADDR \
91 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
92
93 /* NAND flash */
94 #ifdef CONFIG_CMD_NAND
95 #define CONFIG_NAND_ATMEL
96 #define CONFIG_SYS_MAX_NAND_DEVICE 1
97 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
98 #define CONFIG_SYS_NAND_DBW_8
99 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
100 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
101 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
102 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
103 #endif
104
105 /* NOR flash - no real flash on this board */
106 #define CONFIG_SYS_NO_FLASH 1
107
108 /* Ethernet */
109 #define CONFIG_MACB
110 #define CONFIG_RMII
111 #define CONFIG_AT91_WANTS_COMMON_PHY
112
113 #define CONFIG_AT91SAM9_WATCHDOG
114 #define CONFIG_AT91_HW_WDT_TIMEOUT 15
115 #if !defined(CONFIG_SPL_BUILD)
116 /* Enable the watchdog */
117 #define CONFIG_HW_WATCHDOG
118 #endif
119
120 /* USB */
121 #if defined(CONFIG_BOARD_TAURUS)
122 #define CONFIG_USB_ATMEL
123 #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
124 #define CONFIG_USB_OHCI_NEW
125 #define CONFIG_SYS_USB_OHCI_CPU_INIT
126 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
127 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
128 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
129 #define CONFIG_USB_STORAGE
130
131 /* USB DFU support */
132 #define CONFIG_CMD_MTDPARTS
133 #define CONFIG_MTD_DEVICE
134 #define CONFIG_MTD_PARTITIONS
135
136 #define CONFIG_USB_GADGET
137 #define CONFIG_USB_GADGET_AT91
138
139 /* DFU class support */
140 #define CONFIG_CMD_USB
141 #define CONFIG_CMD_DFU
142 #define CONFIG_USB_FUNCTION_DFU
143 #define CONFIG_DFU_NAND
144 #define CONFIG_USB_GADGET_DOWNLOAD
145 #define CONFIG_USB_GADGET_VBUS_DRAW 2
146 #define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M)
147 #define DFU_MANIFEST_POLL_TIMEOUT 25000
148
149 /* USB DFU IDs */
150 #define CONFIG_G_DNL_VENDOR_NUM 0x0908
151 #define CONFIG_G_DNL_PRODUCT_NUM 0x02d2
152 #define CONFIG_G_DNL_MANUFACTURER "Siemens AG"
153
154 #define CONFIG_SYS_CACHELINE_SIZE SZ_8K
155 #endif
156
157 /* SPI EEPROM */
158 #define CONFIG_SPI
159 #define CONFIG_CMD_SPI
160 #define CONFIG_CMD_SF
161 #define CONFIG_ATMEL_SPI
162 #define CONFIG_SPI_FLASH_STMICRO
163 #define TAURUS_SPI_MASK (1 << 4)
164 #define TAURUS_SPI_CS_PIN AT91_PIN_PA3
165
166 #if defined(CONFIG_SPL_BUILD)
167 /* SPL related */
168 #undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */
169 #define CONFIG_SPL_SPI_SUPPORT
170 #define CONFIG_SPL_SPI_FLASH_SUPPORT
171 #define CONFIG_SPL_SPI_LOAD
172 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
173
174 #define CONFIG_SF_DEFAULT_BUS 0
175 #define CONFIG_SF_DEFAULT_SPEED 1000000
176 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
177 #endif
178
179 /* load address */
180 #define CONFIG_SYS_LOAD_ADDR 0x22000000
181
182 /* bootstrap in spi flash , u-boot + env + linux in nandflash */
183 #define CONFIG_ENV_IS_IN_NAND
184 #define CONFIG_ENV_OFFSET 0x100000
185 #define CONFIG_ENV_OFFSET_REDUND 0x180000
186 #define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */
187 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
188
189 #if defined(CONFIG_BOARD_TAURUS)
190 #define CONFIG_BOOTARGS_TAURUS \
191 "console=ttyS0,115200 earlyprintk " \
192 "mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
193 "256k(env),256k(env_redundant),256k(spare)," \
194 "512k(dtb),6M(kernel)ro,-(rootfs) " \
195 "root=/dev/mtdblock7 rw rootfstype=jffs2"
196 #endif
197
198 #if defined(CONFIG_BOARD_AXM)
199 #define CONFIG_BOOTARGS_AXM \
200 "\0" \
201 "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
202 "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
203 "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
204 "baudrate=115200\0" \
205 "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
206 "boot_retries=0\0" \
207 "bootcmd=run flash_self\0" \
208 "bootdelay=3\0" \
209 "ethact=macb0\0" \
210 "flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;"\
211 "bootm ${kernel_ram};reset\0" \
212 "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
213 "bootm ${kernel_ram};reset\0" \
214 "flash_self_test=run nand_kernel;run setbootargs addtest; " \
215 "upgrade_available;bootm ${kernel_ram};reset\0" \
216 "hostname=systemone\0" \
217 "kernel_Off=0x00200000\0" \
218 "kernel_Off_fallback=0x03800000\0" \
219 "kernel_ram=0x21500000\0" \
220 "kernel_size=0x00400000\0" \
221 "kernel_size_fallback=0x00400000\0" \
222 "loads_echo=1\0" \
223 "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
224 "${kernel_size}\0" \
225 "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
226 "run nfsargs;run addip;upgrade_available;bootm " \
227 "${kernel_ram};reset\0" \
228 "netdev=eth0\0" \
229 "nfsargs=run root_path;setenv bootargs ${bootargs} " \
230 "root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
231 "at91sam9_wdt.wdt_timeout=16\0" \
232 "partitionset_active=A\0" \
233 "preboot=echo;echo Type 'run flash_self' to use kernel and root "\
234 "filesystem on memory;echo Type 'run flash_nfs' to use kernel " \
235 "from memory and root filesystem over NFS;echo Type 'run net_nfs' "\
236 "to get Kernel over TFTP and mount root filesystem over NFS;echo\0"\
237 "project_dir=systemone\0" \
238 "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0"\
239 "rootfs=/dev/mtdblock5\0" \
240 "rootfs_fallback=/dev/mtdblock7\0" \
241 "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops "\
242 "root=${rootfs} rootfstype=jffs2 panic=7 " \
243 "at91sam9_wdt.wdt_timeout=16\0" \
244 "stderr=serial\0" \
245 "stdin=serial\0" \
246 "stdout=serial\0" \
247 "upgrade_available=0\0"
248 #endif
249
250 #if defined(CONFIG_BOARD_TAURUS)
251 #define CONFIG_BOOTARGS CONFIG_BOOTARGS_TAURUS
252 #endif
253
254 #if defined(CONFIG_BOARD_AXM)
255 #define CONFIG_BOOTARGS CONFIG_BOOTARGS_AXM
256 #endif
257
258 #define CONFIG_SYS_CBSIZE 256
259 #define CONFIG_SYS_MAXARGS 16
260 #define CONFIG_SYS_PBSIZE \
261 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
262 #define CONFIG_SYS_LONGHELP
263 #define CONFIG_CMDLINE_EDITING
264 #define CONFIG_AUTO_COMPLETE
265
266 /*
267 * Size of malloc() pool
268 */
269 #define CONFIG_SYS_MALLOC_LEN \
270 ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)
271
272 /* Defines for SPL */
273 #define CONFIG_SPL_FRAMEWORK
274 #define CONFIG_SPL_TEXT_BASE 0x0
275 #define CONFIG_SPL_MAX_SIZE (31 * SZ_512)
276 #define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K)
277 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
278 CONFIG_SYS_MALLOC_LEN)
279 #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
280
281 #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE
282 #define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512)
283
284 #define CONFIG_SPL_LIBCOMMON_SUPPORT
285 #define CONFIG_SPL_LIBGENERIC_SUPPORT
286 #define CONFIG_SPL_SERIAL_SUPPORT
287
288 #define CONFIG_SPL_BOARD_INIT
289 #define CONFIG_SPL_GPIO_SUPPORT
290 #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
291 #define CONFIG_SPL_NAND_SUPPORT
292 #define CONFIG_SYS_USE_NANDFLASH 1
293 #define CONFIG_SPL_NAND_DRIVERS
294 #define CONFIG_SPL_NAND_BASE
295 #define CONFIG_SPL_NAND_ECC
296 #define CONFIG_SPL_NAND_RAW_ONLY
297 #define CONFIG_SPL_NAND_SOFTECC
298 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
299 #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
300 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
301 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
302 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
303
304 #define CONFIG_SYS_NAND_SIZE (256 * SZ_1M)
305 #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K
306 #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K)
307 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \
308 CONFIG_SYS_NAND_PAGE_SIZE)
309 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
310 #define CONFIG_SYS_NAND_ECCSIZE 256
311 #define CONFIG_SYS_NAND_ECCBYTES 3
312 #define CONFIG_SYS_NAND_OOBSIZE 64
313 #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
314 48, 49, 50, 51, 52, 53, 54, 55, \
315 56, 57, 58, 59, 60, 61, 62, 63, }
316
317
318 #define CONFIG_SPL_ATMEL_SIZE
319 #define CONFIG_SYS_MASTER_CLOCK 132096000
320 #define AT91_PLL_LOCK_TIMEOUT 1000000
321 #define CONFIG_SYS_AT91_PLLA 0x202A3F01
322 #define CONFIG_SYS_MCKR 0x1300
323 #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR)
324 #define CONFIG_SYS_AT91_PLLB 0x10193F05
325
326 #endif