include/configs/tcm-bf518.h

   1 /*
   2  * U-Boot - Configuration file for Bluetechnix TCM-BF518 board
   3  */
   4
   5 #ifndef __CONFIG_TCM_BF518_H__
   6 #define __CONFIG_TCM_BF518_H__
   7
   8 #include <asm/config-pre.h>
   9
  10 /*
  11  * Processor Settings
  12  */
  13 #define CONFIG_BFIN_CPU             bf518-0.0
  14 #define CONFIG_BFIN_BOOT_MODE       BFIN_BOOT_PARA
  15
  16 /*
  17  * Clock Settings
  18  *      CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
  19  *      SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
  20  */
  21 /* CONFIG_CLKIN_HZ is any value in Hz                                   */
  22 #define CONFIG_CLKIN_HZ                 25000000
  23 /* CLKIN_HALF controls the DF bit in PLL_CTL      0 = CLKIN             */
  24 /*                                                1 = CLKIN / 2         */
  25 #define CONFIG_CLKIN_HALF               0
  26 /* PLL_BYPASS controls the BYPASS bit in PLL_CTL  0 = do not bypass     */
  27 /*                                                1 = bypass PLL        */
  28 #define CONFIG_PLL_BYPASS               0
  29 /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL              */
  30 /* Values can range from 0-63 (where 0 means 64)                        */
  31 #define CONFIG_VCO_MULT                 16
  32 /* CCLK_DIV controls the core clock divider                             */
  33 /* Values can be 1, 2, 4, or 8 ONLY                                     */
  34 #define CONFIG_CCLK_DIV                 1
  35 /* SCLK_DIV controls the system clock divider                           */
  36 /* Values can range from 1-15                                           */
  37 #define CONFIG_SCLK_DIV                 4
  38
  39 /*
  40  * Memory Settings
  41  */
  42 /* This board has a 32meg MT48H16M16 */
  43 #define CONFIG_MEM_ADD_WDTH     9
  44 #define CONFIG_MEM_SIZE         32
  45
  46 #define CONFIG_EBIU_SDRRC_VAL   0x3f8
  47 #define CONFIG_EBIU_SDGCTL_VAL  0x9111cd
  48
  49 #define CONFIG_EBIU_AMGCTL_VAL  (AMBEN_ALL)
  50 #define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
  51 #define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
  52
  53 #define CONFIG_SYS_MONITOR_LEN  (512 * 1024)
  54 #define CONFIG_SYS_MALLOC_LEN   (384 * 1024)
  55
  56 /*
  57  * Network Settings
  58  */
  59 #if !defined(__ADSPBF512__) && !defined(__ADSPBF514__)
  60 #define ADI_CMDS_NETWORK        1
  61 #define CONFIG_BFIN_MAC
  62 #define CONFIG_NETCONSOLE       1
  63 #endif
  64 #define CONFIG_HOSTNAME         tcm-bf518
  65
  66 /*
  67  * Flash Settings
  68  */
  69 #define CONFIG_FLASH_CFI_DRIVER
  70 #define CONFIG_SYS_FLASH_BASE           0x20000000
  71 #define CONFIG_SYS_FLASH_CFI
  72 #define CONFIG_SYS_FLASH_PROTECTION
  73 #define CONFIG_SYS_MAX_FLASH_BANKS      1
  74 #define CONFIG_SYS_MAX_FLASH_SECT       19
  75
  76 /*
  77  * SPI Settings
  78  */
  79 #define CONFIG_BFIN_SPI
  80 #define CONFIG_ENV_SPI_MAX_HZ   30000000
  81 #define CONFIG_SF_DEFAULT_SPEED 30000000
  82
  83 /*
  84  * Env Storage Settings
  85  */
  86 #define CONFIG_ENV_IS_IN_FLASH
  87 #define CONFIG_ENV_OFFSET       0x8000
  88 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
  89 #define CONFIG_ENV_SIZE         0x2000
  90 #define CONFIG_ENV_SECT_SIZE    0x8000
  91 #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
  92
  93 /*
  94  * I2C Settings
  95  */
  96 #define CONFIG_SYS_I2C
  97 #define CONFIG_SYS_I2C_ADI
  98
  99 /*
 100  * Misc Settings
 101  */
 102 #define CONFIG_BAUDRATE         115200
 103 #define CONFIG_RTC_BFIN
 104 #define CONFIG_UART_CONSOLE     0
 105 #define CONFIG_BOOTCOMMAND      "run flashboot"
 106 #define FLASHBOOT_ENV_SETTINGS  "flashboot=bootm 0x20040000\0"
 107
 108 /*
 109  * Pull in common ADI header for remaining command/environment setup
 110  */
 111 #include <configs/bfin_adi_common.h>
 112
 113 #endif