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[people/ms/u-boot.git] / include / configs / tcm-bf537.h
1 /*
2 * U-boot - Configuration file for TCM-BF537 board
3 */
4
5 #ifndef __CONFIG_TCM_BF537_H__
6 #define __CONFIG_TCM_BF537_H__
7
8 #include <asm/config-pre.h>
9
10
11 /*
12 * Processor Settings
13 */
14 #define CONFIG_BFIN_CPU bf537-0.2
15 #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
16
17
18 /*
19 * Clock Settings
20 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
21 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
22 */
23 /* CONFIG_CLKIN_HZ is any value in Hz */
24 #define CONFIG_CLKIN_HZ 25000000
25 /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
26 /* 1 = CLKIN / 2 */
27 #define CONFIG_CLKIN_HALF 0
28 /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
29 /* 1 = bypass PLL */
30 #define CONFIG_PLL_BYPASS 0
31 /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
32 /* Values can range from 0-63 (where 0 means 64) */
33 #define CONFIG_VCO_MULT 21
34 /* CCLK_DIV controls the core clock divider */
35 /* Values can be 1, 2, 4, or 8 ONLY */
36 #define CONFIG_CCLK_DIV 1
37 /* SCLK_DIV controls the system clock divider */
38 /* Values can range from 1-15 */
39 #define CONFIG_SCLK_DIV 4
40
41 /* Decrease core voltage */
42 #define CONFIG_VR_CTL_VAL (VLEV_115 | CLKBUFOE | GAIN_20 | FREQ_1000)
43
44
45 /*
46 * Memory Settings
47 */
48 #define CONFIG_MEM_ADD_WDTH 9
49 #define CONFIG_MEM_SIZE 32
50
51 #define CONFIG_EBIU_SDRRC_VAL 0x3f8
52 #define CONFIG_EBIU_SDGCTL_VAL 0x9111cd
53
54 #define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL)
55 #define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
56 #define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
57
58 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
59 #define CONFIG_SYS_MALLOC_LEN (128 * 1024)
60
61
62 /*
63 * Network Settings
64 */
65 /* TCM-BF537E has no PHY on it, but EXT-BF5xx-USB/Ethernet board has */
66 #ifndef __ADSPBF534__
67 #define ADI_CMDS_NETWORK 1
68 #define CONFIG_BFIN_MAC
69 #define CONFIG_NETCONSOLE 1
70 #define CONFIG_NET_MULTI 1
71 #endif
72 #define CONFIG_HOSTNAME tcm-bf537
73 /* Uncomment next line to use fixed MAC address */
74 /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
75
76
77 /*
78 * Flash Settings
79 */
80 #define CONFIG_FLASH_CFI_DRIVER
81 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
82 #define CONFIG_SYS_FLASH_BASE 0x20000000
83 #define CONFIG_SYS_FLASH_CFI
84 #define CONFIG_SYS_FLASH_PROTECTION
85 #define CONFIG_SYS_MAX_FLASH_BANKS 1
86 #define CONFIG_SYS_MAX_FLASH_SECT 67
87
88
89 /*
90 * Env Storage Settings
91 */
92 #define CONFIG_ENV_IS_IN_FLASH 1
93 #define CONFIG_ENV_OFFSET 0x4000
94 #define CONFIG_ENV_SIZE 0x2000
95 #define CONFIG_ENV_SECT_SIZE 0x20000
96 #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
97 #define ENV_IS_EMBEDDED
98 #else
99 #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
100 #endif
101 #ifdef ENV_IS_EMBEDDED
102 /* WARNING - the following is hand-optimized to fit within
103 * the sector before the environment sector. If it throws
104 * an error during compilation remove an object here to get
105 * it linked after the configuration sector.
106 */
107 # define LDS_BOARD_TEXT \
108 arch/blackfin/cpu/traps.o (.text .text.*); \
109 arch/blackfin/cpu/interrupt.o (.text .text.*); \
110 arch/blackfin/cpu/serial.o (.text .text.*); \
111 common/dlmalloc.o (.text .text.*); \
112 lib/crc32.o (.text .text.*); \
113 . = DEFINED(env_offset) ? env_offset : .; \
114 common/env_embedded.o (.text .text.*);
115 #endif
116
117
118 /*
119 * I2C Settings
120 */
121 #define CONFIG_BFIN_TWI_I2C 1
122 #define CONFIG_HARD_I2C 1
123
124
125 /*
126 * Misc Settings
127 */
128 #define CONFIG_BAUDRATE 115200
129 #define CONFIG_MISC_INIT_R
130 #define CONFIG_RTC_BFIN
131 #define CONFIG_UART_CONSOLE 0
132 #define CONFIG_BOOTCOMMAND "run flashboot"
133 #define FLASHBOOT_ENV_SETTINGS \
134 "flashboot=flread 20040000 1000000 280000;" \
135 "bootm 0x1000000\0"
136
137
138 /*
139 * Pull in common ADI header for remaining command/environment setup
140 */
141 #include <configs/bfin_adi_common.h>
142
143
144 #endif