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x86: Convert board_init_f_r to a processing loop
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1 /*
2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24 #ifndef __TEGRA2_COMMON_H
25 #define __TEGRA2_COMMON_H
26 #include <asm/sizes.h>
27
28 /*
29 * High Level Configuration Options
30 */
31 #define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */
32 #define CONFIG_TEGRA2 /* in a NVidia Tegra2 core */
33 #define CONFIG_MACH_TEGRA_GENERIC /* which is a Tegra generic machine */
34 #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
35
36 #define CONFIG_SYS_CACHELINE_SIZE 32
37
38 #define CONFIG_ARCH_CPU_INIT /* Fire up the A9 core */
39
40 #include <asm/arch/tegra2.h> /* get chip and board defs */
41
42 /*
43 * Display CPU and Board information
44 */
45 #define CONFIG_DISPLAY_CPUINFO
46 #define CONFIG_DISPLAY_BOARDINFO
47
48 #define CONFIG_SKIP_LOWLEVEL_INIT
49
50 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
51 #define CONFIG_OF_LIBFDT /* enable passing of devicetree */
52
53 /* Environment */
54 #define CONFIG_ENV_IS_NOWHERE
55 #define CONFIG_ENV_SIZE 0x20000 /* Total Size Environment */
56
57 /*
58 * Size of malloc() pool
59 */
60 #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
61
62 /*
63 * PllX Configuration
64 */
65 #define CONFIG_SYS_CPU_OSC_FREQUENCY 1000000 /* Set CPU clock to 1GHz */
66
67 /*
68 * NS16550 Configuration
69 */
70 #define V_NS16550_CLK 216000000 /* 216MHz (pllp_out0) */
71
72 #define CONFIG_SYS_NS16550
73 #define CONFIG_SYS_NS16550_SERIAL
74 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
75 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
76
77 /*
78 * select serial console configuration
79 */
80 #define CONFIG_CONS_INDEX 1
81
82 /* allow to overwrite serial and ethaddr */
83 #define CONFIG_ENV_OVERWRITE
84 #define CONFIG_BAUDRATE 115200
85 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
86 115200}
87
88 /* include default commands */
89 #include <config_cmd_default.h>
90
91 /* remove unused commands */
92 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
93 #undef CONFIG_CMD_FPGA /* FPGA configuration support */
94 #undef CONFIG_CMD_IMI
95 #undef CONFIG_CMD_IMLS
96 #undef CONFIG_CMD_NFS /* NFS support */
97 #undef CONFIG_CMD_NET /* network support */
98
99 /* turn on command-line edit/hist/auto */
100 #define CONFIG_CMDLINE_EDITING
101 #define CONFIG_COMMAND_HISTORY
102 #define CONFIG_AUTO_COMPLETE
103
104 #define CONFIG_SYS_NO_FLASH
105
106 /* Environment information */
107 #define CONFIG_EXTRA_ENV_SETTINGS \
108 "console=ttyS0,115200n8\0" \
109 "mem=" TEGRA2_SYSMEM "\0" \
110 "smpflag=smp\0" \
111
112 #define CONFIG_LOADADDR 0x408000 /* def. location for kernel */
113 #define CONFIG_BOOTDELAY 2 /* -1 to disable auto boot */
114
115 /*
116 * Miscellaneous configurable options
117 */
118 #define CONFIG_SYS_LONGHELP /* undef to save memory */
119 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
120 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
121 #define CONFIG_SYS_PROMPT V_PROMPT
122 /*
123 * Increasing the size of the IO buffer as default nfsargs size is more
124 * than 256 and so it is not possible to edit it
125 */
126 #define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */
127 /* Print Buffer Size */
128 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
129 sizeof(CONFIG_SYS_PROMPT) + 16)
130 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
131 /* Boot Argument Buffer Size */
132 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
133
134 #define CONFIG_SYS_MEMTEST_START (TEGRA2_SDRC_CS0 + 0x600000)
135 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
136
137 #define CONFIG_SYS_LOAD_ADDR (0xA00800) /* default */
138 #define CONFIG_SYS_HZ 1000
139
140 /*-----------------------------------------------------------------------
141 * Stack sizes
142 *
143 * The stack sizes are set up in start.S using the settings below
144 */
145 #define CONFIG_STACKBASE 0x2800000 /* 40MB */
146 #define CONFIG_STACKSIZE 0x20000 /* 128K regular stack*/
147
148 /*-----------------------------------------------------------------------
149 * Physical Memory Map
150 */
151 #define CONFIG_NR_DRAM_BANKS 1
152 #define PHYS_SDRAM_1 TEGRA2_SDRC_CS0
153 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
154
155 #define CONFIG_SYS_TEXT_BASE 0x00E08000
156 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
157
158 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
159 #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
160 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
161 CONFIG_SYS_INIT_RAM_SIZE - \
162 GENERATED_GBL_DATA_SIZE)
163
164 #define CONFIG_TEGRA2_GPIO
165 #define CONFIG_CMD_GPIO
166 #endif /* __TEGRA2_COMMON_H */