include/configs/ti_omap3_common.h

   1 /*
   2  * ti_omap3_common.h
   3  *
   4  * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  *
   8  * For more details, please see the technical documents listed at
   9  *   http://www.ti.com/product/omap3530
  10  *   http://www.ti.com/product/omap3630
  11  *   http://www.ti.com/product/dm3730
  12  */
  13
  14 #ifndef __CONFIG_TI_OMAP3_COMMON_H__
  15 #define __CONFIG_TI_OMAP3_COMMON_H__
  16
  17 /*
  18  * High Level Configuration Options
  19  */
  20
  21 #include <asm/arch/cpu.h>
  22 #include <asm/arch/omap.h>
  23
  24 /* The chip has SDRC controller */
  25 #define CONFIG_SDRC
  26
  27 /* Clock Defines */
  28 #define V_OSCK                  26000000        /* Clock output from T2 */
  29 #define V_SCLK                  (V_OSCK >> 1)
  30
  31 /* NS16550 Configuration */
  32 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  33 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  34 #ifdef CONFIG_SPL_BUILD
  35 # define CONFIG_SYS_NS16550_SERIAL
  36 # define CONFIG_SYS_NS16550_REG_SIZE    (-4)
  37 #endif
  38 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600, \
  39                                         115200}
  40
  41 /* Select serial console configuration */
  42 #define CONFIG_CONS_INDEX               3
  43 #ifdef CONFIG_SPL_BUILD
  44 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  45 #define CONFIG_SERIAL3                  3
  46 #endif
  47
  48 /* Physical Memory Map */
  49 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
  50 #define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
  51
  52 /*
  53  * OMAP3 has 12 GP timers, they can be driven by the system clock
  54  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
  55  * This rate is divided by a local divisor.
  56  */
  57 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
  58
  59 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
  60
  61 /* SPL */
  62 #define CONFIG_SPL_TEXT_BASE            0x40200800
  63 #define CONFIG_SPL_LDSCRIPT             "arch/arm/mach-omap2/u-boot-spl.lds"
  64 #define CONFIG_SYS_SPL_ARGS_ADDR        (CONFIG_SYS_SDRAM_BASE + \
  65                                          (64 << 20))
  66
  67 #ifdef CONFIG_NAND
  68 #define CONFIG_SPL_NAND_SIMPLE
  69 #define CONFIG_SYS_NAND_BASE            0x30000000
  70 #endif
  71
  72 /* Now bring in the rest of the common code. */
  73 #include <configs/ti_armv7_omap.h>
  74
  75 #endif  /* __CONFIG_TI_OMAP3_COMMON_H__ */