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1 /*
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian@popies.net>
4 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Copyright (C) 2009
7 * Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com>
8 *
9 * Configuation settings for the Calao TNY-A9260 and TNY-A9G20 boards
10 *
11 * See file CREDITS for list of people who contributed to this
12 * project.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * MA 02111-1307 USA
28 */
29
30 #ifndef __CONFIG_H
31 #define __CONFIG_H
32
33 /*
34 * SoC must be defined first, before hardware.h is included.
35 * In this case SoC is defined in boards.cfg.
36 */
37 #include <asm/hardware.h>
38
39 #if defined(CONFIG_TNY_A9260_NANDFLASH) || defined(CONFIG_TNY_A9G20_NANDFLASH)
40 #define CONFIG_ENV_IS_IN_NAND
41 #else
42 #define CONFIG_ENV_IS_IN_EEPROM
43 #endif
44
45 /* Define actual evaluation board type from used processor type */
46 #ifdef CONFIG_AT91SAM9G20
47 # define CONFIG_TNY_A9G20
48 # define MACH_TYPE_TNY_A9G20 2059
49 # define CONFIG_MACH_TYPE MACH_TYPE_TNY_A9G20
50 #else
51 # define CONFIG_TNY_A9260
52 # define MACH_TYPE_TNY_A9260 2058
53 # define CONFIG_MACH_TYPE MACH_TYPE_TNY_A9260
54 #endif
55
56 /* ARM asynchronous clock */
57 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
58 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
59 #define CONFIG_SYS_HZ 1000
60
61 #define CONFIG_ARCH_CPU_INIT
62 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
63 #define CONFIG_SETUP_MEMORY_TAGS
64 #define CONFIG_INITRD_TAG
65 #define CONFIG_SKIP_LOWLEVEL_INIT
66
67 /*
68 * Hardware drivers
69 */
70 #define CONFIG_ATMEL_LEGACY
71 #define CONFIG_AT91_GPIO
72
73 #define CONFIG_ATMEL_USART
74 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
75 #define CONFIG_USART_ID ATMEL_ID_SYS
76 #define CONFIG_BAUDRATE 115200
77
78 #define CONFIG_BOOTDELAY 3
79
80 /*
81 * Command line configuration.
82 */
83 #include <config_cmd_default.h>
84 #undef CONFIG_CMD_BDI
85 #undef CONFIG_CMD_FPGA
86 #undef CONFIG_CMD_IMI
87 #undef CONFIG_CMD_IMLS
88 #undef CONFIG_CMD_LOADS
89 #undef CONFIG_CMD_NET
90 #undef CONFIG_CMD_NFS
91 #undef CONFIG_CMD_SOURCE
92 #undef CONFIG_CMD_USB
93
94 /* SDRAM */
95 #define CONFIG_NR_DRAM_BANKS 1
96 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
97 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 megs */
98 # define CONFIG_SYS_INIT_SP_ADDR \
99 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
100
101 /* SPI EEPROM */
102 #define CONFIG_SPI
103 #define CONFIG_CMD_SPI
104 #define CONFIG_ATMEL_SPI
105 #define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
106
107 #define CONFIG_CMD_EEPROM
108 #define CONFIG_SPI_M95XXX
109 #define CONFIG_SYS_EEPROM_SIZE 0x10000
110 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5
111
112 /* NAND flash */
113 #define CONFIG_CMD_NAND
114 #define CONFIG_NAND_ATMEL
115 #define CONFIG_SYS_MAX_NAND_DEVICE 1
116 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
117 #define CONFIG_SYS_NAND_DBW_8
118 /* our ALE is AD21 */
119 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
120 /* our CLE is AD22 */
121 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
122 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
123 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
124
125 /* NOR flash - no real flash on this board */
126 #define CONFIG_SYS_NO_FLASH
127
128 #define CONFIG_DOS_PARTITION
129 #define CONFIG_CMD_FAT
130
131 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
132
133 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
134 #define CONFIG_SYS_MEMTEST_END 0x23e00000
135
136 /* Env in EEPROM, bootstrap + u-boot in NAND*/
137 #ifdef CONFIG_ENV_IS_IN_EEPROM
138 #define CONFIG_ENV_OFFSET 0x20
139 #define CONFIG_ENV_SIZE 0x1000
140 #endif
141
142 /* Env, bootstrap and u-boot in NAND */
143 #ifdef CONFIG_ENV_IS_IN_NAND
144 #define CONFIG_ENV_OFFSET 0x60000
145 #define CONFIG_ENV_OFFSET_REDUND 0x80000
146 #define CONFIG_ENV_SIZE 0x20000
147 #endif
148
149 #define CONFIG_BOOTCOMMAND "nboot 0x21000000 0 400000"
150 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
151 "root=/dev/mtdblock1 " \
152 "mtdparts=atmel_nand:16M(kernel)ro," \
153 "120M(rootfs),-(other) " \
154 "rw rootfstype=jffs2"
155
156 #define CONFIG_SYS_PROMPT "U-Boot> "
157 #define CONFIG_SYS_CBSIZE 256
158 #define CONFIG_SYS_MAXARGS 16
159 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
160 #define CONFIG_SYS_LONGHELP
161 #define CONFIG_CMDLINE_EDITING
162
163 /*
164 * Size of malloc() pool
165 */
166 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
167
168 #endif