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1 /*
2 * Copyright (C) 2011 Samsung Electronics
3 * Heungjun Kim <riverful.kim@samsung.com>
4 *
5 * Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board.
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef __CONFIG_TRATS_H
11 #define __CONFIG_TRATS_H
12
13 #include <configs/exynos4-common.h>
14
15 #define CONFIG_TRATS
16
17 #define CONFIG_TIZEN /* TIZEN lib */
18
19 #define CONFIG_SYS_L2CACHE_OFF
20 #ifndef CONFIG_SYS_L2CACHE_OFF
21 #define CONFIG_SYS_L2_PL310
22 #define CONFIG_SYS_PL310_BASE 0x10502000
23 #endif
24
25 /* TRATS has 4 banks of DRAM */
26 #define CONFIG_NR_DRAM_BANKS 4
27 #define CONFIG_SYS_SDRAM_BASE 0x40000000
28 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
29 #define CONFIG_SYS_TEXT_BASE 0x63300000
30 #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
31
32 /* memtest works on */
33 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
34 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
35 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
36
37 #define CONFIG_SYS_TEXT_BASE 0x63300000
38
39 /* select serial console configuration */
40 #define CONFIG_SERIAL2
41
42 #define CONFIG_MACH_TYPE MACH_TYPE_TRATS
43
44 #define CONFIG_BOOTARGS "Please use defined boot"
45 #define CONFIG_BOOTCOMMAND "run autoboot"
46 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
47
48 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
49 - GENERATED_GBL_DATA_SIZE)
50
51 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
52
53 #define CONFIG_SYS_MONITOR_BASE 0x00000000
54
55 #define CONFIG_BOOTBLOCK "10"
56 #define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}"
57
58 #define CONFIG_ENV_IS_IN_MMC
59 #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
60 #define CONFIG_ENV_SIZE 4096
61 #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
62
63 #define CONFIG_ENV_OVERWRITE
64
65 #define CONFIG_ENV_VARS_UBOOT_CONFIG
66 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
67
68 /* Tizen - partitions definitions */
69 #define PARTS_CSA "csa-mmc"
70 #define PARTS_BOOT "boot"
71 #define PARTS_QBOOT "qboot"
72 #define PARTS_CSC "csc"
73 #define PARTS_ROOT "platform"
74 #define PARTS_DATA "data"
75 #define PARTS_UMS "ums"
76
77 #define PARTS_DEFAULT \
78 "uuid_disk=${uuid_gpt_disk};" \
79 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
80 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
81 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
82 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
83 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
84 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
85 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
86
87 #define CONFIG_DFU_ALT \
88 "u-boot raw 0x80 0x400;" \
89 "/uImage ext4 0 2;" \
90 "/modem.bin ext4 0 2;" \
91 "/exynos4210-trats.dtb ext4 0 2;" \
92 ""PARTS_CSA" part 0 1;" \
93 ""PARTS_BOOT" part 0 2;" \
94 ""PARTS_QBOOT" part 0 3;" \
95 ""PARTS_CSC" part 0 4;" \
96 ""PARTS_ROOT" part 0 5;" \
97 ""PARTS_DATA" part 0 6;" \
98 ""PARTS_UMS" part 0 7;" \
99 "params.bin raw 0x38 0x8;" \
100 "/Image.itb ext4 0 2\0"
101
102 #define CONFIG_EXTRA_ENV_SETTINGS \
103 "bootk=" \
104 "run loaduimage;" \
105 "if run loaddtb; then " \
106 "bootm 0x40007FC0 - ${fdtaddr};" \
107 "fi;" \
108 "bootm 0x40007FC0;\0" \
109 "updatebackup=" \
110 "mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \
111 "mmc dev 0 0\0" \
112 "updatebootb=" \
113 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
114 "lpj=lpj=3981312\0" \
115 "nfsboot=" \
116 "setenv bootargs root=/dev/nfs rw " \
117 "nfsroot=${nfsroot},nolock,tcp " \
118 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
119 "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
120 "; run bootk\0" \
121 "ramfsboot=" \
122 "setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \
123 "${console} ${meminfo} " \
124 "initrd=0x43000000,8M ramdisk=8192\0" \
125 "mmcboot=" \
126 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
127 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
128 "run bootk\0" \
129 "bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \
130 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
131 "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
132 "verify=n\0" \
133 "rootfstype=ext4\0" \
134 "console=" CONFIG_DEFAULT_CONSOLE \
135 "meminfo=crashkernel=32M@0x50000000\0" \
136 "nfsroot=/nfsroot/arm\0" \
137 "bootblock=" CONFIG_BOOTBLOCK "\0" \
138 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
139 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
140 "${fdtfile}\0" \
141 "mmcdev=0\0" \
142 "mmcbootpart=2\0" \
143 "mmcrootpart=5\0" \
144 "opts=always_resume=1\0" \
145 "partitions=" PARTS_DEFAULT \
146 "dfu_alt_info=" CONFIG_DFU_ALT \
147 "spladdr=0x40000100\0" \
148 "splsize=0x200\0" \
149 "splfile=falcon.bin\0" \
150 "spl_export=" \
151 "setexpr spl_imgsize ${splsize} + 8 ;" \
152 "setenv spl_imgsize 0x${spl_imgsize};" \
153 "setexpr spl_imgaddr ${spladdr} - 8 ;" \
154 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
155 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
156 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
157 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
158 "spl export atags 0x40007FC0;" \
159 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
160 "mw.l ${spl_addr_tmp} ${splsize};" \
161 "ext4write mmc ${mmcdev}:${mmcbootpart}" \
162 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
163 "setenv spl_imgsize;" \
164 "setenv spl_imgaddr;" \
165 "setenv spl_addr_tmp;\0" \
166 CONFIG_EXTRA_ENV_ITB \
167 "fdtaddr=40800000\0" \
168
169 /* Falcon mode definitions */
170 #define CONFIG_CMD_SPL
171 #define CONFIG_SYS_SPL_ARGS_ADDR CONFIG_SYS_SDRAM_BASE + 0x100
172
173 /* GPT */
174 #define CONFIG_RANDOM_UUID
175
176 /* Security subsystem - enable hw_rand() */
177 #define CONFIG_EXYNOS_ACE_SHA
178 #define CONFIG_LIB_HW_RAND
179
180 /* Common misc for Samsung */
181 #define CONFIG_MISC_COMMON
182
183 #define CONFIG_MISC_INIT_R
184
185 /* Download menu - Samsung common */
186 #define CONFIG_LCD_MENU
187 #define CONFIG_LCD_MENU_BOARD
188
189 /* Download menu - definitions for check keys */
190 #ifndef __ASSEMBLY__
191 #include <power/max8997_pmic.h>
192
193 #define KEY_PWR_PMIC_NAME "MAX8997_PMIC"
194 #define KEY_PWR_STATUS_REG MAX8997_REG_STATUS1
195 #define KEY_PWR_STATUS_MASK (1 << 0)
196 #define KEY_PWR_INTERRUPT_REG MAX8997_REG_INT1
197 #define KEY_PWR_INTERRUPT_MASK (1 << 0)
198
199 #define KEY_VOL_UP_GPIO EXYNOS4_GPIO_X20
200 #define KEY_VOL_DOWN_GPIO EXYNOS4_GPIO_X21
201 #endif /* __ASSEMBLY__ */
202
203 /* LCD console */
204 #define LCD_BPP LCD_COLOR16
205 #define CONFIG_SYS_WHITE_ON_BLACK
206
207 /* LCD */
208 #define CONFIG_BMP_16BPP
209 #define CONFIG_FB_ADDR 0x52504000
210 #define CONFIG_EXYNOS_MIPI_DSIM
211 #define CONFIG_VIDEO_BMP_GZIP
212 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
213
214 #endif /* __CONFIG_H */