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1 /*
2 * Copyright (C) 2013 Samsung Electronics
3 * Sanghee Kim <sh0130.kim@samsung.com>
4 * Piotr Wilczek <p.wilczek@samsung.com>
5 *
6 * Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board.
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 */
10
11 #ifndef __CONFIG_TRATS2_H
12 #define __CONFIG_TRATS2_H
13
14 #include <configs/exynos4-dt.h>
15
16 #define CONFIG_SYS_PROMPT "Trats2 # " /* Monitor Command Prompt */
17
18 #undef CONFIG_DEFAULT_DEVICE_TREE
19 #define CONFIG_DEFAULT_DEVICE_TREE exynos4412-trats2
20
21 #define CONFIG_TIZEN /* TIZEN lib */
22
23 #define CONFIG_SYS_L2CACHE_OFF
24 #ifndef CONFIG_SYS_L2CACHE_OFF
25 #define CONFIG_SYS_L2_PL310
26 #define CONFIG_SYS_PL310_BASE 0x10502000
27 #endif
28
29 /* TRATS2 has 4 banks of DRAM */
30 #define CONFIG_NR_DRAM_BANKS 4
31 #define CONFIG_SYS_SDRAM_BASE 0x40000000
32 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
33 #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
34 /* memtest works on */
35 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
36 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
37 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
38
39 #define CONFIG_SYS_TEXT_BASE 0x43e00000
40
41 #include <linux/sizes.h>
42 /* Size of malloc() pool */
43 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M))
44
45 /* select serial console configuration */
46 #define CONFIG_SERIAL2
47 #define CONFIG_BAUDRATE 115200
48
49 /* Console configuration */
50 #define CONFIG_SYS_CONSOLE_INFO_QUIET
51 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
52
53 #define CONFIG_BOOTARGS "Please use defined boot"
54 #define CONFIG_BOOTCOMMAND "run mmcboot"
55 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
56
57 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
58 - GENERATED_GBL_DATA_SIZE)
59
60 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
61
62 #define CONFIG_SYS_MONITOR_BASE 0x00000000
63
64 #define CONFIG_ENV_IS_IN_MMC
65 #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
66 #define CONFIG_ENV_SIZE 4096
67 #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
68
69 #define CONFIG_ENV_OVERWRITE
70
71 #define CONFIG_ENV_VARS_UBOOT_CONFIG
72 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
73
74 /* Tizen - partitions definitions */
75 #define PARTS_CSA "csa-mmc"
76 #define PARTS_BOOT "boot"
77 #define PARTS_QBOOT "qboot"
78 #define PARTS_CSC "csc"
79 #define PARTS_ROOT "platform"
80 #define PARTS_DATA "data"
81 #define PARTS_UMS "ums"
82
83 #define PARTS_DEFAULT \
84 "uuid_disk=${uuid_gpt_disk};" \
85 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
86 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
87 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
88 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
89 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
90 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
91 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
92
93 #define CONFIG_DFU_ALT \
94 "u-boot raw 0x80 0x800;" \
95 "/uImage ext4 0 2;" \
96 "/modem.bin ext4 0 2;" \
97 "/exynos4412-trats2.dtb ext4 0 2;" \
98 ""PARTS_CSA" part 0 1;" \
99 ""PARTS_BOOT" part 0 2;" \
100 ""PARTS_QBOOT" part 0 3;" \
101 ""PARTS_CSC" part 0 4;" \
102 ""PARTS_ROOT" part 0 5;" \
103 ""PARTS_DATA" part 0 6;" \
104 ""PARTS_UMS" part 0 7;" \
105 "params.bin raw 0x38 0x8\0"
106
107 #define CONFIG_EXTRA_ENV_SETTINGS \
108 "bootk=" \
109 "run loaduimage;" \
110 "if run loaddtb; then " \
111 "bootm 0x40007FC0 - ${fdtaddr};" \
112 "fi;" \
113 "bootm 0x40007FC0;\0" \
114 "updatebackup=" \
115 "mmc dev 0 2; mmc write 0x51000000 0 0x800;" \
116 " mmc dev 0 0\0" \
117 "updatebootb=" \
118 "mmc read 0x51000000 0x80 0x800; run updatebackup\0" \
119 "mmcboot=" \
120 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
121 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
122 "run bootk\0" \
123 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
124 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
125 "verify=n\0" \
126 "rootfstype=ext4\0" \
127 "console=" CONFIG_DEFAULT_CONSOLE \
128 "kernelname=uImage\0" \
129 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \
130 "${kernelname}\0" \
131 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
132 "${fdtfile}\0" \
133 "mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \
134 "mmcbootpart=2\0" \
135 "mmcrootpart=5\0" \
136 "opts=always_resume=1\0" \
137 "partitions=" PARTS_DEFAULT \
138 "dfu_alt_info=" CONFIG_DFU_ALT \
139 "uartpath=ap\0" \
140 "usbpath=ap\0" \
141 "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
142 "consoleoff=set console console=ram; save; reset\0" \
143 "spladdr=0x40000100\0" \
144 "splsize=0x200\0" \
145 "splfile=falcon.bin\0" \
146 "spl_export=" \
147 "setexpr spl_imgsize ${splsize} + 8 ;" \
148 "setenv spl_imgsize 0x${spl_imgsize};" \
149 "setexpr spl_imgaddr ${spladdr} - 8 ;" \
150 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
151 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
152 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
153 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
154 "spl export atags 0x40007FC0;" \
155 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
156 "mw.l ${spl_addr_tmp} ${splsize};" \
157 "ext4write mmc ${mmcdev}:${mmcbootpart}" \
158 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
159 "setenv spl_imgsize;" \
160 "setenv spl_imgaddr;" \
161 "setenv spl_addr_tmp;\0" \
162 "fdtaddr=40800000\0" \
163
164 /* GPT */
165 #define CONFIG_RANDOM_UUID
166
167 /* I2C */
168 #include <asm/arch/gpio.h>
169
170 #define CONFIG_CMD_I2C
171
172 #define CONFIG_SYS_I2C
173 #define CONFIG_SYS_I2C_S3C24X0
174 #define CONFIG_SYS_I2C_S3C24X0_SPEED 100000
175 #define CONFIG_SYS_I2C_S3C24X0_SLAVE 0
176 #define CONFIG_MAX_I2C_NUM 8
177 #define CONFIG_SYS_I2C_SOFT
178 #define CONFIG_SYS_I2C_SOFT_SPEED 50000
179 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
180 #define I2C_SOFT_DECLARATIONS2
181 #define CONFIG_SYS_I2C_SOFT_SPEED_2 50000
182 #define CONFIG_SYS_I2C_SOFT_SLAVE_2 0x00
183 #define CONFIG_SOFT_I2C_READ_REPEATED_START
184 #define CONFIG_SYS_I2C_INIT_BOARD
185
186 #ifndef __ASSEMBLY__
187 int get_soft_i2c_scl_pin(void);
188 int get_soft_i2c_sda_pin(void);
189 #endif
190 #define CONFIG_SOFT_I2C_GPIO_SCL get_soft_i2c_scl_pin()
191 #define CONFIG_SOFT_I2C_GPIO_SDA get_soft_i2c_sda_pin()
192
193 /* POWER */
194 #define CONFIG_POWER
195 #define CONFIG_POWER_I2C
196 #define CONFIG_POWER_MAX77686
197 #define CONFIG_POWER_PMIC_MAX77693
198 #define CONFIG_POWER_MUIC_MAX77693
199 #define CONFIG_POWER_FG_MAX77693
200 #define CONFIG_POWER_BATTERY_TRATS2
201
202 /* Security subsystem - enable hw_rand() */
203 #define CONFIG_EXYNOS_ACE_SHA
204 #define CONFIG_LIB_HW_RAND
205
206 /* Common misc for Samsung */
207 #define CONFIG_MISC_COMMON
208
209 #define CONFIG_MISC_INIT_R
210
211 /* Download menu - Samsung common */
212 #define CONFIG_LCD_MENU
213 #define CONFIG_LCD_MENU_BOARD
214
215 /* Download menu - definitions for check keys */
216 #ifndef __ASSEMBLY__
217 #include <power/max77686_pmic.h>
218
219 #define KEY_PWR_PMIC_NAME "MAX77686_PMIC"
220 #define KEY_PWR_STATUS_REG MAX77686_REG_PMIC_STATUS1
221 #define KEY_PWR_STATUS_MASK (1 << 0)
222 #define KEY_PWR_INTERRUPT_REG MAX77686_REG_PMIC_INT1
223 #define KEY_PWR_INTERRUPT_MASK (1 << 1)
224
225 #define KEY_VOL_UP_GPIO EXYNOS4X12_GPIO_X22
226 #define KEY_VOL_DOWN_GPIO EXYNOS4X12_GPIO_X33
227 #endif /* __ASSEMBLY__ */
228
229 /* LCD console */
230 #define LCD_BPP LCD_COLOR16
231 #define CONFIG_SYS_WHITE_ON_BLACK
232
233 /* LCD */
234 #define CONFIG_EXYNOS_FB
235 #define CONFIG_LCD
236 #define CONFIG_CMD_BMP
237 #define CONFIG_BMP_16BPP
238 #define CONFIG_FB_ADDR 0x52504000
239 #define CONFIG_S6E8AX0
240 #define CONFIG_EXYNOS_MIPI_DSIM
241 #define CONFIG_VIDEO_BMP_GZIP
242 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
243
244 #endif /* __CONFIG_H */