include/configs/tricorder.h

   1 /*
   2  * (C) Copyright 2006-2008
   3  * Texas Instruments.
   4  * Richard Woodruff <r-woodruff2@ti.com>
   5  * Syed Mohammed Khasim <x0khasim@ti.com>
   6  *
   7  * (C) Copyright 2012
   8  * Corscience GmbH & Co. KG
   9  * Thomas Weber <weber@corscience.de>
  10  *
  11  * Configuration settings for the Tricorder board.
  12  *
  13  * SPDX-License-Identifier:     GPL-2.0+
  14  */
  15
  16 #ifndef __CONFIG_H
  17 #define __CONFIG_H
  18
  19 /* High Level Configuration Options */
  20 #define CONFIG_SYS_THUMB_BUILD
  21 #define CONFIG_OMAP                     /* in a TI OMAP core */
  22 #define CONFIG_OMAP_COMMON
  23 /* Common ARM Erratas */
  24 #define CONFIG_ARM_ERRATA_454179
  25 #define CONFIG_ARM_ERRATA_430973
  26 #define CONFIG_ARM_ERRATA_621766
  27
  28 #define CONFIG_MACH_TYPE                MACH_TYPE_TRICORDER
  29 /*
  30  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
  31  * 64 bytes before this address should be set aside for u-boot.img's
  32  * header. That is 0x800FFFC0--0x80100000 should not be used for any
  33  * other needs.
  34  */
  35 #define CONFIG_SYS_TEXT_BASE            0x80100000
  36
  37 #define CONFIG_SDRC                     /* The chip has SDRC controller */
  38
  39 #include <asm/arch/cpu.h>               /* get chip and board defs */
  40 #include <asm/arch/omap.h>
  41
  42 /* Clock Defines */
  43 #define V_OSCK                          26000000 /* Clock output from T2 */
  44 #define V_SCLK                          (V_OSCK >> 1)
  45
  46 #define CONFIG_MISC_INIT_R
  47
  48 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
  49 #define CONFIG_SETUP_MEMORY_TAGS
  50 #define CONFIG_INITRD_TAG
  51 #define CONFIG_REVISION_TAG
  52
  53 /* Size of malloc() pool */
  54 #define CONFIG_SYS_MALLOC_LEN           (1024*1024)
  55
  56 /* Hardware drivers */
  57
  58 /* GPIO support */
  59 #define CONFIG_OMAP_GPIO
  60
  61 /* GPIO banks */
  62 #define CONFIG_OMAP3_GPIO_2             /* GPIO32..63 are in GPIO bank 2 */
  63
  64 /* LED support */
  65 #define CONFIG_STATUS_LED
  66 #define CONFIG_BOARD_SPECIFIC_LED
  67 #define CONFIG_CMD_LED                  /* LED command */
  68 #define STATUS_LED_BIT                  (1 << 0)
  69 #define STATUS_LED_STATE                STATUS_LED_ON
  70 #define STATUS_LED_PERIOD               (CONFIG_SYS_HZ / 2)
  71 #define STATUS_LED_BIT1                 (1 << 1)
  72 #define STATUS_LED_STATE1               STATUS_LED_ON
  73 #define STATUS_LED_PERIOD1              (CONFIG_SYS_HZ / 2)
  74 #define STATUS_LED_BIT2                 (1 << 2)
  75 #define STATUS_LED_STATE2               STATUS_LED_ON
  76 #define STATUS_LED_PERIOD2              (CONFIG_SYS_HZ / 2)
  77
  78 /* NS16550 Configuration */
  79 #define CONFIG_SYS_NS16550_SERIAL
  80 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  81 #define CONFIG_SYS_NS16550_CLK          48000000 /* 48MHz (APLL96/2) */
  82
  83 /* select serial console configuration */
  84 #define CONFIG_CONS_INDEX               3
  85 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  86 #define CONFIG_SERIAL3                  3
  87 #define CONFIG_BAUDRATE                 115200
  88 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  89                                         115200}
  90
  91 /* MMC */
  92 #define CONFIG_GENERIC_MMC
  93 #define CONFIG_MMC
  94 #define CONFIG_OMAP_HSMMC
  95 #define CONFIG_DOS_PARTITION
  96
  97 /* I2C */
  98 #define CONFIG_SYS_I2C
  99 #define CONFIG_SYS_OMAP24_I2C_SPEED     100000
 100 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
 101 #define CONFIG_SYS_I2C_OMAP34XX
 102
 103
 104 /* EEPROM */
 105 #define CONFIG_CMD_EEPROM
 106 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2
 107 #define CONFIG_SYS_EEPROM_BUS_NUM       1
 108
 109 /* TWL4030 */
 110 #define CONFIG_TWL4030_POWER
 111 #define CONFIG_TWL4030_LED
 112
 113 /* Board NAND Info */
 114 #define CONFIG_SYS_NO_FLASH             /* no NOR flash */
 115 #define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
 116 #define MTDIDS_DEFAULT                  "nand0=omap2-nand.0"
 117 #define MTDPARTS_DEFAULT                "mtdparts=omap2-nand.0:" \
 118                                                 "128k(SPL)," \
 119                                                 "1m(u-boot)," \
 120                                                 "384k(u-boot-env1)," \
 121                                                 "1152k(mtdoops)," \
 122                                                 "384k(u-boot-env2)," \
 123                                                 "5m(kernel)," \
 124                                                 "2m(fdt)," \
 125                                                 "-(ubi)"
 126
 127 #define CONFIG_NAND_OMAP_GPMC
 128 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 129                                                         /* to access nand */
 130 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 131                                                         /* to access nand at */
 132                                                         /* CS0 */
 133 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
 134                                                         /* devices */
 135 #define CONFIG_BCH
 136 #define CONFIG_SYS_NAND_MAX_OOBFREE     2
 137 #define CONFIG_SYS_NAND_MAX_ECCPOS      56
 138
 139 /* commands to include */
 140 #define CONFIG_CMD_MTDPARTS             /* Enable MTD parts commands */
 141 #define CONFIG_CMD_NAND                 /* NAND support */
 142 #define CONFIG_CMD_NAND_LOCK_UNLOCK     /* nand (un)lock commands */
 143 #define CONFIG_CMD_UBIFS                /* UBIFS commands */
 144 #define CONFIG_LZO                      /* LZO is needed for UBIFS */
 145
 146 #undef CONFIG_CMD_JFFS2                 /* JFFS2 Support */
 147
 148 /* needed for ubi */
 149 #define CONFIG_RBTREE
 150 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
 151 #define CONFIG_MTD_PARTITIONS
 152
 153 /* Environment information (this is the common part) */
 154
 155
 156 /* hang() the board on panic() */
 157 #define CONFIG_PANIC_HANG
 158
 159 /* environment placement (for NAND), is different for FLASHCARD but does not
 160  * harm there */
 161 #define CONFIG_ENV_OFFSET               0x120000    /* env start */
 162 #define CONFIG_ENV_OFFSET_REDUND        0x2A0000    /* redundant env start */
 163 #define CONFIG_ENV_SIZE                 (16 << 10)  /* use 16KiB for env */
 164 #define CONFIG_ENV_RANGE                (384 << 10) /* allow badblocks in env */
 165
 166 /* the loadaddr is the same as CONFIG_SYS_LOAD_ADDR, unfortunately the defiend
 167  * value can not be used here! */
 168 #define CONFIG_LOADADDR         0x82000000
 169
 170 #define CONFIG_COMMON_ENV_SETTINGS \
 171         "console=ttyO2,115200n8\0" \
 172         "mmcdev=0\0" \
 173         "vram=3M\0" \
 174         "defaultdisplay=lcd\0" \
 175         "kernelopts=mtdoops.mtddev=3\0" \
 176         "mtdparts=" MTDPARTS_DEFAULT "\0" \
 177         "mtdids=" MTDIDS_DEFAULT "\0" \
 178         "commonargs=" \
 179                 "setenv bootargs console=${console} " \
 180                 "${mtdparts} " \
 181                 "${kernelopts} " \
 182                 "vt.global_cursor_default=0 " \
 183                 "vram=${vram} " \
 184                 "omapdss.def_disp=${defaultdisplay}\0"
 185
 186 #define CONFIG_BOOTCOMMAND "run autoboot"
 187
 188 /* specific environment settings for different use cases
 189  * FLASHCARD: used to run a rdimage from sdcard to program the device
 190  * 'NORMAL': used to boot kernel from sdcard, nand, ...
 191  *
 192  * The main aim for the FLASHCARD skin is to have an embedded environment
 193  * which will not be influenced by any data already on the device.
 194  */
 195 #ifdef CONFIG_FLASHCARD
 196
 197 #define CONFIG_ENV_IS_NOWHERE
 198
 199 /* the rdaddr is 16 MiB before the loadaddr */
 200 #define CONFIG_ENV_RDADDR       "rdaddr=0x81000000\0"
 201
 202 #define CONFIG_EXTRA_ENV_SETTINGS \
 203         CONFIG_COMMON_ENV_SETTINGS \
 204         CONFIG_ENV_RDADDR \
 205         "autoboot=" \
 206         "run commonargs; " \
 207         "setenv bootargs ${bootargs} " \
 208                 "flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \
 209                 "rdinit=/sbin/init; " \
 210         "mmc dev ${mmcdev}; mmc rescan; " \
 211         "fatload mmc ${mmcdev} ${loadaddr} uImage; " \
 212         "fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \
 213         "bootm ${loadaddr} ${rdaddr}\0"
 214
 215 #else /* CONFIG_FLASHCARD */
 216
 217 #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */
 218
 219 #define CONFIG_ENV_IS_IN_NAND
 220
 221 #define CONFIG_EXTRA_ENV_SETTINGS \
 222         CONFIG_COMMON_ENV_SETTINGS \
 223         "mmcargs=" \
 224                 "run commonargs; " \
 225                 "setenv bootargs ${bootargs} " \
 226                 "root=/dev/mmcblk0p2 " \
 227                 "rootwait " \
 228                 "rw\0" \
 229         "nandargs=" \
 230                 "run commonargs; " \
 231                 "setenv bootargs ${bootargs} " \
 232                 "root=ubi0:root " \
 233                 "ubi.mtd=7 " \
 234                 "rootfstype=ubifs " \
 235                 "ro\0" \
 236         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
 237         "bootscript=echo Running bootscript from mmc ...; " \
 238                 "source ${loadaddr}\0" \
 239         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 240         "mmcboot=echo Booting from mmc ...; " \
 241                 "run mmcargs; " \
 242                 "bootm ${loadaddr}\0" \
 243         "loaduimage_ubi=ubi part ubi; " \
 244                 "ubifsmount ubi:root; " \
 245                 "ubifsload ${loadaddr} /boot/uImage\0" \
 246         "loaduimage_nand=nand read ${loadaddr} kernel 0x500000\0" \
 247         "nandboot=echo Booting from nand ...; " \
 248                 "run nandargs; " \
 249                 "run loaduimage_nand; " \
 250                 "bootm ${loadaddr}\0" \
 251         "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
 252                         "if run loadbootscript; then " \
 253                                 "run bootscript; " \
 254                         "else " \
 255                                 "if run loaduimage; then " \
 256                                         "run mmcboot; " \
 257                                 "else run nandboot; " \
 258                                 "fi; " \
 259                         "fi; " \
 260                 "else run nandboot; fi\0"
 261
 262 #endif /* CONFIG_FLASHCARD */
 263
 264 /* Miscellaneous configurable options */
 265 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
 266 #define CONFIG_CMDLINE_EDITING          /* enable cmdline history */
 267 #define CONFIG_AUTO_COMPLETE
 268 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 269 /* Print Buffer Size */
 270 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 271                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 272 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 273
 274 /* Boot Argument Buffer Size */
 275 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 276
 277 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0 + 0x00000000)
 278 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + \
 279                                         0x07000000) /* 112 MB */
 280
 281 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0 + 0x02000000)
 282
 283 /*
 284  * OMAP3 has 12 GP timers, they can be driven by the system clock
 285  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 286  * This rate is divided by a local divisor.
 287  */
 288 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
 289 #define CONFIG_SYS_PTV                  2 /* Divisor: 2^(PTV+1) => 8 */
 290
 291 /*  Physical Memory Map  */
 292 #define CONFIG_NR_DRAM_BANKS            2 /* CS1 may or may not be populated */
 293 #define PHYS_SDRAM_1                    OMAP34XX_SDRC_CS0
 294 #define PHYS_SDRAM_2                    OMAP34XX_SDRC_CS1
 295
 296 /* NAND and environment organization  */
 297 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 298
 299 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 300 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 301 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
 302 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
 303                                                 CONFIG_SYS_INIT_RAM_SIZE - \
 304                                                 GENERATED_GBL_DATA_SIZE)
 305
 306 /* SRAM config */
 307 #define CONFIG_SYS_SRAM_START           0x40200000
 308 #define CONFIG_SYS_SRAM_SIZE            0x10000
 309
 310 /* Defines for SPL */
 311 #define CONFIG_SPL_FRAMEWORK
 312 #define CONFIG_SPL_NAND_SIMPLE
 313
 314 #define CONFIG_SPL_BOARD_INIT
 315 #define CONFIG_SPL_NAND_BASE
 316 #define CONFIG_SPL_NAND_DRIVERS
 317 #define CONFIG_SPL_NAND_ECC
 318 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
 319 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME        "u-boot.img"
 320 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
 321
 322 #define CONFIG_SPL_TEXT_BASE            0x40200000 /*CONFIG_SYS_SRAM_START*/
 323 #define CONFIG_SPL_MAX_SIZE             (SRAM_SCRATCH_SPACE_ADDR - \
 324                                          CONFIG_SPL_TEXT_BASE)
 325
 326 #define CONFIG_SPL_BSS_START_ADDR       0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
 327 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
 328
 329 /* NAND boot config */
 330 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 331 #define CONFIG_SYS_NAND_PAGE_COUNT      64
 332 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
 333 #define CONFIG_SYS_NAND_OOBSIZE         64
 334 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
 335 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
 336 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
 337                                          13, 14, 16, 17, 18, 19, 20, 21, 22, \
 338                                          23, 24, 25, 26, 27, 28, 30, 31, 32, \
 339                                          33, 34, 35, 36, 37, 38, 39, 40, 41, \
 340                                          42, 44, 45, 46, 47, 48, 49, 50, 51, \
 341                                          52, 53, 54, 55, 56}
 342
 343 #define CONFIG_SYS_NAND_ECCSIZE         512
 344 #define CONFIG_SYS_NAND_ECCBYTES        13
 345 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
 346
 347 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 348
 349 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x20000
 350 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x100000
 351
 352 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
 353 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000        /* 1 MB */
 354
 355 #define CONFIG_SYS_ALT_MEMTEST
 356 #define CONFIG_SYS_MEMTEST_SCRATCH      0x81000000
 357 #endif /* __CONFIG_H */