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git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/ts4800.h
2 * Copyright (C) 2015, Savoir-faire Linux Inc.
4 * Derived from MX51EVK code by
5 * Guennadi Liakhovetski <lg@denx.de>
6 * Freescale Semiconductor, Inc.
8 * Configuration settings for the TS4800 Board
10 * SPDX-License-Identifier: GPL-2.0+
16 /* High Level Configuration Options */
18 #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage bootloader */
20 #define CONFIG_HW_WATCHDOG
22 #define CONFIG_MACH_TYPE MACH_TYPE_TS48XX
24 /* text base address used when linking */
25 #define CONFIG_SYS_TEXT_BASE 0x90008000
27 #include <asm/arch/imx-regs.h>
29 /* enable passing of ATAGs */
30 #define CONFIG_CMDLINE_TAG
31 #define CONFIG_SETUP_MEMORY_TAGS
32 #define CONFIG_INITRD_TAG
33 #define CONFIG_REVISION_TAG
36 * Size of malloc() pool
38 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
44 #define CONFIG_MXC_UART
45 #define CONFIG_MXC_UART_BASE UART1_BASE
50 #define CONFIG_HARD_SPI /* puts SPI: ready */
51 #define CONFIG_MXC_SPI /* driver for the SPI controllers*/
56 #define CONFIG_FSL_ESDHC
57 #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
63 #define CONFIG_PHY_SMSC
65 #define CONFIG_FEC_MXC
66 #define IMX_FEC_BASE FEC_BASE_ADDR
67 #define CONFIG_ETHPRIME "FEC"
68 #define CONFIG_FEC_MXC_PHYADDR 0
70 /* allow to overwrite serial and ethaddr */
71 #define CONFIG_ENV_OVERWRITE /* disable vendor parameters protection (serial#, ethaddr) */
72 #define CONFIG_CONS_INDEX 1 /* use UART0 : used by serial driver */
74 /***********************************************************
76 ***********************************************************/
78 /* Environment variables */
81 #define CONFIG_LOADADDR 0x91000000 /* loadaddr env var */
83 #define CONFIG_EXTRA_ENV_SETTINGS \
86 "fdt_file=imx51-ts4800.dtb\0" \
87 "fdt_addr=0x90fe0000\0" \
90 "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
91 "mmcargs=setenv bootargs root=${mmcroot}\0" \
92 "addtty=setenv bootargs ${bootargs} console=ttymxc0,${baudrate}\0" \
94 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
95 "bootscript=echo Running bootscript from mmc ...; " \
97 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image};\0" \
98 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
99 "mmcboot=echo Booting from mmc ...; " \
100 "run mmcargs addtty; " \
101 "if run loadfdt; then " \
102 "bootz ${loadaddr} - ${fdt_addr}; " \
104 "echo ERR: cannot load FDT; " \
108 #define CONFIG_BOOTCOMMAND \
109 "mmc dev ${mmcdev}; if mmc rescan; then " \
110 "if run loadbootscript; then " \
113 "if run loadimage; then " \
120 * Miscellaneous configurable options
122 #define CONFIG_SYS_LONGHELP /* undef to save memory */
123 #define CONFIG_AUTO_COMPLETE
125 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
127 #define CONFIG_CMDLINE_EDITING
129 /*-----------------------------------------------------------------------
130 * Physical Memory Map
132 #define CONFIG_NR_DRAM_BANKS 1
133 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
134 #define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024)
136 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
137 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
138 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
140 #define CONFIG_SYS_INIT_SP_OFFSET \
141 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
142 #define CONFIG_SYS_INIT_SP_ADDR \
143 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
146 #define CONFIG_SYS_DDR_CLKSEL 0
147 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
148 #define CONFIG_SYS_MAIN_PWR_ON
150 /*-----------------------------------------------------------------------
151 * Environment organization
154 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
155 #define CONFIG_ENV_SIZE (8 * 1024)
156 #define CONFIG_SYS_MMC_ENV_DEV 0