]>
git.ipfire.org Git - people/ms/u-boot.git/blob - include/configs/ts4800.h
2 * Copyright (C) 2015, Savoir-faire Linux Inc.
4 * Derived from MX51EVK code by
5 * Guennadi Liakhovetski <lg@denx.de>
6 * Freescale Semiconductor, Inc.
8 * Configuration settings for the TS4800 Board
10 * SPDX-License-Identifier: GPL-2.0+
16 /* High Level Configuration Options */
19 #define CONFIG_DISPLAY_CPUINFO
20 #define CONFIG_DISPLAY_BOARDINFO
22 #define CONFIG_SYS_NO_FLASH /* No NOR Flash */
23 #define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage bootloader */
25 #define CONFIG_HW_WATCHDOG
27 #define CONFIG_MACH_TYPE MACH_TYPE_TS48XX
29 /* text base address used when linking */
30 #define CONFIG_SYS_TEXT_BASE 0x90008000
32 #include <asm/arch/imx-regs.h>
34 /* enable passing of ATAGs */
35 #define CONFIG_CMDLINE_TAG
36 #define CONFIG_SETUP_MEMORY_TAGS
37 #define CONFIG_INITRD_TAG
38 #define CONFIG_REVISION_TAG
41 * Size of malloc() pool
43 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
49 #define CONFIG_MXC_UART
50 #define CONFIG_MXC_UART_BASE UART1_BASE
51 #define CONFIG_MXC_GPIO
56 #define CONFIG_HARD_SPI /* puts SPI: ready */
57 #define CONFIG_MXC_SPI /* driver for the SPI controllers*/
62 #define CONFIG_FSL_ESDHC
63 #define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
67 #define CONFIG_GENERIC_MMC
68 #define CONFIG_DOS_PARTITION
75 #define CONFIG_PHY_SMSC
77 #define CONFIG_FEC_MXC
78 #define IMX_FEC_BASE FEC_BASE_ADDR
79 #define CONFIG_ETHPRIME "FEC"
80 #define CONFIG_FEC_MXC_PHYADDR 0
82 /* allow to overwrite serial and ethaddr */
83 #define CONFIG_ENV_OVERWRITE /* disable vendor parameters protection (serial#, ethaddr) */
84 #define CONFIG_CONS_INDEX 1 /* use UART0 : used by serial driver */
85 #define CONFIG_BAUDRATE 115200
87 /***********************************************************
89 ***********************************************************/
91 /* Environment variables */
94 #define CONFIG_LOADADDR 0x91000000 /* loadaddr env var */
96 #define CONFIG_EXTRA_ENV_SETTINGS \
101 "mmcargs=setenv bootargs root=/dev/mmcblk0p2 rootwait rw\0" \
102 "addtty=setenv bootargs ${bootargs} console=ttymxc0,${baudrate}\0" \
104 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
105 "bootscript=echo Running bootscript from mmc ...; " \
107 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image};\0" \
108 "mmcboot=echo Booting from mmc ...; " \
109 "run mmcargs addtty; " \
112 #define CONFIG_BOOTCOMMAND \
113 "mmc dev ${mmcdev}; if mmc rescan; then " \
114 "if run loadbootscript; then " \
117 "if run loadimage; then " \
124 * Miscellaneous configurable options
126 #define CONFIG_SYS_LONGHELP /* undef to save memory */
127 #define CONFIG_AUTO_COMPLETE
128 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
129 /* Print Buffer Size */
130 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
131 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
132 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
134 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
136 #define CONFIG_CMDLINE_EDITING
138 /*-----------------------------------------------------------------------
139 * Physical Memory Map
141 #define CONFIG_NR_DRAM_BANKS 1
142 #define PHYS_SDRAM_1 CSD0_BASE_ADDR
143 #define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024)
145 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
146 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
147 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
149 #define CONFIG_BOARD_EARLY_INIT_F
151 #define CONFIG_SYS_INIT_SP_OFFSET \
152 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
153 #define CONFIG_SYS_INIT_SP_ADDR \
154 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
157 #define CONFIG_SYS_DDR_CLKSEL 0
158 #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
159 #define CONFIG_SYS_MAIN_PWR_ON
161 /*-----------------------------------------------------------------------
162 * Environment organization
165 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
166 #define CONFIG_ENV_SIZE (8 * 1024)
167 #define CONFIG_ENV_IS_IN_MMC
168 #define CONFIG_SYS_MMC_ENV_DEV 0