include/configs/uniphier.h

   1 /*
   2  * Copyright (C) 2012-2015 Panasonic Corporation
   3  * Copyright (C) 2015-2016 Socionext Inc.
   4  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 /* U-Boot - Common settings for UniPhier Family */
  10
  11 #ifndef __CONFIG_UNIPHIER_COMMON_H__
  12 #define __CONFIG_UNIPHIER_COMMON_H__
  13
  14 #define CONFIG_ARMV7_PSCI_1_0
  15
  16 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  10
  17
  18 #ifdef CONFIG_ARM64
  19 #define CONFIG_CMD_UNZIP
  20 #endif
  21
  22 /*-----------------------------------------------------------------------
  23  * MMU and Cache Setting
  24  *----------------------------------------------------------------------*/
  25
  26 /* Comment out the following to enable L1 cache */
  27 /* #define CONFIG_SYS_ICACHE_OFF */
  28 /* #define CONFIG_SYS_DCACHE_OFF */
  29
  30 #define CONFIG_SYS_MALLOC_LEN           (4 * 1024 * 1024)
  31
  32 #define CONFIG_TIMESTAMP
  33
  34 /* FLASH related */
  35 #define CONFIG_MTD_DEVICE
  36
  37 #define CONFIG_SMC911X_32_BIT
  38 /* dummy: referenced by examples/standalone/smc911x_eeprom.c */
  39 #define CONFIG_SMC911X_BASE     0
  40
  41 #ifdef CONFIG_MICRO_SUPPORT_CARD
  42 #define CONFIG_SMC911X
  43 #else
  44 #define CONFIG_SYS_NO_FLASH
  45 #endif
  46
  47 #define CONFIG_FLASH_CFI_DRIVER
  48 #define CONFIG_SYS_FLASH_CFI
  49
  50 #define CONFIG_SYS_MAX_FLASH_SECT       256
  51 #define CONFIG_SYS_MONITOR_BASE         0
  52 #define CONFIG_SYS_MONITOR_LEN          0x00080000      /* 512KB */
  53 #define CONFIG_SYS_FLASH_BASE           0
  54
  55 /*
  56  * flash_toggle does not work for our support card.
  57  * We need to use flash_status_poll.
  58  */
  59 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL
  60
  61 #define CONFIG_FLASH_SHOW_PROGRESS      45 /* count down from 45/5: 9..1 */
  62
  63 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
  64
  65 /* serial console configuration */
  66 #define CONFIG_BAUDRATE                 115200
  67
  68 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
  69
  70 #define CONFIG_CMDLINE_EDITING          /* add command line history     */
  71 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size */
  72 /* Print Buffer Size */
  73 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  74 #define CONFIG_SYS_MAXARGS              16      /* max number of command */
  75 /* Boot Argument Buffer Size */
  76 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
  77
  78 #define CONFIG_CONS_INDEX               1
  79
  80 /* #define CONFIG_ENV_IS_NOWHERE */
  81 /* #define CONFIG_ENV_IS_IN_NAND */
  82 #define CONFIG_ENV_IS_IN_MMC
  83 #define CONFIG_ENV_OFFSET                       0x100000
  84 #define CONFIG_ENV_SIZE                         0x2000
  85 /* #define CONFIG_ENV_OFFSET_REDUND     (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
  86
  87 #define CONFIG_SYS_MMC_ENV_DEV          0
  88 #define CONFIG_SYS_MMC_ENV_PART         1
  89
  90 #ifdef CONFIG_ARMV8_MULTIENTRY
  91 #define CPU_RELEASE_ADDR                        0x80000000
  92 #define COUNTER_FREQUENCY                       50000000
  93 #define CONFIG_GICV3
  94 #define GICD_BASE                               0x5fe00000
  95 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
  96 #define GICR_BASE                               0x5fe40000
  97 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
  98 #define GICR_BASE                               0x5fe80000
  99 #endif
 100 #elif !defined(CONFIG_ARM64)
 101 /* Time clock 1MHz */
 102 #define CONFIG_SYS_TIMER_RATE                   1000000
 103 #endif
 104
 105 #define CONFIG_SYS_MAX_NAND_DEVICE                      1
 106 #define CONFIG_SYS_NAND_MAX_CHIPS                       2
 107 #define CONFIG_SYS_NAND_ONFI_DETECTION
 108
 109 #define CONFIG_NAND_DENALI_ECC_SIZE                     1024
 110
 111 #ifdef CONFIG_ARCH_UNIPHIER_SLD3
 112 #define CONFIG_SYS_NAND_REGS_BASE                       0xf8100000
 113 #define CONFIG_SYS_NAND_DATA_BASE                       0xf8000000
 114 #else
 115 #define CONFIG_SYS_NAND_REGS_BASE                       0x68100000
 116 #define CONFIG_SYS_NAND_DATA_BASE                       0x68000000
 117 #endif
 118
 119 #define CONFIG_SYS_NAND_BASE            (CONFIG_SYS_NAND_DATA_BASE + 0x10)
 120
 121 #define CONFIG_SYS_NAND_USE_FLASH_BBT
 122 #define CONFIG_SYS_NAND_BAD_BLOCK_POS                   0
 123
 124 /* USB */
 125 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      4
 126 #define CONFIG_FAT_WRITE
 127
 128 /* SD/MMC */
 129 #define CONFIG_SUPPORT_EMMC_BOOT
 130
 131 /* memtest works on */
 132 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
 133 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_BASE + 0x01000000)
 134
 135 /*
 136  * Network Configuration
 137  */
 138 #define CONFIG_SERVERIP                 192.168.11.1
 139 #define CONFIG_IPADDR                   192.168.11.10
 140 #define CONFIG_GATEWAYIP                192.168.11.1
 141 #define CONFIG_NETMASK                  255.255.255.0
 142
 143 #define CONFIG_LOADADDR                 0x84000000
 144 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 145
 146 #define CONFIG_CMDLINE_EDITING          /* add command line history     */
 147
 148 #if defined(CONFIG_ARM64) && !defined(CONFIG_ARMV8_MULTIENTRY)
 149 /* ARM Trusted Firmware */
 150 #define BOOT_IMAGES \
 151         "second_image=bl1.bin\0" \
 152         "third_image=fip.bin\0"
 153 #else
 154 #define BOOT_IMAGES \
 155         "second_image=u-boot-spl.bin\0" \
 156         "third_image=u-boot.bin\0"
 157 #endif
 158
 159 #define CONFIG_BOOTCOMMAND              "run $bootmode"
 160
 161 #define CONFIG_ROOTPATH                 "/nfs/root/path"
 162 #define CONFIG_NFSBOOTCOMMAND                                           \
 163         "setenv bootargs $bootargs root=/dev/nfs rw "                   \
 164         "nfsroot=$serverip:$rootpath "                                  \
 165         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
 166                 "run __nfsboot"
 167
 168 #ifdef CONFIG_FIT
 169 #define CONFIG_BOOTFILE                 "fitImage"
 170 #define LINUXBOOT_ENV_SETTINGS \
 171         "fit_addr=0x00100000\0" \
 172         "fit_addr_r=0x84100000\0" \
 173         "fit_size=0x00f00000\0" \
 174         "norboot=setexpr fit_addr $nor_base + $fit_addr &&" \
 175                 "bootm $fit_addr\0" \
 176         "nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \
 177                 "bootm $fit_addr_r\0" \
 178         "tftpboot=tftpboot $fit_addr_r $bootfile &&" \
 179                 "bootm $fit_addr_r\0" \
 180         "__nfsboot=run tftpboot\0"
 181 #else
 182 #ifdef CONFIG_ARM64
 183 #define CONFIG_BOOTFILE                 "Image.gz"
 184 #define LINUXBOOT_CMD                   "booti"
 185 #define KERNEL_ADDR_LOAD                "kernel_addr_load=0x84200000\0"
 186 #define KERNEL_ADDR_R                   "kernel_addr_r=0x80080000\0"
 187 #else
 188 #define CONFIG_BOOTFILE                 "zImage"
 189 #define LINUXBOOT_CMD                   "bootz"
 190 #define KERNEL_ADDR_LOAD                "kernel_addr_load=0x80208000\0"
 191 #define KERNEL_ADDR_R                   "kernel_addr_r=0x80208000\0"
 192 #endif
 193 #define LINUXBOOT_ENV_SETTINGS \
 194         "fdt_addr=0x00100000\0" \
 195         "fdt_addr_r=0x84100000\0" \
 196         "fdt_size=0x00008000\0" \
 197         "kernel_addr=0x00200000\0" \
 198         KERNEL_ADDR_LOAD \
 199         KERNEL_ADDR_R \
 200         "kernel_size=0x00800000\0" \
 201         "ramdisk_addr=0x00a00000\0" \
 202         "ramdisk_addr_r=0x84a00000\0" \
 203         "ramdisk_size=0x00600000\0" \
 204         "ramdisk_file=rootfs.cpio.uboot\0" \
 205         "boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 && " \
 206                 "if test $kernel_addr_load = $kernel_addr_r; then " \
 207                         "true; " \
 208                 "else " \
 209                         "unzip $kernel_addr_load $kernel_addr_r; " \
 210                 "fi && " \
 211                 LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \
 212         "norboot=setexpr kernel_addr_nor $nor_base + $kernel_addr && " \
 213                 "setexpr kernel_size_div4 $kernel_size / 4 && " \
 214                 "cp $kernel_addr_nor $kernel_addr_load $kernel_size_div4 && " \
 215                 "setexpr ramdisk_addr_nor $nor_base + $ramdisk_addr && " \
 216                 "setexpr ramdisk_size_div4 $ramdisk_size / 4 && " \
 217                 "cp $ramdisk_addr_nor $ramdisk_addr_r $ramdisk_size_div4 && " \
 218                 "setexpr fdt_addr_nor $nor_base + $fdt_addr && " \
 219                 "setexpr fdt_size_div4 $fdt_size / 4 && " \
 220                 "cp $fdt_addr_nor $fdt_addr_r $fdt_size_div4 && " \
 221                 "run boot_common\0" \
 222         "nandboot=nand read $kernel_addr_load $kernel_addr $kernel_size && " \
 223                 "nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \
 224                 "nand read $fdt_addr_r $fdt_addr $fdt_size &&" \
 225                 "run boot_common\0" \
 226         "tftpboot=tftpboot $kernel_addr_load $bootfile && " \
 227                 "tftpboot $ramdisk_addr_r $ramdisk_file &&" \
 228                 "tftpboot $fdt_addr_r $fdt_file &&" \
 229                 "run boot_common\0" \
 230         "__nfsboot=tftpboot $kernel_addr_load $bootfile && " \
 231                 "tftpboot $fdt_addr_r $fdt_file &&" \
 232                 "setenv ramdisk_addr_r - &&" \
 233                 "run boot_common\0"
 234 #endif
 235
 236 #define CONFIG_EXTRA_ENV_SETTINGS                               \
 237         "netdev=eth0\0"                                         \
 238         "verify=n\0"                                            \
 239         "initrd_high=0xffffffffffffffff\0"                      \
 240         "nor_base=0x42000000\0"                                 \
 241         "sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&"    \
 242                 "tftpboot $tmp_addr $second_image && " \
 243                 "setexpr tmp_addr $nor_base + 0x70000 && " \
 244                 "tftpboot $tmp_addr $third_image\0" \
 245         "emmcupdate=mmcsetn &&"                                 \
 246                 "mmc partconf $mmc_first_dev 0 1 1 &&"          \
 247                 "tftpboot $second_image && " \
 248                 "mmc write $loadaddr 0 100 && " \
 249                 "tftpboot $third_image && " \
 250                 "mmc write $loadaddr 100 700\0" \
 251         "nandupdate=nand erase 0 0x00100000 &&"                 \
 252                 "tftpboot $second_image && " \
 253                 "nand write $loadaddr 0 0x00020000 && " \
 254                 "tftpboot $third_image && " \
 255                 "nand write $loadaddr 0x00020000 0x000e0000\0" \
 256         BOOT_IMAGES \
 257         LINUXBOOT_ENV_SETTINGS
 258
 259 #define CONFIG_SYS_BOOTMAPSZ                    0x20000000
 260
 261 #define CONFIG_SYS_SDRAM_BASE           0x80000000
 262 #define CONFIG_NR_DRAM_BANKS            3
 263 /* for LD20; the last 64 byte is used for dynamic DDR PHY training */
 264 #define CONFIG_SYS_MEM_TOP_HIDE         64
 265
 266 #define CONFIG_PANIC_HANG
 267
 268 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_TEXT_BASE)
 269
 270 /* only for SPL */
 271 #if defined(CONFIG_ARM64)
 272 #define CONFIG_SPL_TEXT_BASE            0x30000000
 273 #elif defined(CONFIG_ARCH_UNIPHIER_SLD3) || \
 274         defined(CONFIG_ARCH_UNIPHIER_LD4) || \
 275         defined(CONFIG_ARCH_UNIPHIER_SLD8)
 276 #define CONFIG_SPL_TEXT_BASE            0x00040000
 277 #else
 278 #define CONFIG_SPL_TEXT_BASE            0x00100000
 279 #endif
 280
 281 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
 282 #define CONFIG_SPL_STACK                (0x30014c00)
 283 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
 284 #define CONFIG_SPL_STACK                (0x3001c000)
 285 #else
 286 #define CONFIG_SPL_STACK                (0x00100000)
 287 #endif
 288
 289 #define CONFIG_SPL_FRAMEWORK
 290 #ifdef CONFIG_ARM64
 291 #define CONFIG_SPL_BOARD_LOAD_IMAGE
 292 #endif
 293
 294 #define CONFIG_SPL_BOARD_INIT
 295
 296 #define CONFIG_SYS_NAND_U_BOOT_OFFS             0x20000
 297
 298 /* subtract sizeof(struct image_header) */
 299 #define CONFIG_SYS_UBOOT_BASE                   (0x70000 - 0x40)
 300
 301 #define CONFIG_SPL_TARGET                       "u-boot-with-spl.bin"
 302 #define CONFIG_SPL_MAX_FOOTPRINT                0x10000
 303 #if defined(CONFIG_ARCH_UNIPHIER_LD20)
 304 #define CONFIG_SPL_MAX_SIZE                     0x14000
 305 #else
 306 #define CONFIG_SPL_MAX_SIZE                     0x10000
 307 #endif
 308 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
 309 #define CONFIG_SPL_BSS_START_ADDR               0x30012000
 310 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
 311 #define CONFIG_SPL_BSS_START_ADDR               0x30016000
 312 #endif
 313 #define CONFIG_SPL_BSS_MAX_SIZE                 0x2000
 314
 315 #define CONFIG_SPL_PAD_TO                       0x20000
 316
 317 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */