include/configs/vct.h

   1 /*
   2  * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 /*
   8  * This file contains the configuration parameters for the VCT board
   9  * family:
  10  *
  11  * vct_premium
  12  * vct_premium_small
  13  * vct_premium_onenand
  14  * vct_premium_onenand_small
  15  * vct_platinum
  16  * vct_platinum_small
  17  * vct_platinum_onenand
  18  * vct_platinum_onenand_small
  19  * vct_platinumavc
  20  * vct_platinumavc_small
  21  * vct_platinumavc_onenand
  22  * vct_platinumavc_onenand_small
  23  */
  24
  25 #ifndef __CONFIG_H
  26 #define __CONFIG_H
  27
  28 #define CONFIG_DISPLAY_BOARDINFO
  29
  30 #define CPU_CLOCK_RATE                  324000000 /* Clock for the MIPS core */
  31 #define CONFIG_SYS_MIPS_TIMER_FREQ      (CPU_CLOCK_RATE / 2)
  32
  33 #define CONFIG_SKIP_LOWLEVEL_INIT       /* SDRAM is initialized by the bootstrap code */
  34
  35 #define CONFIG_SYS_TEXT_BASE            0x87000000
  36 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_TEXT_BASE
  37 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
  38 #define CONFIG_SYS_MALLOC_LEN           (1 << 20)
  39 #define CONFIG_SYS_BOOTPARAMS_LEN       (128 << 10)
  40 #define CONFIG_SYS_INIT_SP_OFFSET       0x400000
  41
  42 #if !defined(CONFIG_VCT_NAND) && !defined(CONFIG_VCT_ONENAND)
  43 #define CONFIG_VCT_NOR
  44 #else
  45 #define CONFIG_SYS_NO_FLASH
  46 #endif
  47
  48 /*
  49  * UART
  50  */
  51 #ifdef CONFIG_VCT_PLATINUMAVC
  52 #define UART_1_BASE             0xBDC30000
  53 #else
  54 #define UART_1_BASE             0xBF89C000
  55 #endif
  56
  57 #define CONFIG_SYS_NS16550_SERIAL
  58 #define CONFIG_SYS_NS16550_REG_SIZE     -4
  59 #define CONFIG_SYS_NS16550_COM1         UART_1_BASE
  60 #define CONFIG_CONS_INDEX               1
  61 #define CONFIG_SYS_NS16550_CLK          921600
  62 #define CONFIG_BAUDRATE                 115200
  63
  64 /*
  65  * SDRAM
  66  */
  67 #define CONFIG_SYS_SDRAM_BASE           0x80000000
  68 #define CONFIG_SYS_MBYTES_SDRAM         128
  69 #define CONFIG_SYS_MEMTEST_START        0x80200000
  70 #define CONFIG_SYS_MEMTEST_END          0x80400000
  71 #define CONFIG_SYS_LOAD_ADDR            0x80400000      /* default load address */
  72
  73 #if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
  74 /*
  75  * SMSC91C11x Network Card
  76  */
  77 #define CONFIG_SMC911X
  78 #define CONFIG_SMC911X_BASE     0x00000000
  79 #define CONFIG_SMC911X_32_BIT
  80 #define CONFIG_NET_RETRY_COUNT          20
  81 #endif
  82
  83 /*
  84  * Commands
  85  */
  86 #define CONFIG_CMD_EEPROM
  87
  88 /*
  89  * Only Premium/Platinum have ethernet support right now
  90  */
  91 #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
  92         !defined(CONFIG_VCT_SMALL_IMAGE)
  93 #endif
  94
  95 /*
  96  * Only Premium/Platinum have USB-EHCI support right now
  97  */
  98 #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
  99         !defined(CONFIG_VCT_SMALL_IMAGE)
 100 #endif
 101
 102 #if defined(CONFIG_CMD_USB)
 103 #define CONFIG_USB_STORAGE
 104 #define CONFIG_DOS_PARTITION
 105 #define CONFIG_ISO_PARTITION
 106
 107 #define CONFIG_SUPPORT_VFAT
 108
 109 /*
 110  * USB/EHCI
 111  */
 112 #define CONFIG_USB_EHCI                 /* Enable EHCI USB support      */
 113 #define CONFIG_USB_EHCI_VCT             /* on VCT platform              */
 114 #define CONFIG_EHCI_MMIO_BIG_ENDIAN
 115 #define CONFIG_EHCI_DESC_BIG_ENDIAN
 116 #define CONFIG_EHCI_IS_TDI
 117 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
 118 #endif /* CONFIG_CMD_USB */
 119
 120 #if defined(CONFIG_VCT_NAND)
 121 #define CONFIG_CMD_NAND
 122 #endif
 123
 124 #if defined(CONFIG_VCT_ONENAND)
 125 #define CONFIG_CMD_ONENAND
 126 #endif
 127
 128 /*
 129  * BOOTP options
 130  */
 131 #define CONFIG_BOOTP_BOOTFILESIZE
 132 #define CONFIG_BOOTP_BOOTPATH
 133 #define CONFIG_BOOTP_GATEWAY
 134 #define CONFIG_BOOTP_HOSTNAME
 135 #define CONFIG_BOOTP_SUBNETMASK
 136
 137 /*
 138  * Miscellaneous configurable options
 139  */
 140 #define CONFIG_SYS_LONGHELP                     /* undef to save memory         */
 141 #define CONFIG_SYS_CBSIZE       512             /* Console I/O Buffer Size      */
 142 #define CONFIG_SYS_PBSIZE       (CONFIG_SYS_CBSIZE + \
 143                                  sizeof(CONFIG_SYS_PROMPT) + 16)
 144 #define CONFIG_SYS_MAXARGS      16              /* max number of command args   */
 145 #define CONFIG_TIMESTAMP                        /* Print image info with timestamp */
 146 #define CONFIG_CMDLINE_EDITING                  /* add command line history     */
 147 #define CONFIG_SYS_CONSOLE_INFO_QUIET           /* don't print console @ startup*/
 148
 149 /*
 150  * FLASH and environment organization
 151  */
 152 #if defined(CONFIG_VCT_NOR)
 153 #define CONFIG_ENV_IS_IN_FLASH
 154 #define CONFIG_FLASH_NOT_MEM_MAPPED
 155
 156 /*
 157  * We need special accessor functions for the CFI FLASH driver. This
 158  * can be enabled via the CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS option.
 159  */
 160 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
 161
 162 /*
 163  * For the non-memory-mapped NOR FLASH, we need to define the
 164  * NOR FLASH area. This can't be detected via the addr2info()
 165  * function, since we check for flash access in the very early
 166  * U-Boot code, before the NOR FLASH is detected.
 167  */
 168 #define CONFIG_FLASH_BASE               0xb0000000
 169 #define CONFIG_FLASH_END                0xbfffffff
 170
 171 /*
 172  * CFI driver settings
 173  */
 174 #define CONFIG_SYS_FLASH_CFI                    /* The flash is CFI compatible  */
 175 #define CONFIG_FLASH_CFI_DRIVER         /* Use common CFI driver        */
 176 #define CONFIG_SYS_FLASH_CFI_AMD_RESET  1       /* Use AMD (Spansion) reset cmd */
 177 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_16BIT /* no byte writes on IXP4xx     */
 178
 179 #define CONFIG_SYS_FLASH_BASE           0xb0000000
 180 #define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE }
 181 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks           */
 182 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* max number of sectors on one chip    */
 183
 184 #define CONFIG_SYS_FLASH_ERASE_TOUT     120000  /* Timeout for Flash Erase (in ms)      */
 185 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Timeout for Flash Write (in ms)      */
 186
 187 #ifdef CONFIG_ENV_IS_IN_FLASH
 188 #define CONFIG_ENV_SECT_SIZE    0x10000         /* size of one complete sector  */
 189 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
 190 #define CONFIG_ENV_SIZE         0x4000  /* Total Size of Environment Sector     */
 191
 192 /* Address and size of Redundant Environment Sector     */
 193 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
 194 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
 195 #endif /* CONFIG_ENV_IS_IN_FLASH */
 196 #endif /* CONFIG_VCT_NOR */
 197
 198 #if defined(CONFIG_VCT_ONENAND)
 199 #define CONFIG_USE_ONENAND_BOARD_INIT
 200 #define CONFIG_ENV_IS_IN_ONENAND
 201 #define CONFIG_SYS_ONENAND_BASE         0x00000000      /* this is not real address */
 202 #define CONFIG_SYS_FLASH_BASE           0x00000000
 203 #define CONFIG_ENV_ADDR                 (128 << 10)     /* after compr. U-Boot image */
 204 #define CONFIG_ENV_SIZE                 (128 << 10)     /* erase size */
 205 #endif /* CONFIG_VCT_ONENAND */
 206
 207 /*
 208  * Cache Configuration
 209  */
 210 #define CONFIG_SYS_DCACHE_SIZE          16384
 211 #define CONFIG_SYS_ICACHE_SIZE          16384
 212 #define CONFIG_SYS_CACHELINE_SIZE       32
 213
 214 /*
 215  * I2C/EEPROM
 216  */
 217 #define CONFIG_SYS_I2C
 218 #define CONFIG_SYS_I2C_SOFT             /* I2C bit-banged */
 219 #define CONFIG_SYS_I2C_SOFT_SPEED       83000   /* 83 kHz is supposed to work */
 220 #define CONFIG_SYS_I2C_SOFT_SLAVE       0x7f
 221
 222 /*
 223  * Software (bit-bang) I2C driver configuration
 224  */
 225 #define CONFIG_SYS_GPIO_I2C_SCL         11
 226 #define CONFIG_SYS_GPIO_I2C_SDA         10
 227
 228 #ifndef __ASSEMBLY__
 229 int vct_gpio_dir(int pin, int dir);
 230 void vct_gpio_set(int pin, int val);
 231 int vct_gpio_get(int pin);
 232 #endif
 233
 234 #define I2C_INIT        vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SCL, 1)
 235 #define I2C_ACTIVE      vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 1)
 236 #define I2C_TRISTATE    vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 0)
 237 #define I2C_READ        vct_gpio_get(CONFIG_SYS_GPIO_I2C_SDA)
 238 #define I2C_SDA(bit)    vct_gpio_set(CONFIG_SYS_GPIO_I2C_SDA, bit)
 239 #define I2C_SCL(bit)    vct_gpio_set(CONFIG_SYS_GPIO_I2C_SCL, bit)
 240 #define I2C_DELAY       udelay(5)       /* 1/4 I2C clock duration */
 241
 242 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50
 243 /* CAT24WC32 */
 244 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2       /* Bytes of address             */
 245 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5     /* The Catalyst CAT24WC32 has   */
 246                                         /* 32 byte page write mode using*/
 247                                         /* last 5 bits of the address   */
 248 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10   /* and takes up to 10 msec */
 249
 250 #define CONFIG_BOOTCOMMAND      "run test3"
 251 #define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds     */
 252
 253 /*
 254  * UBI configuration
 255  */
 256 #if defined(CONFIG_VCT_ONENAND)
 257 #define CONFIG_SYS_USE_UBI
 258 #define CONFIG_CMD_JFFS2
 259 #define CONFIG_CMD_UBI
 260 #define CONFIG_RBTREE
 261 #define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
 262 #define CONFIG_MTD_PARTITIONS
 263 #define CONFIG_CMD_MTDPARTS
 264
 265 #define MTDIDS_DEFAULT          "onenand0=onenand"
 266 #define MTDPARTS_DEFAULT        "mtdparts=onenand:128k(u-boot),"        \
 267                                         "128k(env),"            \
 268                                         "20m(kernel),"          \
 269                                         "-(rootfs)"
 270 #endif
 271
 272 /*
 273  * We need a small, stripped down image to fit into the first 128k OneNAND
 274  * erase block (gzipped). This image only needs basic commands for FLASH
 275  * (NOR/OneNAND) usage and Linux kernel booting.
 276  */
 277 #if defined(CONFIG_VCT_SMALL_IMAGE)
 278 #undef CONFIG_CMD_BEDBUG
 279 #undef CONFIG_CMD_EEPROM
 280 #undef CONFIG_CMD_EEPROM
 281 #undef CONFIG_CMD_IRQ
 282 #undef CONFIG_CMD_LOADY
 283 #undef CONFIG_CMD_REGINFO
 284 #undef CONFIG_CMD_STRINGS
 285 #undef CONFIG_CMD_TERMINAL
 286
 287 #undef CONFIG_SMC911X
 288 #undef CONFIG_SYS_I2C_SOFT
 289 #undef CONFIG_SOURCE
 290 #undef CONFIG_SYS_LONGHELP
 291 #undef CONFIG_TIMESTAMP
 292 #endif /* CONFIG_VCT_SMALL_IMAGE */
 293
 294 #endif  /* __CONFIG_H */