include/configs/vct.h

   1 /*
   2  * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 /*
   8  * This file contains the configuration parameters for the VCT board
   9  * family:
  10  *
  11  * vct_premium
  12  * vct_premium_small
  13  * vct_premium_onenand
  14  * vct_premium_onenand_small
  15  * vct_platinum
  16  * vct_platinum_small
  17  * vct_platinum_onenand
  18  * vct_platinum_onenand_small
  19  * vct_platinumavc
  20  * vct_platinumavc_small
  21  * vct_platinumavc_onenand
  22  * vct_platinumavc_onenand_small
  23  */
  24
  25 #ifndef __CONFIG_H
  26 #define __CONFIG_H
  27
  28 #define CPU_CLOCK_RATE                  324000000 /* Clock for the MIPS core */
  29 #define CONFIG_SYS_MIPS_TIMER_FREQ      (CPU_CLOCK_RATE / 2)
  30
  31 #define CONFIG_SKIP_LOWLEVEL_INIT       /* SDRAM is initialized by the bootstrap code */
  32
  33 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_TEXT_BASE
  34 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)
  35 #define CONFIG_SYS_MALLOC_LEN           (1 << 20)
  36 #define CONFIG_SYS_BOOTPARAMS_LEN       (128 << 10)
  37 #define CONFIG_SYS_INIT_SP_OFFSET       0x400000
  38
  39 #if !defined(CONFIG_VCT_NAND) && !defined(CONFIG_VCT_ONENAND)
  40 #define CONFIG_VCT_NOR
  41 #endif
  42
  43 /*
  44  * UART
  45  */
  46 #ifdef CONFIG_VCT_PLATINUMAVC
  47 #define UART_1_BASE             0xBDC30000
  48 #else
  49 #define UART_1_BASE             0xBF89C000
  50 #endif
  51
  52 #define CONFIG_SYS_NS16550_SERIAL
  53 #define CONFIG_SYS_NS16550_REG_SIZE     -4
  54 #define CONFIG_SYS_NS16550_COM1         UART_1_BASE
  55 #define CONFIG_CONS_INDEX               1
  56 #define CONFIG_SYS_NS16550_CLK          921600
  57
  58 /*
  59  * SDRAM
  60  */
  61 #define CONFIG_SYS_SDRAM_BASE           0x80000000
  62 #define CONFIG_SYS_MBYTES_SDRAM         128
  63 #define CONFIG_SYS_MEMTEST_START        0x80200000
  64 #define CONFIG_SYS_MEMTEST_END          0x80400000
  65 #define CONFIG_SYS_LOAD_ADDR            0x80400000      /* default load address */
  66
  67 #if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
  68 /*
  69  * SMSC91C11x Network Card
  70  */
  71 #define CONFIG_SMC911X
  72 #define CONFIG_SMC911X_BASE     0x00000000
  73 #define CONFIG_SMC911X_32_BIT
  74 #define CONFIG_NET_RETRY_COUNT          20
  75 #endif
  76
  77 /*
  78  * Commands
  79  */
  80
  81 /*
  82  * Only Premium/Platinum have ethernet support right now
  83  */
  84 #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
  85         !defined(CONFIG_VCT_SMALL_IMAGE)
  86 #endif
  87
  88 /*
  89  * Only Premium/Platinum have USB-EHCI support right now
  90  */
  91 #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
  92         !defined(CONFIG_VCT_SMALL_IMAGE)
  93 #endif
  94
  95 #if defined(CONFIG_CMD_USB)
  96 #define CONFIG_SUPPORT_VFAT
  97
  98 /*
  99  * USB/EHCI
 100  */
 101 #define CONFIG_USB_EHCI_VCT             /* on VCT platform              */
 102 #define CONFIG_EHCI_MMIO_BIG_ENDIAN
 103 #define CONFIG_EHCI_DESC_BIG_ENDIAN
 104 #define CONFIG_EHCI_IS_TDI
 105 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
 106 #endif /* CONFIG_CMD_USB */
 107
 108 /*
 109  * BOOTP options
 110  */
 111 #define CONFIG_BOOTP_BOOTFILESIZE
 112 #define CONFIG_BOOTP_BOOTPATH
 113 #define CONFIG_BOOTP_GATEWAY
 114 #define CONFIG_BOOTP_HOSTNAME
 115 #define CONFIG_BOOTP_SUBNETMASK
 116
 117 /*
 118  * Miscellaneous configurable options
 119  */
 120 #define CONFIG_SYS_LONGHELP                     /* undef to save memory         */
 121 #define CONFIG_SYS_CBSIZE       512             /* Console I/O Buffer Size      */
 122 #define CONFIG_SYS_PBSIZE       (CONFIG_SYS_CBSIZE + \
 123                                  sizeof(CONFIG_SYS_PROMPT) + 16)
 124 #define CONFIG_SYS_MAXARGS      16              /* max number of command args   */
 125 #define CONFIG_TIMESTAMP                        /* Print image info with timestamp */
 126 #define CONFIG_CMDLINE_EDITING                  /* add command line history     */
 127
 128 /*
 129  * FLASH and environment organization
 130  */
 131 #if defined(CONFIG_VCT_NOR)
 132 #define CONFIG_FLASH_NOT_MEM_MAPPED
 133
 134 /*
 135  * We need special accessor functions for the CFI FLASH driver. This
 136  * can be enabled via the CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS option.
 137  */
 138 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
 139
 140 /*
 141  * For the non-memory-mapped NOR FLASH, we need to define the
 142  * NOR FLASH area. This can't be detected via the addr2info()
 143  * function, since we check for flash access in the very early
 144  * U-Boot code, before the NOR FLASH is detected.
 145  */
 146 #define CONFIG_FLASH_BASE               0xb0000000
 147 #define CONFIG_FLASH_END                0xbfffffff
 148
 149 /*
 150  * CFI driver settings
 151  */
 152 #define CONFIG_SYS_FLASH_CFI                    /* The flash is CFI compatible  */
 153 #define CONFIG_FLASH_CFI_DRIVER         /* Use common CFI driver        */
 154 #define CONFIG_SYS_FLASH_CFI_AMD_RESET  1       /* Use AMD (Spansion) reset cmd */
 155 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_16BIT /* no byte writes on IXP4xx     */
 156
 157 #define CONFIG_SYS_FLASH_BASE           0xb0000000
 158 #define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE }
 159 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks           */
 160 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* max number of sectors on one chip    */
 161
 162 #define CONFIG_SYS_FLASH_ERASE_TOUT     120000  /* Timeout for Flash Erase (in ms)      */
 163 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Timeout for Flash Write (in ms)      */
 164
 165 #ifdef CONFIG_ENV_IS_IN_FLASH
 166 #define CONFIG_ENV_SECT_SIZE    0x10000         /* size of one complete sector  */
 167 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
 168 #define CONFIG_ENV_SIZE         0x4000  /* Total Size of Environment Sector     */
 169
 170 /* Address and size of Redundant Environment Sector     */
 171 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
 172 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
 173 #endif /* CONFIG_ENV_IS_IN_FLASH */
 174 #endif /* CONFIG_VCT_NOR */
 175
 176 #if defined(CONFIG_VCT_ONENAND)
 177 #define CONFIG_USE_ONENAND_BOARD_INIT
 178 #define CONFIG_SYS_ONENAND_BASE         0x00000000      /* this is not real address */
 179 #define CONFIG_SYS_FLASH_BASE           0x00000000
 180 #define CONFIG_ENV_ADDR                 (128 << 10)     /* after compr. U-Boot image */
 181 #define CONFIG_ENV_SIZE                 (128 << 10)     /* erase size */
 182 #endif /* CONFIG_VCT_ONENAND */
 183
 184 /*
 185  * I2C/EEPROM
 186  */
 187 #define CONFIG_SYS_I2C
 188 #define CONFIG_SYS_I2C_SOFT             /* I2C bit-banged */
 189 #define CONFIG_SYS_I2C_SOFT_SPEED       83000   /* 83 kHz is supposed to work */
 190 #define CONFIG_SYS_I2C_SOFT_SLAVE       0x7f
 191
 192 /*
 193  * Software (bit-bang) I2C driver configuration
 194  */
 195 #define CONFIG_SYS_GPIO_I2C_SCL         11
 196 #define CONFIG_SYS_GPIO_I2C_SDA         10
 197
 198 #ifndef __ASSEMBLY__
 199 int vct_gpio_dir(int pin, int dir);
 200 void vct_gpio_set(int pin, int val);
 201 int vct_gpio_get(int pin);
 202 #endif
 203
 204 #define I2C_INIT        vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SCL, 1)
 205 #define I2C_ACTIVE      vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 1)
 206 #define I2C_TRISTATE    vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 0)
 207 #define I2C_READ        vct_gpio_get(CONFIG_SYS_GPIO_I2C_SDA)
 208 #define I2C_SDA(bit)    vct_gpio_set(CONFIG_SYS_GPIO_I2C_SDA, bit)
 209 #define I2C_SCL(bit)    vct_gpio_set(CONFIG_SYS_GPIO_I2C_SCL, bit)
 210 #define I2C_DELAY       udelay(5)       /* 1/4 I2C clock duration */
 211
 212 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50
 213 /* CAT24WC32 */
 214 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2       /* Bytes of address             */
 215 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5     /* The Catalyst CAT24WC32 has   */
 216                                         /* 32 byte page write mode using*/
 217                                         /* last 5 bits of the address   */
 218 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10   /* and takes up to 10 msec */
 219
 220 #define CONFIG_BOOTCOMMAND      "run test3"
 221
 222 /*
 223  * UBI configuration
 224  */
 225 #if defined(CONFIG_VCT_ONENAND)
 226 #define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
 227 #define CONFIG_MTD_PARTITIONS
 228
 229 #define MTDIDS_DEFAULT          "onenand0=onenand"
 230 #define MTDPARTS_DEFAULT        "mtdparts=onenand:128k(u-boot),"        \
 231                                         "128k(env),"            \
 232                                         "20m(kernel),"          \
 233                                         "-(rootfs)"
 234 #endif
 235
 236 /*
 237  * We need a small, stripped down image to fit into the first 128k OneNAND
 238  * erase block (gzipped). This image only needs basic commands for FLASH
 239  * (NOR/OneNAND) usage and Linux kernel booting.
 240  */
 241 #if defined(CONFIG_VCT_SMALL_IMAGE)
 242 #undef CONFIG_SMC911X
 243 #undef CONFIG_SYS_I2C_SOFT
 244 #undef CONFIG_SOURCE
 245 #undef CONFIG_SYS_LONGHELP
 246 #undef CONFIG_TIMESTAMP
 247 #endif /* CONFIG_VCT_SMALL_IMAGE */
 248
 249 #endif  /* __CONFIG_H */