include/configs/walnut.h

   1 /*
   2  * (C) Copyright 2000-2005
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /*
  25  * board/config.h - configuration options, board specific
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 /*
  32  * High Level Configuration Options
  33  * (easy to change)
  34  */
  35
  36 #define CONFIG_405GP            1       /* This is a PPC405 CPU         */
  37 #define CONFIG_4xx              1       /* ...member of PPC4xx family   */
  38 #define CONFIG_WALNUT           1       /* ...on a WALNUT board         */
  39                                         /* ...or on a SYCAMORE board    */
  40
  41 #define CONFIG_SYS_TEXT_BASE    0xFFFC0000
  42
  43 /*
  44  * Include common defines/options for all AMCC eval boards
  45  */
  46 #define CONFIG_HOSTNAME         walnut
  47 #include "amcc-common.h"
  48
  49 #define CONFIG_BOARD_EARLY_INIT_F 1     /* Call board_early_init_f      */
  50
  51 #define CONFIG_SYS_CLK_FREQ     33333333 /* external frequency to pll   */
  52
  53 /*
  54  * Default environment variables
  55  */
  56 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
  57         CONFIG_AMCC_DEF_ENV                                             \
  58         CONFIG_AMCC_DEF_ENV_POWERPC                                     \
  59         CONFIG_AMCC_DEF_ENV_PPC_OLD                                     \
  60         CONFIG_AMCC_DEF_ENV_NOR_UPD                                     \
  61         "kernel_addr=fff80000\0"                                        \
  62         "ramdisk_addr=fff80000\0"                                       \
  63         ""
  64
  65 #define CONFIG_PHY_ADDR         1       /* PHY address                  */
  66 #define CONFIG_HAS_ETH0         1
  67
  68 #define CONFIG_RTC_DS174x       1       /* use DS1743 RTC in Walnut     */
  69
  70 /*
  71  * Commands additional to the ones defined in amcc-common.h
  72  */
  73 #define CONFIG_CMD_DATE
  74 #define CONFIG_CMD_PCI
  75 #define CONFIG_CMD_SDRAM
  76 #define CONFIG_CMD_SNTP
  77
  78 #define CONFIG_SPD_EEPROM      1       /* use SPD EEPROM for setup    */
  79
  80 /*
  81  * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1.
  82  * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31.
  83  * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value.
  84  * The Linux BASE_BAUD define should match this configuration.
  85  *    baseBaud = cpuClock/(uartDivisor*16)
  86  * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
  87  * set Linux BASE_BAUD to 403200.
  88  */
  89 #define CONFIG_CONS_INDEX       1       /* Use UART0                    */
  90 #undef  CONFIG_SYS_EXT_SERIAL_CLOCK            /* external serial clock */
  91 #undef  CONFIG_SYS_405_UART_ERRATA_59          /* 405GP/CR Rev. D silicon */
  92 #define CONFIG_SYS_BASE_BAUD        691200
  93
  94 /*-----------------------------------------------------------------------
  95  * I2C stuff
  96  *-----------------------------------------------------------------------
  97  */
  98 #define CONFIG_SYS_I2C_PPC4XX_SPEED_0           400000
  99
 100 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 101 #define CONFIG_SYS_I2C_EEPROM_ADDR      (0xa8>>1)
 102 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 103 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
 104 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
 105
 106 /*-----------------------------------------------------------------------
 107  * PCI stuff
 108  *-----------------------------------------------------------------------
 109  */
 110 #define PCI_HOST_ADAPTER 0              /* configure ar pci adapter     */
 111 #define PCI_HOST_FORCE  1               /* configure as pci host        */
 112 #define PCI_HOST_AUTO   2               /* detected via arbiter enable  */
 113
 114 #define CONFIG_PCI                      /* include pci support          */
 115 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
 116 #define CONFIG_PCI_HOST PCI_HOST_FORCE  /* select pci host function     */
 117 #define CONFIG_PCI_PNP                  /* do pci plug-and-play         */
 118                                         /* resource configuration       */
 119 #define CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup  */
 120
 121 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8   /* AMCC */
 122 #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe   /* Whatever */
 123 #define CONFIG_SYS_PCI_PTM1LA   0x00000000      /* point to sdram               */
 124 #define CONFIG_SYS_PCI_PTM1MS   0x80000001      /* 2GB, enable hard-wired to 1  */
 125 #define CONFIG_SYS_PCI_PTM1PCI 0x00000000       /* Host: use this pci address   */
 126 #define CONFIG_SYS_PCI_PTM2LA   0x00000000      /* disabled                     */
 127 #define CONFIG_SYS_PCI_PTM2MS   0x00000000      /* disabled                     */
 128 #define CONFIG_SYS_PCI_PTM2PCI 0x04000000       /* Host: use this pci address   */
 129
 130 /*-----------------------------------------------------------------------
 131  * Start addresses for the final memory configuration
 132  * (Set up by the startup code)
 133  */
 134 #define CONFIG_SYS_FLASH_BASE           0xFFF80000
 135
 136 /*
 137  * Define here the location of the environment variables (FLASH or NVRAM).
 138  * Note: DENX encourages to use redundant environment in FLASH. NVRAM is only
 139  *       supported for backward compatibility.
 140  */
 141 #if 1
 142 #define CONFIG_ENV_IS_IN_FLASH  1       /* use FLASH for environment vars       */
 143 #else
 144 #define CONFIG_ENV_IS_IN_NVRAM  1       /* use NVRAM for environment vars       */
 145 #endif
 146
 147 /*-----------------------------------------------------------------------
 148  * FLASH organization
 149  */
 150 #define FLASH_BASE0_PRELIM      CONFIG_SYS_FLASH_BASE   /* FLASH bank #0                */
 151 #define FLASH_BASE1_PRELIM      0               /* FLASH bank #1                */
 152
 153 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks           */
 154 #define CONFIG_SYS_MAX_FLASH_SECT       256     /* max number of sectors on one chip    */
 155
 156 #define CONFIG_SYS_FLASH_ERASE_TOUT     120000  /* Timeout for Flash Erase (in ms)      */
 157 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Timeout for Flash Write (in ms)      */
 158
 159 #define CONFIG_SYS_FLASH_EMPTY_INFO             /* print 'E' for empty sector on flinfo */
 160
 161 #define CONFIG_SYS_FLASH_ADDR0          0x5555
 162 #define CONFIG_SYS_FLASH_ADDR1          0x2aaa
 163 #define CONFIG_SYS_FLASH_WORD_SIZE      unsigned char
 164
 165 #ifdef CONFIG_ENV_IS_IN_FLASH
 166 #define CONFIG_ENV_SECT_SIZE    0x10000         /* size of one complete sector  */
 167 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE)
 168 #define CONFIG_ENV_SIZE         0x4000  /* Total Size of Environment Sector     */
 169
 170 /* Address and size of Redundant Environment Sector     */
 171 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
 172 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
 173 #endif /* CONFIG_ENV_IS_IN_FLASH */
 174
 175 /*-----------------------------------------------------------------------
 176  * NVRAM organization
 177  */
 178 #define CONFIG_SYS_NVRAM_BASE_ADDR      0xf0000000      /* NVRAM base address   */
 179 #define CONFIG_SYS_NVRAM_SIZE           0x1ff8          /* NVRAM size   */
 180
 181 #ifdef CONFIG_ENV_IS_IN_NVRAM
 182 #define CONFIG_ENV_SIZE         0x1000          /* Size of Environment vars     */
 183 #define CONFIG_ENV_ADDR         \
 184         (CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE)      /* Env  */
 185 #endif
 186
 187 /*-----------------------------------------------------------------------
 188  * External Bus Controller (EBC) Setup
 189  */
 190
 191 /* Memory Bank 0 (Flash Bank 0) initialization                                  */
 192 #define CONFIG_SYS_EBC_PB0AP            0x9B015480
 193 #define CONFIG_SYS_EBC_PB0CR            0xFFF18000  /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit  */
 194
 195 #define CONFIG_SYS_EBC_PB1AP            0x02815480
 196 #define CONFIG_SYS_EBC_PB1CR            0xF0018000  /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit  */
 197
 198 #define CONFIG_SYS_EBC_PB2AP            0x04815A80
 199 #define CONFIG_SYS_EBC_PB2CR            0xF0118000  /* BAS=0xF01,BS=1MB,BU=R/W,BW=8bit  */
 200
 201 #define CONFIG_SYS_EBC_PB3AP            0x01815280
 202 #define CONFIG_SYS_EBC_PB3CR            0xF0218000  /* BAS=0xF02,BS=1MB,BU=R/W,BW=8bit  */
 203
 204 #define CONFIG_SYS_EBC_PB7AP            0x01815280
 205 #define CONFIG_SYS_EBC_PB7CR            0xF0318000  /* BAS=0xF03,BS=1MB,BU=R/W,BW=8bit  */
 206
 207 /*-----------------------------------------------------------------------
 208  * External peripheral base address
 209  *-----------------------------------------------------------------------
 210  */
 211 #define CONFIG_SYS_KEY_REG_BASE_ADDR    0xF0100000
 212 #define CONFIG_SYS_IR_REG_BASE_ADDR     0xF0200000
 213 #define CONFIG_SYS_FPGA_REG_BASE_ADDR   0xF0300000
 214
 215 /*-----------------------------------------------------------------------
 216  * Definitions for initial stack pointer and data area
 217  */
 218 #define CONFIG_SYS_INIT_DCACHE_CS       4       /* use cs # 4 for data cache memory    */
 219
 220 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000  /* inside of SDRAM                     */
 221 #define CONFIG_SYS_INIT_RAM_SIZE        0x2000  /* Size of used area in RAM            */
 222 #define CONFIG_SYS_GBL_DATA_OFFSET    (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 223 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 224
 225 /*-----------------------------------------------------------------------
 226  * Definitions for Serial Presence Detect EEPROM address
 227  * (to get SDRAM settings)
 228  */
 229 #define SPD_EEPROM_ADDRESS      0x50
 230
 231 #endif  /* __CONFIG_H */