include/configs/walnut.h

   1 /*
   2  * (C) Copyright 2000-2005
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /*
  25  * board/config.h - configuration options, board specific
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 /*
  32  * High Level Configuration Options
  33  * (easy to change)
  34  */
  35
  36 #define CONFIG_405GP            1       /* This is a PPC405 CPU         */
  37 #define CONFIG_4xx              1       /* ...member of PPC4xx family   */
  38 #define CONFIG_WALNUT           1       /* ...on a WALNUT board         */
  39                                         /* ...and on a SYCAMORE board   */
  40
  41 /*
  42  * Include common defines/options for all AMCC eval boards
  43  */
  44 #define CONFIG_HOSTNAME         walnut
  45 #include "amcc-common.h"
  46
  47 #define CONFIG_BOARD_EARLY_INIT_F 1     /* Call board_early_init_f      */
  48
  49 #define CONFIG_SYS_CLK_FREQ     33333333 /* external frequency to pll   */
  50
  51 /*
  52  * Default environment variables
  53  */
  54 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
  55         CONFIG_AMCC_DEF_ENV                                             \
  56         CONFIG_AMCC_DEF_ENV_POWERPC                                     \
  57         CONFIG_AMCC_DEF_ENV_PPC_OLD                                     \
  58         CONFIG_AMCC_DEF_ENV_NOR_UPD                                     \
  59         "kernel_addr=fff80000\0"                                        \
  60         "ramdisk_addr=fff80000\0"                                       \
  61         ""
  62
  63 #define CONFIG_PHY_ADDR         1       /* PHY address                  */
  64 #define CONFIG_HAS_ETH0         1
  65
  66 #define CONFIG_RTC_DS174x       1       /* use DS1743 RTC in Walnut     */
  67
  68 /*
  69  * Commands additional to the ones defined in amcc-common.h
  70  */
  71 #define CONFIG_CMD_DATE
  72 #define CONFIG_CMD_PCI
  73 #define CONFIG_CMD_SDRAM
  74 #define CONFIG_CMD_SNTP
  75
  76 #define CONFIG_SPD_EEPROM      1       /* use SPD EEPROM for setup    */
  77
  78 /*
  79  * If CFG_EXT_SERIAL_CLOCK, then the UART divisor is 1.
  80  * If CFG_405_UART_ERRATA_59, then UART divisor is 31.
  81  * Otherwise, UART divisor is determined by CPU Clock and CFG_BASE_BAUD value.
  82  * The Linux BASE_BAUD define should match this configuration.
  83  *    baseBaud = cpuClock/(uartDivisor*16)
  84  * If CFG_405_UART_ERRATA_59 and 200MHz CPU clock,
  85  * set Linux BASE_BAUD to 403200.
  86  */
  87 #undef  CONFIG_SERIAL_SOFTWARE_FIFO
  88 #undef  CFG_EXT_SERIAL_CLOCK           /* external serial clock */
  89 #undef  CFG_405_UART_ERRATA_59         /* 405GP/CR Rev. D silicon */
  90 #define CFG_BASE_BAUD       691200
  91
  92 /*-----------------------------------------------------------------------
  93  * I2C stuff
  94  *-----------------------------------------------------------------------
  95  */
  96 #define CFG_I2C_SPEED           400000  /* I2C speed and slave address  */
  97
  98 #define CFG_I2C_MULTI_EEPROMS
  99 #define CFG_I2C_EEPROM_ADDR     (0xa8>>1)
 100 #define CFG_I2C_EEPROM_ADDR_LEN 1
 101 #define CFG_EEPROM_PAGE_WRITE_ENABLE
 102 #define CFG_EEPROM_PAGE_WRITE_BITS 3
 103 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
 104
 105 /*-----------------------------------------------------------------------
 106  * PCI stuff
 107  *-----------------------------------------------------------------------
 108  */
 109 #define PCI_HOST_ADAPTER 0              /* configure ar pci adapter     */
 110 #define PCI_HOST_FORCE  1               /* configure as pci host        */
 111 #define PCI_HOST_AUTO   2               /* detected via arbiter enable  */
 112
 113 #define CONFIG_PCI                      /* include pci support          */
 114 #define CONFIG_PCI_HOST PCI_HOST_FORCE  /* select pci host function     */
 115 #define CONFIG_PCI_PNP                  /* do pci plug-and-play         */
 116                                         /* resource configuration       */
 117 #define CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup  */
 118
 119 #define CFG_PCI_SUBSYS_VENDORID 0x10e8  /* AMCC */
 120 #define CFG_PCI_SUBSYS_DEVICEID 0xcafe  /* Whatever */
 121 #define CFG_PCI_PTM1LA  0x00000000      /* point to sdram               */
 122 #define CFG_PCI_PTM1MS  0x80000001      /* 2GB, enable hard-wired to 1  */
 123 #define CFG_PCI_PTM1PCI 0x00000000      /* Host: use this pci address   */
 124 #define CFG_PCI_PTM2LA  0x00000000      /* disabled                     */
 125 #define CFG_PCI_PTM2MS  0x00000000      /* disabled                     */
 126 #define CFG_PCI_PTM2PCI 0x04000000      /* Host: use this pci address   */
 127
 128 /*-----------------------------------------------------------------------
 129  * Start addresses for the final memory configuration
 130  * (Set up by the startup code)
 131  */
 132 #define CFG_FLASH_BASE          0xFFF80000
 133
 134 /*
 135  * Define here the location of the environment variables (FLASH or NVRAM).
 136  * Note: DENX encourages to use redundant environment in FLASH. NVRAM is only
 137  *       supported for backward compatibility.
 138  */
 139 #if 1
 140 #define CONFIG_ENV_IS_IN_FLASH  1       /* use FLASH for environment vars       */
 141 #else
 142 #define CONFIG_ENV_IS_IN_NVRAM  1       /* use NVRAM for environment vars       */
 143 #endif
 144
 145 /*-----------------------------------------------------------------------
 146  * FLASH organization
 147  */
 148 #define FLASH_BASE0_PRELIM      CFG_FLASH_BASE  /* FLASH bank #0                */
 149 #define FLASH_BASE1_PRELIM      0               /* FLASH bank #1                */
 150
 151 #define CFG_MAX_FLASH_BANKS     1       /* max number of memory banks           */
 152 #define CFG_MAX_FLASH_SECT      256     /* max number of sectors on one chip    */
 153
 154 #define CFG_FLASH_ERASE_TOUT    120000  /* Timeout for Flash Erase (in ms)      */
 155 #define CFG_FLASH_WRITE_TOUT    500     /* Timeout for Flash Write (in ms)      */
 156
 157 #define CFG_FLASH_EMPTY_INFO            /* print 'E' for empty sector on flinfo */
 158
 159 #define CFG_FLASH_ADDR0         0x5555
 160 #define CFG_FLASH_ADDR1         0x2aaa
 161 #define CFG_FLASH_WORD_SIZE     unsigned char
 162
 163 #ifdef CONFIG_ENV_IS_IN_FLASH
 164 #define CONFIG_ENV_SECT_SIZE    0x10000         /* size of one complete sector  */
 165 #define CONFIG_ENV_ADDR         (CFG_MONITOR_BASE-CONFIG_ENV_SECT_SIZE)
 166 #define CONFIG_ENV_SIZE         0x4000  /* Total Size of Environment Sector     */
 167
 168 /* Address and size of Redundant Environment Sector     */
 169 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
 170 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
 171 #endif /* CONFIG_ENV_IS_IN_FLASH */
 172
 173 /*-----------------------------------------------------------------------
 174  * NVRAM organization
 175  */
 176 #define CFG_NVRAM_BASE_ADDR     0xf0000000      /* NVRAM base address   */
 177 #define CFG_NVRAM_SIZE          0x1ff8          /* NVRAM size   */
 178
 179 #ifdef CONFIG_ENV_IS_IN_NVRAM
 180 #define CONFIG_ENV_SIZE         0x1000          /* Size of Environment vars     */
 181 #define CONFIG_ENV_ADDR         \
 182         (CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-CONFIG_ENV_SIZE)    /* Env  */
 183 #endif
 184
 185 /*-----------------------------------------------------------------------
 186  * External Bus Controller (EBC) Setup
 187  */
 188
 189 /* Memory Bank 0 (Flash Bank 0) initialization                                  */
 190 #define CFG_EBC_PB0AP           0x9B015480
 191 #define CFG_EBC_PB0CR           0xFFF18000  /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit  */
 192
 193 #define CFG_EBC_PB1AP           0x02815480
 194 #define CFG_EBC_PB1CR           0xF0018000  /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit  */
 195
 196 #define CFG_EBC_PB2AP           0x04815A80
 197 #define CFG_EBC_PB2CR           0xF0118000  /* BAS=0xF01,BS=1MB,BU=R/W,BW=8bit  */
 198
 199 #define CFG_EBC_PB3AP           0x01815280
 200 #define CFG_EBC_PB3CR           0xF0218000  /* BAS=0xF02,BS=1MB,BU=R/W,BW=8bit  */
 201
 202 #define CFG_EBC_PB7AP           0x01815280
 203 #define CFG_EBC_PB7CR           0xF0318000  /* BAS=0xF03,BS=1MB,BU=R/W,BW=8bit  */
 204
 205 /*-----------------------------------------------------------------------
 206  * External peripheral base address
 207  *-----------------------------------------------------------------------
 208  */
 209 #define CFG_KEY_REG_BASE_ADDR   0xF0100000
 210 #define CFG_IR_REG_BASE_ADDR    0xF0200000
 211 #define CFG_FPGA_REG_BASE_ADDR  0xF0300000
 212
 213 /*-----------------------------------------------------------------------
 214  * Definitions for initial stack pointer and data area
 215  */
 216 #define CFG_INIT_DCACHE_CS      4       /* use cs # 4 for data cache memory    */
 217
 218 #define CFG_INIT_RAM_ADDR       0x40000000  /* inside of SDRAM                     */
 219 #define CFG_INIT_RAM_END        0x2000  /* End of used area in RAM             */
 220 #define CFG_GBL_DATA_SIZE      128  /* size in bytes reserved for initial data */
 221 #define CFG_GBL_DATA_OFFSET    (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 222 #define CFG_INIT_SP_OFFSET      CFG_GBL_DATA_OFFSET
 223
 224 /*-----------------------------------------------------------------------
 225  * Definitions for Serial Presence Detect EEPROM address
 226  * (to get SDRAM settings)
 227  */
 228 #define SPD_EEPROM_ADDRESS      0x50
 229
 230 #endif  /* __CONFIG_H */