include/configs/walnut.h

   1 /*
   2  * (C) Copyright 2000-2005
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /*
  25  * board/config.h - configuration options, board specific
  26  */
  27
  28 #ifndef __CONFIG_H
  29 #define __CONFIG_H
  30
  31 /*
  32  * High Level Configuration Options
  33  * (easy to change)
  34  */
  35
  36 #define CONFIG_405GP            1       /* This is a PPC405 CPU         */
  37 #define CONFIG_4xx              1       /* ...member of PPC4xx family   */
  38 #define CONFIG_WALNUT           1       /* ...on a WALNUT board         */
  39                                         /* ...and on a SYCAMORE board   */
  40
  41 #define CONFIG_BOARD_EARLY_INIT_F 1     /* Call board_early_init_f      */
  42
  43 #define CONFIG_SYS_CLK_FREQ     33333333 /* external frequency to pll   */
  44
  45 #define CONFIG_PREBOOT  "echo;" \
  46         "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
  47         "echo"
  48
  49 #undef  CONFIG_BOOTARGS
  50
  51 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
  52         "netdev=eth0\0"                                                 \
  53         "hostname=walnut\0"                                             \
  54         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
  55                 "nfsroot=${serverip}:${rootpath}\0"                     \
  56         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
  57         "addip=setenv bootargs ${bootargs} "                            \
  58                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
  59                 ":${hostname}:${netdev}:off panic=1\0"                  \
  60         "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
  61         "flash_nfs=run nfsargs addip addtty;"                           \
  62                 "bootm ${kernel_addr}\0"                                \
  63         "flash_self=run ramargs addip addtty;"                          \
  64                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
  65         "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;"     \
  66                 "bootm\0"                                               \
  67         "rootpath=/opt/eldk/ppc_4xx\0"                                  \
  68         "bootfile=/tftpboot/walnut/uImage\0"                            \
  69         "kernel_addr=fff80000\0"                                        \
  70         "ramdisk_addr=fff80000\0"                                       \
  71         "initrd_high=30000000\0"                                        \
  72         "load=tftp 100000 /tftpboot/walnut/u-boot.bin\0"                \
  73         "update=protect off fffc0000 ffffffff;era fffc0000 ffffffff;"   \
  74                 "cp.b 100000 fffc0000 40000;"                           \
  75                 "setenv filesize;saveenv\0"                             \
  76         "upd=run load update\0"                                         \
  77         ""
  78 #define CONFIG_BOOTCOMMAND      "run net_nfs"
  79
  80 #if 0
  81 #define CONFIG_BOOTDELAY        -1      /* autoboot disabled            */
  82 #else
  83 #define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds     */
  84 #endif
  85
  86 #define CONFIG_BAUDRATE         115200
  87
  88 #define CONFIG_LOADS_ECHO       1       /* echo on for serial download  */
  89 #define CFG_LOADS_BAUD_CHANGE   1       /* allow baudrate change        */
  90
  91 #define CONFIG_MII              1       /* MII PHY management           */
  92 #define CONFIG_PHY_ADDR         1       /* PHY address                  */
  93
  94 #define CFG_RX_ETH_BUFFER       16      /* use 16 rx buffer on 405 emac */
  95
  96 #define CONFIG_NETCONSOLE               /* include NetConsole support   */
  97 #define CONFIG_NET_MULTI                /* needed for NetConsole        */
  98
  99 #define CONFIG_RTC_DS174x       1       /* use DS1743 RTC in Walnut     */
 100
 101
 102 /*
 103  * BOOTP options
 104  */
 105 #define CONFIG_BOOTP_BOOTFILESIZE
 106 #define CONFIG_BOOTP_BOOTPATH
 107 #define CONFIG_BOOTP_GATEWAY
 108 #define CONFIG_BOOTP_HOSTNAME
 109
 110
 111 /*
 112  * Command line configuration.
 113  */
 114 #include <config_cmd_default.h>
 115
 116 #define CONFIG_CMD_ASKENV
 117 #define CONFIG_CMD_DATE
 118 #define CONFIG_CMD_DHCP
 119 #define CONFIG_CMD_DIAG
 120 #define CONFIG_CMD_EEPROM
 121 #define CONFIG_CMD_ELF
 122 #define CONFIG_CMD_I2C
 123 #define CONFIG_CMD_IRQ
 124 #define CONFIG_CMD_MII
 125 #define CONFIG_CMD_NET
 126 #define CONFIG_CMD_NFS
 127 #define CONFIG_CMD_PCI
 128 #define CONFIG_CMD_PING
 129 #define CONFIG_CMD_REGINFO
 130 #define CONFIG_CMD_SDRAM
 131 #define CONFIG_CMD_SNTP
 132
 133
 134 #undef CONFIG_WATCHDOG                  /* watchdog disabled            */
 135
 136 #define CONFIG_SPD_EEPROM      1       /* use SPD EEPROM for setup    */
 137
 138 /*
 139  * Miscellaneous configurable options
 140  */
 141 #define CFG_LONGHELP                    /* undef to save memory         */
 142 #define CFG_PROMPT      "=> "           /* Monitor Command Prompt       */
 143 #if defined(CONFIG_CMD_KGDB)
 144 #define CFG_CBSIZE      1024            /* Console I/O Buffer Size      */
 145 #else
 146 #define CFG_CBSIZE      256             /* Console I/O Buffer Size      */
 147 #endif
 148 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
 149 #define CFG_MAXARGS     16              /* max number of command args   */
 150 #define CFG_BARGSIZE    CFG_CBSIZE      /* Boot Argument Buffer Size    */
 151
 152 #define CFG_MEMTEST_START       0x0400000       /* memtest works on     */
 153 #define CFG_MEMTEST_END         0x0C00000       /* 4 ... 12 MB in DRAM  */
 154
 155 /*
 156  * If CFG_EXT_SERIAL_CLOCK, then the UART divisor is 1.
 157  * If CFG_405_UART_ERRATA_59, then UART divisor is 31.
 158  * Otherwise, UART divisor is determined by CPU Clock and CFG_BASE_BAUD value.
 159  * The Linux BASE_BAUD define should match this configuration.
 160  *    baseBaud = cpuClock/(uartDivisor*16)
 161  * If CFG_405_UART_ERRATA_59 and 200MHz CPU clock,
 162  * set Linux BASE_BAUD to 403200.
 163  */
 164 #undef  CONFIG_SERIAL_SOFTWARE_FIFO
 165 #undef  CFG_EXT_SERIAL_CLOCK           /* external serial clock */
 166 #undef  CFG_405_UART_ERRATA_59         /* 405GP/CR Rev. D silicon */
 167 #define CFG_BASE_BAUD       691200
 168
 169 /* The following table includes the supported baudrates */
 170 #define CFG_BAUDRATE_TABLE  \
 171     {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
 172
 173 #define CFG_LOAD_ADDR           0x100000        /* default load address */
 174 #define CFG_EXTBDINFO           1       /* To use extended board_into (bd_t) */
 175
 176 #define CFG_HZ          1000            /* decrementer freq: 1 ms ticks */
 177
 178 #define CONFIG_CMDLINE_EDITING  1       /* add command line history     */
 179 #define CONFIG_LOOPW            1       /* enable loopw command         */
 180 #define CONFIG_MX_CYCLIC        1       /* enable mdc/mwc commands      */
 181 #define CONFIG_ZERO_BOOTDELAY_CHECK     /* check for keypress on bootdelay==0 */
 182 #define CONFIG_VERSION_VARIABLE 1       /* include version env variable */
 183
 184 /*-----------------------------------------------------------------------
 185  * I2C stuff
 186  *-----------------------------------------------------------------------
 187  */
 188 #define CONFIG_HARD_I2C         1       /* I2C with hardware support    */
 189 #undef  CONFIG_SOFT_I2C                 /* I2C bit-banged               */
 190 #define CFG_I2C_SPEED           400000  /* I2C speed and slave address  */
 191 #define CFG_I2C_SLAVE           0x7F
 192
 193 #define CFG_I2C_MULTI_EEPROMS
 194 #define CFG_I2C_EEPROM_ADDR     (0xa8>>1)
 195 #define CFG_I2C_EEPROM_ADDR_LEN 1
 196 #define CFG_EEPROM_PAGE_WRITE_ENABLE
 197 #define CFG_EEPROM_PAGE_WRITE_BITS 3
 198 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
 199
 200 /*-----------------------------------------------------------------------
 201  * PCI stuff
 202  *-----------------------------------------------------------------------
 203  */
 204 #define PCI_HOST_ADAPTER 0              /* configure ar pci adapter     */
 205 #define PCI_HOST_FORCE  1               /* configure as pci host        */
 206 #define PCI_HOST_AUTO   2               /* detected via arbiter enable  */
 207
 208 #define CONFIG_PCI                      /* include pci support          */
 209 #define CONFIG_PCI_HOST PCI_HOST_FORCE  /* select pci host function     */
 210 #define CONFIG_PCI_PNP                  /* do pci plug-and-play         */
 211                                         /* resource configuration       */
 212 #define CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup  */
 213
 214 #define CFG_PCI_SUBSYS_VENDORID 0x10e8  /* AMCC */
 215 #define CFG_PCI_SUBSYS_DEVICEID 0xcafe  /* Whatever */
 216 #define CFG_PCI_PTM1LA  0x00000000      /* point to sdram               */
 217 #define CFG_PCI_PTM1MS  0x80000001      /* 2GB, enable hard-wired to 1  */
 218 #define CFG_PCI_PTM1PCI 0x00000000      /* Host: use this pci address   */
 219 #define CFG_PCI_PTM2LA  0x00000000      /* disabled                     */
 220 #define CFG_PCI_PTM2MS  0x00000000      /* disabled                     */
 221 #define CFG_PCI_PTM2PCI 0x04000000      /* Host: use this pci address   */
 222
 223 /*-----------------------------------------------------------------------
 224  * Start addresses for the final memory configuration
 225  * (Set up by the startup code)
 226  * Please note that CFG_SDRAM_BASE _must_ start at 0
 227  */
 228 #define CFG_SDRAM_BASE          0x00000000
 229 #define CFG_FLASH_BASE          0xFFF80000
 230 #define CFG_MONITOR_LEN         (256 * 1024)    /* Reserve 256 kB for Monitor   */
 231 #define CFG_MALLOC_LEN          (128 * 1024)    /* Reserve 128 kB for malloc()  */
 232 #define CFG_MONITOR_BASE        (-CFG_MONITOR_LEN)
 233
 234 /*
 235  * Define here the location of the environment variables (FLASH or NVRAM).
 236  * Note: DENX encourages to use redundant environment in FLASH. NVRAM is only
 237  *       supported for backward compatibility.
 238  */
 239 #if 1
 240 #define CFG_ENV_IS_IN_FLASH     1       /* use FLASH for environment vars       */
 241 #else
 242 #define CFG_ENV_IS_IN_NVRAM     1       /* use NVRAM for environment vars       */
 243 #endif
 244
 245 /*
 246  * For booting Linux, the board info and command line data
 247  * have to be in the first 8 MB of memory, since this is
 248  * the maximum mapped by the Linux kernel during initialization.
 249  */
 250 #define CFG_BOOTMAPSZ           (8 << 20)       /* Initial Memory map for Linux */
 251
 252 /*-----------------------------------------------------------------------
 253  * FLASH organization
 254  */
 255 #define FLASH_BASE0_PRELIM      CFG_FLASH_BASE  /* FLASH bank #0                */
 256 #define FLASH_BASE1_PRELIM      0               /* FLASH bank #1                */
 257
 258 #define CFG_MAX_FLASH_BANKS     1       /* max number of memory banks           */
 259 #define CFG_MAX_FLASH_SECT      256     /* max number of sectors on one chip    */
 260
 261 #define CFG_FLASH_ERASE_TOUT    120000  /* Timeout for Flash Erase (in ms)      */
 262 #define CFG_FLASH_WRITE_TOUT    500     /* Timeout for Flash Write (in ms)      */
 263
 264 #define CFG_FLASH_EMPTY_INFO            /* print 'E' for empty sector on flinfo */
 265
 266 #define CFG_FLASH_ADDR0         0x5555
 267 #define CFG_FLASH_ADDR1         0x2aaa
 268 #define CFG_FLASH_WORD_SIZE     unsigned char
 269
 270 #ifdef CFG_ENV_IS_IN_FLASH
 271 #define CFG_ENV_SECT_SIZE       0x10000         /* size of one complete sector  */
 272 #define CFG_ENV_ADDR            (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
 273 #define CFG_ENV_SIZE            0x4000  /* Total Size of Environment Sector     */
 274
 275 /* Address and size of Redundant Environment Sector     */
 276 #define CFG_ENV_ADDR_REDUND     (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
 277 #define CFG_ENV_SIZE_REDUND     (CFG_ENV_SIZE)
 278 #endif /* CFG_ENV_IS_IN_FLASH */
 279
 280 /*-----------------------------------------------------------------------
 281  * NVRAM organization
 282  */
 283 #define CFG_NVRAM_BASE_ADDR     0xf0000000      /* NVRAM base address   */
 284 #define CFG_NVRAM_SIZE          0x1ff8          /* NVRAM size   */
 285
 286 #ifdef CFG_ENV_IS_IN_NVRAM
 287 #define CFG_ENV_SIZE            0x1000          /* Size of Environment vars     */
 288 #define CFG_ENV_ADDR            \
 289         (CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-CFG_ENV_SIZE)       /* Env  */
 290 #endif
 291
 292 /*-----------------------------------------------------------------------
 293  * External Bus Controller (EBC) Setup
 294  */
 295
 296 /* Memory Bank 0 (Flash Bank 0) initialization                                  */
 297 #define CFG_EBC_PB0AP           0x9B015480
 298 #define CFG_EBC_PB0CR           0xFFF18000  /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit  */
 299
 300 #define CFG_EBC_PB1AP           0x02815480
 301 #define CFG_EBC_PB1CR           0xF0018000  /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit  */
 302
 303 #define CFG_EBC_PB2AP           0x04815A80
 304 #define CFG_EBC_PB2CR           0xF0118000  /* BAS=0xF01,BS=1MB,BU=R/W,BW=8bit  */
 305
 306 #define CFG_EBC_PB3AP           0x01815280
 307 #define CFG_EBC_PB3CR           0xF0218000  /* BAS=0xF02,BS=1MB,BU=R/W,BW=8bit  */
 308
 309 #define CFG_EBC_PB7AP           0x01815280
 310 #define CFG_EBC_PB7CR           0xF0318000  /* BAS=0xF03,BS=1MB,BU=R/W,BW=8bit  */
 311
 312 /*-----------------------------------------------------------------------
 313  * External peripheral base address
 314  *-----------------------------------------------------------------------
 315  */
 316 #define CFG_KEY_REG_BASE_ADDR   0xF0100000
 317 #define CFG_IR_REG_BASE_ADDR    0xF0200000
 318 #define CFG_FPGA_REG_BASE_ADDR  0xF0300000
 319
 320 /*-----------------------------------------------------------------------
 321  * Definitions for initial stack pointer and data area
 322  */
 323 #define CFG_INIT_DCACHE_CS      4       /* use cs # 4 for data cache memory    */
 324
 325 #define CFG_INIT_RAM_ADDR       0x40000000  /* inside of SDRAM                     */
 326 #define CFG_INIT_RAM_END        0x2000  /* End of used area in RAM             */
 327 #define CFG_GBL_DATA_SIZE      128  /* size in bytes reserved for initial data */
 328 #define CFG_GBL_DATA_OFFSET    (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 329 #define CFG_INIT_SP_OFFSET      CFG_GBL_DATA_OFFSET
 330
 331 /*-----------------------------------------------------------------------
 332  * Definitions for Serial Presence Detect EEPROM address
 333  * (to get SDRAM settings)
 334  */
 335 #define SPD_EEPROM_ADDRESS      0x50
 336
 337 /*
 338  * Internal Definitions
 339  *
 340  * Boot Flags
 341  */
 342 #define BOOTFLAG_COLD   0x01            /* Normal Power-On: Boot from FLASH     */
 343 #define BOOTFLAG_WARM   0x02            /* Software reboot                      */
 344
 345 #if defined(CONFIG_CMD_KGDB)
 346 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 347 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
 348 #endif
 349 #endif  /* __CONFIG_H */