include/configs/x86-chromebook.h

   1 /*
   2  *
   3  * Copyright (c) 2015 Google, Inc
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 #ifndef _X86_CHROMEBOOK_H
   9 #define _X86_CHROMEBOOK_H
  10
  11 #define CONFIG_SYS_MONITOR_LEN                  (1 << 20)
  12
  13 #define CONFIG_BOARD_EARLY_INIT_F
  14 #define CONFIG_MISC_INIT_R
  15
  16 #define CONFIG_X86_MRC_ADDR                     0xfffa0000
  17
  18 #define CONFIG_SCSI_DEV_LIST    \
  19         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_NM10_AHCI}, \
  20         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \
  21         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \
  22         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}, \
  23         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_LYNXPOINT_AHCI}
  24
  25 #define CONFIG_PCI_MEM_BUS      0xe0000000
  26 #define CONFIG_PCI_MEM_PHYS     CONFIG_PCI_MEM_BUS
  27 #define CONFIG_PCI_MEM_SIZE     0x10000000
  28
  29 #define CONFIG_PCI_PREF_BUS     0xd0000000
  30 #define CONFIG_PCI_PREF_PHYS    CONFIG_PCI_PREF_BUS
  31 #define CONFIG_PCI_PREF_SIZE    0x10000000
  32
  33 #define CONFIG_PCI_IO_BUS       0x1000
  34 #define CONFIG_PCI_IO_PHYS      CONFIG_PCI_IO_BUS
  35 #define CONFIG_PCI_IO_SIZE      0xefff
  36
  37 #define CONFIG_PCI_PNP
  38
  39 #define CONFIG_BIOSEMU
  40 #define VIDEO_IO_OFFSET                         0
  41 #define CONFIG_X86EMU_RAW_IO
  42
  43 #define CONFIG_ARCH_EARLY_INIT_R
  44
  45 #undef CONFIG_ENV_IS_NOWHERE
  46 #undef CONFIG_ENV_SIZE
  47 #define CONFIG_ENV_SIZE                 0x1000
  48 #define CONFIG_ENV_SECT_SIZE            0x1000
  49 #define CONFIG_ENV_IS_IN_SPI_FLASH
  50 #define CONFIG_ENV_OFFSET               0x003f8000
  51
  52 #define CONFIG_STD_DEVICES_SETTINGS     "stdin=usbkbd,i8042-kbd,serial\0" \
  53                                         "stdout=vga,serial\0" \
  54                                         "stderr=vga,serial\0"
  55
  56 #endif