include/configs/xpedite520x.h

   1 /*
   2  * Copyright 2008 Extreme Engineering Solutions, Inc.
   3  * Copyright 2004-2008 Freescale Semiconductor, Inc.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 /*
   9  * xpedite520x board configuration file
  10  */
  11 #ifndef __CONFIG_H
  12 #define __CONFIG_H
  13
  14 /*
  15  * High Level Configuration Options
  16  */
  17 #define CONFIG_BOOKE            1       /* BOOKE */
  18 #define CONFIG_E500             1       /* BOOKE e500 family */
  19 #define CONFIG_MPC8548          1
  20 #define CONFIG_XPEDITE5200      1
  21 #define CONFIG_SYS_BOARD_NAME   "XPedite5200"
  22 #define CONFIG_SYS_FORM_PMC_XMC 1
  23 #define CONFIG_BOARD_EARLY_INIT_R       /* Call board_pre_init */
  24
  25 #ifndef CONFIG_SYS_TEXT_BASE
  26 #define CONFIG_SYS_TEXT_BASE    0xfff80000
  27 #endif
  28
  29 #define CONFIG_PCI_PNP          1       /* do pci plug-and-play */
  30 #define CONFIG_PCI_SCAN_SHOW    1       /* show pci devices on startup */
  31 #define CONFIG_PCI1             1       /* PCI controller 1 */
  32 #define CONFIG_FSL_PCI_INIT     1       /* Use common FSL init code */
  33 #define CONFIG_PCI_INDIRECT_BRIDGE 1    /* indirect PCI bridge support */
  34 #define CONFIG_SYS_PCI_64BIT    1       /* enable 64-bit PCI resources */
  35 #define CONFIG_FSL_LAW          1       /* Use common FSL init code */
  36
  37 /*
  38  * DDR config
  39  */
  40 #define CONFIG_SYS_FSL_DDR2
  41 #undef CONFIG_FSL_DDR_INTERACTIVE
  42 #define CONFIG_SPD_EEPROM               /* Use SPD EEPROM for DDR setup */
  43 #define CONFIG_DDR_SPD
  44 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
  45 #define SPD_EEPROM_ADDRESS              0x54
  46 #define CONFIG_NUM_DDR_CONTROLLERS      1
  47 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
  48 #define CONFIG_CHIP_SELECTS_PER_CTRL    2
  49 #define CONFIG_DDR_ECC
  50 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
  51 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000
  52 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
  53 #define CONFIG_VERY_BIG_RAM
  54
  55 #define CONFIG_SYS_CLK_FREQ     66666666
  56
  57 /*
  58  * These can be toggled for performance analysis, otherwise use default.
  59  */
  60 #define CONFIG_L2_CACHE                 /* toggle L2 cache */
  61 #define CONFIG_BTB                      /* toggle branch predition */
  62 #define CONFIG_ENABLE_36BIT_PHYS        1
  63
  64 #define CONFIG_SYS_CCSRBAR              0xef000000
  65 #define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
  66
  67 /*
  68  * Diagnostics
  69  */
  70 #define CONFIG_SYS_ALT_MEMTEST
  71 #define CONFIG_SYS_MEMTEST_START        0x10000000
  72 #define CONFIG_SYS_MEMTEST_END          0x20000000
  73 #define CONFIG_POST                     (CONFIG_SYS_POST_MEMORY | \
  74                                          CONFIG_SYS_POST_I2C)
  75 #define I2C_ADDR_LIST                   {CONFIG_SYS_I2C_MAX1237_ADDR,   \
  76                                          CONFIG_SYS_I2C_EEPROM_ADDR,    \
  77                                          CONFIG_SYS_I2C_PCA953X_ADDR0,  \
  78                                          CONFIG_SYS_I2C_PCA953X_ADDR1,  \
  79                                          CONFIG_SYS_I2C_RTC_ADDR}
  80
  81 /*
  82  * Memory map
  83  * 0x0000_0000  0x7fff_ffff     DDR                     2G Cacheable
  84  * 0x8000_0000  0xbfff_ffff     PCI1 Mem                1G non-cacheable
  85  * 0xe000_0000  0xe7ff_ffff     SRAM/SSRAM/L1 Cache     128M non-cacheable
  86  * 0xe800_0000  0xe87f_ffff     PCI1 IO                 8M non-cacheable
  87  * 0xef00_0000  0xef0f_ffff     CCSR/IMMR               1M non-cacheable
  88  * 0xef80_0000  0xef8f_ffff     NAND Flash              1M non-cacheable
  89  * 0xf800_0000  0xfbff_ffff     NOR Flash 2             64M non-cacheable
  90  * 0xfc00_0000  0xffff_ffff     NOR Flash 1             64M non-cacheable
  91  */
  92
  93 #define CONFIG_SYS_LBC_LCRR     (LCRR_CLKDIV_8 | LCRR_EADC_3)
  94
  95 /*
  96  * NAND flash configuration
  97  */
  98 #define CONFIG_SYS_NAND_BASE            0xef800000
  99 #define CONFIG_SYS_NAND_BASE2           0xef840000 /* Unused at this time */
 100 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 101 #define CONFIG_NAND_ACTL
 102 #define CONFIG_SYS_NAND_ACTL_CLE        (1 << 3)        /* ADDR3 is CLE */
 103 #define CONFIG_SYS_NAND_ACTL_ALE        (1 << 4)        /* ADDR4 is ALE */
 104 #define CONFIG_SYS_NAND_ACTL_NCE        (0)             /* NCE not controlled by ADDR */
 105 #define CONFIG_SYS_NAND_ACTL_DELAY      25
 106
 107 /*
 108  * NOR flash configuration
 109  */
 110 #define CONFIG_SYS_FLASH_BASE           0xfc000000
 111 #define CONFIG_SYS_FLASH_BASE2          0xf8000000
 112 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE2}
 113 #define CONFIG_SYS_MAX_FLASH_BANKS      2               /* number of banks */
 114 #define CONFIG_SYS_MAX_FLASH_SECT       1024            /* sectors per device */
 115 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000           /* Flash Erase Timeout (ms) */
 116 #define CONFIG_SYS_FLASH_WRITE_TOUT     500             /* Flash Write Timeout (ms) */
 117 #define CONFIG_FLASH_CFI_DRIVER
 118 #define CONFIG_SYS_FLASH_CFI
 119 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 120 #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST       { {0xfff40000, 0xc0000}, \
 121                                                   {0xfbf40000, 0xc0000} }
 122 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
 123
 124 /*
 125  * Chip select configuration
 126  */
 127 /* NOR Flash 0 on CS0 */
 128 #define CONFIG_SYS_BR0_PRELIM   (CONFIG_SYS_FLASH_BASE  | \
 129                                  BR_PS_16               | \
 130                                  BR_V)
 131 #define CONFIG_SYS_OR0_PRELIM   (OR_AM_64MB             | \
 132                                  OR_GPCM_ACS_DIV4       | \
 133                                  OR_GPCM_SCY_8)
 134
 135 /* NOR Flash 1 on CS1 */
 136 #define CONFIG_SYS_BR1_PRELIM   (CONFIG_SYS_FLASH_BASE2 | \
 137                                  BR_PS_16               | \
 138                                  BR_V)
 139 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_OR0_PRELIM
 140
 141 /* NAND flash on CS2 */
 142 #define CONFIG_SYS_BR2_PRELIM   (CONFIG_SYS_NAND_BASE   | \
 143                                  BR_PS_8                | \
 144                                  BR_V)
 145
 146 /* NAND flash on CS2 */
 147 #define CONFIG_SYS_OR2_PRELIM   (OR_AM_256KB            | \
 148                                  OR_GPCM_BCTLD          | \
 149                                  OR_GPCM_CSNT           | \
 150                                  OR_GPCM_ACS_DIV4       | \
 151                                  OR_GPCM_SCY_4          | \
 152                                  OR_GPCM_TRLX           | \
 153                                  OR_GPCM_EHTR)
 154
 155 /* NAND flash on CS3 */
 156 #define CONFIG_SYS_BR3_PRELIM   (CONFIG_SYS_NAND_BASE2  | \
 157                                  BR_PS_8                | \
 158                                  BR_V)
 159 #define CONFIG_SYS_OR3_PRELIM   CONFIG_SYS_OR2_PRELIM
 160
 161 /*
 162  * Use L1 as initial stack
 163  */
 164 #define CONFIG_SYS_INIT_RAM_LOCK        1
 165 #define CONFIG_SYS_INIT_RAM_ADDR        0xe0000000
 166 #define CONFIG_SYS_INIT_RAM_SIZE                0x4000
 167
 168 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 169 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 170
 171 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)    /* Reserve 512 KB for Mon */
 172 #define CONFIG_SYS_MALLOC_LEN           (1024 * 1024)   /* Reserved for malloc */
 173
 174 /*
 175  * Serial Port
 176  */
 177 #define CONFIG_CONS_INDEX               1
 178 #define CONFIG_SYS_NS16550_SERIAL
 179 #define CONFIG_SYS_NS16550_REG_SIZE     1
 180 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
 181 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
 182 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
 183 #define CONFIG_SYS_BAUDRATE_TABLE       \
 184         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
 185 #define CONFIG_BAUDRATE                 115200
 186 #define CONFIG_LOADS_ECHO               1       /* echo on for serial download */
 187 #define CONFIG_SYS_LOADS_BAUD_CHANGE    1       /* allow baudrate change */
 188
 189 /*
 190  * I2C
 191  */
 192 #define CONFIG_SYS_I2C
 193 #define CONFIG_SYS_I2C_FSL
 194 #define CONFIG_SYS_FSL_I2C_SPEED        400000
 195 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
 196 #define CONFIG_SYS_FSL_I2C_OFFSET       0x3000
 197 #define CONFIG_SYS_FSL_I2C2_SPEED       400000
 198 #define CONFIG_SYS_FSL_I2C2_SLAVE       0x7F
 199 #define CONFIG_SYS_FSL_I2C2_OFFSET      0x3100
 200
 201 /* I2C EEPROM */
 202 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x50
 203 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
 204 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       6       /* 64 byte pages */
 205 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* take up to 10 msec */
 206
 207 /* I2C RTC */
 208 #define CONFIG_RTC_M41T11                       1
 209 #define CONFIG_SYS_I2C_RTC_ADDR                 0x68
 210 #define CONFIG_SYS_M41T11_BASE_YEAR             2000
 211
 212 /* GPIO */
 213 #define CONFIG_PCA953X
 214 #define CONFIG_SYS_I2C_PCA953X_ADDR0            0x18
 215 #define CONFIG_SYS_I2C_PCA953X_ADDR1            0x19
 216 #define CONFIG_SYS_I2C_PCA953X_ADDR             CONFIG_SYS_I2C_PCA953X_ADDR0
 217
 218 /* PCA957 @ 0x18 */
 219 #define CONFIG_SYS_PCA953X_BRD_CFG0             0x01
 220 #define CONFIG_SYS_PCA953X_BRD_CFG1             0x02
 221 #define CONFIG_SYS_PCA953X_BRD_CFG2             0x04
 222 #define CONFIG_SYS_PCA953X_XMC_ROOT0            0x08
 223 #define CONFIG_SYS_PCA953X_FLASH_PASS_CS        0x10
 224 #define CONFIG_SYS_PCA953X_NVM_WP               0x20
 225 #define CONFIG_SYS_PCA953X_MONARCH              0x40
 226 #define CONFIG_SYS_PCA953X_EREADY               0x80
 227
 228 /* PCA957 @ 0x19 */
 229 #define CONFIG_SYS_PCA953X_P14_IO0              0x01
 230 #define CONFIG_SYS_PCA953X_P14_IO1              0x02
 231 #define CONFIG_SYS_PCA953X_P14_IO2              0x04
 232 #define CONFIG_SYS_PCA953X_P14_IO3              0x08
 233 #define CONFIG_SYS_PCA953X_P14_IO4              0x10
 234 #define CONFIG_SYS_PCA953X_P14_IO5              0x20
 235 #define CONFIG_SYS_PCA953X_P14_IO6              0x40
 236 #define CONFIG_SYS_PCA953X_P14_IO7              0x80
 237
 238 /* 12-bit ADC used to measure CPU diode */
 239 #define CONFIG_SYS_I2C_MAX1237_ADDR             0x34
 240
 241 /*
 242  * General PCI
 243  * Memory space is mapped 1-1, but I/O space must start from 0.
 244  */
 245 #define CONFIG_SYS_PCI1_MEM_BUS         0x80000000
 246 #define CONFIG_SYS_PCI1_MEM_PHYS        CONFIG_SYS_PCI1_MEM_BUS
 247 #define CONFIG_SYS_PCI1_MEM_SIZE        0x40000000      /* 1G */
 248 #define CONFIG_SYS_PCI1_IO_BUS          0x00000000
 249 #define CONFIG_SYS_PCI1_IO_PHYS         0xe8000000
 250 #define CONFIG_SYS_PCI1_IO_SIZE         0x00800000      /* 1M */
 251
 252 /*
 253  * Networking options
 254  */
 255 #define CONFIG_TSEC_ENET                /* tsec ethernet support */
 256 #define CONFIG_PHY_GIGE         1       /* Include GbE speed/duplex detection */
 257 #define CONFIG_MII              1       /* MII PHY management */
 258 #define CONFIG_ETHPRIME         "eTSEC1"
 259
 260 #define CONFIG_TSEC1            1
 261 #define CONFIG_TSEC1_NAME       "eTSEC1"
 262 #define TSEC1_FLAGS             TSEC_GIGABIT
 263 #define TSEC1_PHY_ADDR          1
 264 #define TSEC1_PHYIDX            0
 265 #define CONFIG_HAS_ETH0
 266
 267 #define CONFIG_TSEC2            1
 268 #define CONFIG_TSEC2_NAME       "eTSEC2"
 269 #define TSEC2_FLAGS             TSEC_GIGABIT
 270 #define TSEC2_PHY_ADDR          2
 271 #define TSEC2_PHYIDX            0
 272 #define CONFIG_HAS_ETH1
 273
 274 #define CONFIG_TSEC3    1
 275 #define CONFIG_TSEC3_NAME       "eTSEC3"
 276 #define TSEC3_FLAGS             TSEC_GIGABIT
 277 #define TSEC3_PHY_ADDR          3
 278 #define TSEC3_PHYIDX            0
 279 #define CONFIG_HAS_ETH2
 280
 281 #define CONFIG_TSEC4    1
 282 #define CONFIG_TSEC4_NAME       "eTSEC4"
 283 #define TSEC4_FLAGS             TSEC_GIGABIT
 284 #define TSEC4_PHY_ADDR          4
 285 #define TSEC4_PHYIDX            0
 286 #define CONFIG_HAS_ETH3
 287
 288 /*
 289  * BOOTP options
 290  */
 291 #define CONFIG_BOOTP_BOOTFILESIZE
 292 #define CONFIG_BOOTP_BOOTPATH
 293 #define CONFIG_BOOTP_GATEWAY
 294
 295 /*
 296  * Command configuration.
 297  */
 298 #define CONFIG_CMD_DATE
 299 #define CONFIG_CMD_EEPROM
 300 #define CONFIG_CMD_JFFS2
 301 #define CONFIG_CMD_NAND
 302 #define CONFIG_CMD_PCA953X
 303 #define CONFIG_CMD_PCA953X_INFO
 304 #define CONFIG_CMD_PCI
 305 #define CONFIG_CMD_PCI_ENUM
 306 #define CONFIG_CMD_REGINFO
 307
 308 /*
 309  * Miscellaneous configurable options
 310  */
 311 #define CONFIG_SYS_LONGHELP                     /* undef to save memory */
 312 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
 313 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size */
 314 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 315 #define CONFIG_SYS_MAXARGS      16              /* max number of command args */
 316 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size */
 317 #define CONFIG_CMDLINE_EDITING  1               /* add command line history     */
 318 #define CONFIG_AUTO_COMPLETE    1               /* add autocompletion support */
 319 #define CONFIG_LOADADDR         0x1000000       /* default location for tftp and bootm */
 320 #define CONFIG_PANIC_HANG                       /* do not reset board on panic */
 321 #define CONFIG_PREBOOT                          /* enable preboot variable */
 322 #define CONFIG_INTEGRITY                        /* support booting INTEGRITY OS */
 323 #define CONFIG_INTERRUPTS               /* enable pci, srio, ddr interrupts */
 324
 325 /*
 326  * For booting Linux, the board info and command line data
 327  * have to be in the first 16 MB of memory, since this is
 328  * the maximum mapped by the Linux kernel during initialization.
 329  */
 330 #define CONFIG_SYS_BOOTMAPSZ    (16 << 20)      /* Initial Memory map for Linux*/
 331 #define CONFIG_SYS_BOOTM_LEN    (16 << 20)      /* Increase max gunzip size */
 332
 333 /*
 334  * Environment Configuration
 335  */
 336 #define CONFIG_ENV_IS_IN_FLASH  1
 337 #define CONFIG_ENV_SECT_SIZE    0x20000         /* 128k (one sector) for env */
 338 #define CONFIG_ENV_SIZE         0x8000
 339 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
 340
 341 /*
 342  * Flash memory map:
 343  * fff80000 - ffffffff     Pri U-Boot (512 KB)
 344  * fff40000 - fff7ffff     Pri U-Boot Environment (256 KB)
 345  * fff00000 - fff3ffff     Pri FDT (256KB)
 346  * fef00000 - ffefffff     Pri OS image (16MB)
 347  * fc000000 - feefffff     Pri OS Use/Filesystem (47MB)
 348  *
 349  * fbf80000 - fbffffff     Sec U-Boot (512 KB)
 350  * fbf40000 - fbf7ffff     Sec U-Boot Environment (256 KB)
 351  * fbf00000 - fbf3ffff     Sec FDT (256KB)
 352  * faf00000 - fbefffff     Sec OS image (16MB)
 353  * f8000000 - faefffff     Sec OS Use/Filesystem (47MB)
 354  */
 355 #define CONFIG_UBOOT1_ENV_ADDR  __stringify(0xfff80000)
 356 #define CONFIG_UBOOT2_ENV_ADDR  __stringify(0xfbf80000)
 357 #define CONFIG_FDT1_ENV_ADDR    __stringify(0xfff00000)
 358 #define CONFIG_FDT2_ENV_ADDR    __stringify(0xfbf00000)
 359 #define CONFIG_OS1_ENV_ADDR     __stringify(0xfef00000)
 360 #define CONFIG_OS2_ENV_ADDR     __stringify(0xfaf00000)
 361
 362 #define CONFIG_PROG_UBOOT1                                              \
 363         "$download_cmd $loadaddr $ubootfile; "                          \
 364         "if test $? -eq 0; then "                                       \
 365                 "protect off "CONFIG_UBOOT1_ENV_ADDR" +80000; "         \
 366                 "erase "CONFIG_UBOOT1_ENV_ADDR" +80000; "               \
 367                 "cp.w $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 40000; "       \
 368                 "protect on "CONFIG_UBOOT1_ENV_ADDR" +80000; "          \
 369                 "cmp.b $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 80000; "      \
 370                 "if test $? -ne 0; then "                               \
 371                         "echo PROGRAM FAILED; "                         \
 372                 "else; "                                                \
 373                         "echo PROGRAM SUCCEEDED; "                      \
 374                 "fi; "                                                  \
 375         "else; "                                                        \
 376                 "echo DOWNLOAD FAILED; "                                \
 377         "fi;"
 378
 379 #define CONFIG_PROG_UBOOT2                                              \
 380         "$download_cmd $loadaddr $ubootfile; "                          \
 381         "if test $? -eq 0; then "                                       \
 382                 "protect off "CONFIG_UBOOT2_ENV_ADDR" +80000; "         \
 383                 "erase "CONFIG_UBOOT2_ENV_ADDR" +80000; "               \
 384                 "cp.w $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 40000; "       \
 385                 "protect on "CONFIG_UBOOT2_ENV_ADDR" +80000; "          \
 386                 "cmp.b $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 80000; "      \
 387                 "if test $? -ne 0; then "                               \
 388                         "echo PROGRAM FAILED; "                         \
 389                 "else; "                                                \
 390                         "echo PROGRAM SUCCEEDED; "                      \
 391                 "fi; "                                                  \
 392         "else; "                                                        \
 393                 "echo DOWNLOAD FAILED; "                                \
 394         "fi;"
 395
 396 #define CONFIG_BOOT_OS_NET                                              \
 397         "$download_cmd $osaddr $osfile; "                               \
 398         "if test $? -eq 0; then "                                       \
 399                 "if test -n $fdtaddr; then "                            \
 400                         "$download_cmd $fdtaddr $fdtfile; "             \
 401                         "if test $? -eq 0; then "                       \
 402                                 "bootm $osaddr - $fdtaddr; "            \
 403                         "else; "                                        \
 404                                 "echo FDT DOWNLOAD FAILED; "            \
 405                         "fi; "                                          \
 406                 "else; "                                                \
 407                         "bootm $osaddr; "                               \
 408                 "fi; "                                                  \
 409         "else; "                                                        \
 410                 "echo OS DOWNLOAD FAILED; "                             \
 411         "fi;"
 412
 413 #define CONFIG_PROG_OS1                                                 \
 414         "$download_cmd $osaddr $osfile; "                               \
 415         "if test $? -eq 0; then "                                       \
 416                 "erase "CONFIG_OS1_ENV_ADDR" +$filesize; "              \
 417                 "cp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; "        \
 418                 "cmp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; "       \
 419                 "if test $? -ne 0; then "                               \
 420                         "echo OS PROGRAM FAILED; "                      \
 421                 "else; "                                                \
 422                         "echo OS PROGRAM SUCCEEDED; "                   \
 423                 "fi; "                                                  \
 424         "else; "                                                        \
 425                 "echo OS DOWNLOAD FAILED; "                             \
 426         "fi;"
 427
 428 #define CONFIG_PROG_OS2                                                 \
 429         "$download_cmd $osaddr $osfile; "                               \
 430         "if test $? -eq 0; then "                                       \
 431                 "erase "CONFIG_OS2_ENV_ADDR" +$filesize; "              \
 432                 "cp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; "        \
 433                 "cmp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; "       \
 434                 "if test $? -ne 0; then "                               \
 435                         "echo OS PROGRAM FAILED; "                      \
 436                 "else; "                                                \
 437                         "echo OS PROGRAM SUCCEEDED; "                   \
 438                 "fi; "                                                  \
 439         "else; "                                                        \
 440                 "echo OS DOWNLOAD FAILED; "                             \
 441         "fi;"
 442
 443 #define CONFIG_PROG_FDT1                                                \
 444         "$download_cmd $fdtaddr $fdtfile; "                             \
 445         "if test $? -eq 0; then "                                       \
 446                 "erase "CONFIG_FDT1_ENV_ADDR" +$filesize;"              \
 447                 "cp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; "      \
 448                 "cmp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; "     \
 449                 "if test $? -ne 0; then "                               \
 450                         "echo FDT PROGRAM FAILED; "                     \
 451                 "else; "                                                \
 452                         "echo FDT PROGRAM SUCCEEDED; "                  \
 453                 "fi; "                                                  \
 454         "else; "                                                        \
 455                 "echo FDT DOWNLOAD FAILED; "                            \
 456         "fi;"
 457
 458 #define CONFIG_PROG_FDT2                                                \
 459         "$download_cmd $fdtaddr $fdtfile; "                             \
 460         "if test $? -eq 0; then "                                       \
 461                 "erase "CONFIG_FDT2_ENV_ADDR" +$filesize;"              \
 462                 "cp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; "      \
 463                 "cmp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; "     \
 464                 "if test $? -ne 0; then "                               \
 465                         "echo FDT PROGRAM FAILED; "                     \
 466                 "else; "                                                \
 467                         "echo FDT PROGRAM SUCCEEDED; "                  \
 468                 "fi; "                                                  \
 469         "else; "                                                        \
 470                 "echo FDT DOWNLOAD FAILED; "                            \
 471         "fi;"
 472
 473 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 474         "autoload=yes\0"                                                \
 475         "download_cmd=tftp\0"                                           \
 476         "console_args=console=ttyS0,115200\0"                           \
 477         "root_args=root=/dev/nfs rw\0"                                  \
 478         "misc_args=ip=on\0"                                             \
 479         "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
 480         "bootfile=/home/user/file\0"                                    \
 481         "osfile=/home/user/board.uImage\0"                              \
 482         "fdtfile=/home/user/board.dtb\0"                                \
 483         "ubootfile=/home/user/u-boot.bin\0"                             \
 484         "fdtaddr=0x1e00000\0"                                           \
 485         "osaddr=0x1000000\0"                                            \
 486         "loadaddr=0x1000000\0"                                          \
 487         "prog_uboot1="CONFIG_PROG_UBOOT1"\0"                            \
 488         "prog_uboot2="CONFIG_PROG_UBOOT2"\0"                            \
 489         "prog_os1="CONFIG_PROG_OS1"\0"                                  \
 490         "prog_os2="CONFIG_PROG_OS2"\0"                                  \
 491         "prog_fdt1="CONFIG_PROG_FDT1"\0"                                \
 492         "prog_fdt2="CONFIG_PROG_FDT2"\0"                                \
 493         "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0"          \
 494         "bootcmd_flash1=run set_bootargs; "                             \
 495                 "bootm "CONFIG_OS1_ENV_ADDR" - "CONFIG_FDT1_ENV_ADDR"\0"\
 496         "bootcmd_flash2=run set_bootargs; "                             \
 497                 "bootm "CONFIG_OS2_ENV_ADDR" - "CONFIG_FDT2_ENV_ADDR"\0"\
 498         "bootcmd=run bootcmd_flash1\0"
 499 #endif  /* __CONFIG_H */