include/configs/yosemite.h

   1 /*
   2  * (C) Copyright 2005-2007
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /************************************************************************
  25  * yosemite.h - configuration for Yosemite & Yellowstone boards
  26  ***********************************************************************/
  27 #ifndef __CONFIG_H
  28 #define __CONFIG_H
  29
  30 /*-----------------------------------------------------------------------
  31  * High Level Configuration Options
  32  *----------------------------------------------------------------------*/
  33 /* This config file is used for Yosemite (440EP) and Yellowstone (440GR)*/
  34 #ifndef CONFIG_YELLOWSTONE
  35 #define CONFIG_440EP            1       /* Specific PPC440EP support    */
  36 #define CONFIG_HOSTNAME         yosemite
  37 #else
  38 #define CONFIG_440GR            1       /* Specific PPC440GR support    */
  39 #define CONFIG_HOSTNAME         yellowstone
  40 #endif
  41 #define CONFIG_440              1       /* ... PPC440 family            */
  42 #define CONFIG_4xx              1       /* ... PPC4xx family            */
  43 #define CONFIG_SYS_CLK_FREQ     66666666    /* external freq to pll     */
  44
  45 #define CONFIG_BOARD_EARLY_INIT_F 1     /* Call board_early_init_f      */
  46 #define CONFIG_MISC_INIT_R      1       /* call misc_init_r()           */
  47 #define CONFIG_BOARD_RESET      1       /* call board_reset()           */
  48
  49 /*-----------------------------------------------------------------------
  50  * Base addresses -- Note these are effective addresses where the
  51  * actual resources get mapped (not physical addresses)
  52  *----------------------------------------------------------------------*/
  53 #define CFG_MONITOR_LEN         (512 * 1024)    /* Reserve 512 kB for Monitor   */
  54 #define CFG_MALLOC_LEN          (256 * 1024)    /* Reserve 256 kB for malloc()  */
  55 #define CFG_MONITOR_BASE        (-CFG_MONITOR_LEN)
  56 #define CFG_SDRAM_BASE          0x00000000          /* _must_ be 0      */
  57 #define CFG_FLASH_BASE          0xfc000000          /* start of FLASH   */
  58 #define CFG_PCI_MEMBASE         0xa0000000          /* mapped pci memory*/
  59 #define CFG_PCI_MEMBASE1        CFG_PCI_MEMBASE  + 0x10000000
  60 #define CFG_PCI_MEMBASE2        CFG_PCI_MEMBASE1 + 0x10000000
  61 #define CFG_PCI_MEMBASE3        CFG_PCI_MEMBASE2 + 0x10000000
  62
  63 /*Don't change either of these*/
  64 #define CFG_PERIPHERAL_BASE     0xef600000          /* internal peripherals*/
  65 #define CFG_PCI_BASE            0xe0000000          /* internal PCI regs*/
  66 /*Don't change either of these*/
  67
  68 #define CFG_USB_DEVICE          0x50000000
  69 #define CFG_NVRAM_BASE_ADDR     0x80000000
  70 #define CFG_BCSR_BASE           (CFG_NVRAM_BASE_ADDR | 0x2000)
  71 #define CFG_BOOT_BASE_ADDR      0xf0000000
  72
  73 /*-----------------------------------------------------------------------
  74  * Initial RAM & stack pointer (placed in SDRAM)
  75  *----------------------------------------------------------------------*/
  76 #define CFG_INIT_RAM_DCACHE     1               /* d-cache as init ram  */
  77 #define CFG_INIT_RAM_ADDR       0x70000000              /* DCache       */
  78 #define CFG_INIT_RAM_END        (4 << 10)
  79 #define CFG_GBL_DATA_SIZE       256                     /* num bytes initial data*/
  80 #define CFG_GBL_DATA_OFFSET     (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
  81 #define CFG_INIT_SP_OFFSET      CFG_GBL_DATA_OFFSET
  82
  83 /*-----------------------------------------------------------------------
  84  * Serial Port
  85  *----------------------------------------------------------------------*/
  86 #define CFG_EXT_SERIAL_CLOCK    11059200 /* use external 11.059MHz clk  */
  87 #define CONFIG_BAUDRATE         115200
  88 #define CONFIG_SERIAL_MULTI     1
  89 /*define this if you want console on UART1*/
  90 #undef CONFIG_UART1_CONSOLE
  91
  92 #define CFG_BAUDRATE_TABLE  \
  93     {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
  94
  95 /*-----------------------------------------------------------------------
  96  * Environment
  97  *----------------------------------------------------------------------*/
  98 /*
  99  * Define here the location of the environment variables (FLASH or EEPROM).
 100  * Note: DENX encourages to use redundant environment in FLASH.
 101  */
 102 #if 1
 103 #define CFG_ENV_IS_IN_FLASH     1       /* use FLASH for environment vars       */
 104 #else
 105 #define CFG_ENV_IS_IN_EEPROM    1       /* use EEPROM for environment vars      */
 106 #endif
 107
 108 /*-----------------------------------------------------------------------
 109  * FLASH related
 110  *----------------------------------------------------------------------*/
 111 #define CFG_FLASH_CFI                           /* The flash is CFI compatible  */
 112 #define CFG_FLASH_CFI_DRIVER                    /* Use common CFI driver        */
 113 #define CFG_FLASH_CFI_AMD_RESET 1               /* AMD RESET for STM 29W320DB!  */
 114
 115 #define CFG_MAX_FLASH_BANKS     1       /* max number of memory banks           */
 116 #define CFG_MAX_FLASH_SECT      512     /* max number of sectors on one chip    */
 117
 118 #define CFG_FLASH_ERASE_TOUT    120000  /* Timeout for Flash Erase (in ms)      */
 119 #define CFG_FLASH_WRITE_TOUT    500     /* Timeout for Flash Write (in ms)      */
 120
 121 #define CFG_FLASH_USE_BUFFER_WRITE 1    /* use buffered writes (20x faster)     */
 122
 123 #define CFG_FLASH_EMPTY_INFO            /* print 'E' for empty sector on flinfo */
 124
 125 #ifdef CFG_ENV_IS_IN_FLASH
 126 #define CFG_ENV_SECT_SIZE       0x20000 /* size of one complete sector          */
 127 #define CFG_ENV_ADDR            (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
 128 #define CFG_ENV_SIZE            0x2000  /* Total Size of Environment Sector     */
 129
 130 /* Address and size of Redundant Environment Sector     */
 131 #define CFG_ENV_ADDR_REDUND     (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
 132 #define CFG_ENV_SIZE_REDUND     (CFG_ENV_SIZE)
 133 #endif /* CFG_ENV_IS_IN_FLASH */
 134
 135 /*-----------------------------------------------------------------------
 136  * DDR SDRAM
 137  *----------------------------------------------------------------------*/
 138 #undef CONFIG_SPD_EEPROM               /* Don't use SPD EEPROM for setup    */
 139 #define CFG_KBYTES_SDRAM        (128 * 1024)    /* 128MB                    */
 140 #define CFG_SDRAM_BANKS         (2)
 141
 142
 143 /*-----------------------------------------------------------------------
 144  * I2C
 145  *----------------------------------------------------------------------*/
 146 #define CONFIG_HARD_I2C         1           /* I2C with hardware support        */
 147 #undef  CONFIG_SOFT_I2C                     /* I2C bit-banged           */
 148 #define CFG_I2C_SPEED           400000  /* I2C speed and slave address  */
 149 #define CFG_I2C_SLAVE           0x7F
 150
 151 #define CFG_I2C_MULTI_EEPROMS
 152 #define CFG_I2C_EEPROM_ADDR     (0xa8>>1)
 153 #define CFG_I2C_EEPROM_ADDR_LEN 1
 154 #define CFG_EEPROM_PAGE_WRITE_ENABLE
 155 #define CFG_EEPROM_PAGE_WRITE_BITS 3
 156 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
 157
 158 #ifdef CFG_ENV_IS_IN_EEPROM
 159 #define CFG_ENV_SIZE            0x200       /* Size of Environment vars */
 160 #define CFG_ENV_OFFSET          0x0
 161 #endif /* CFG_ENV_IS_IN_EEPROM */
 162
 163 /* I2C SYSMON (LM75, AD7414 is almost compatible)                       */
 164 #define CONFIG_DTT_LM75         1               /* ON Semi's LM75       */
 165 #define CONFIG_DTT_AD7414       1               /* use AD7414           */
 166 #define CONFIG_DTT_SENSORS      {0}             /* Sensor addresses     */
 167 #define CFG_DTT_MAX_TEMP        70
 168 #define CFG_DTT_LOW_TEMP        -30
 169 #define CFG_DTT_HYSTERESIS      3
 170
 171 #define CONFIG_PREBOOT  "echo;" \
 172         "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
 173         "echo"
 174
 175 #undef  CONFIG_BOOTARGS
 176
 177 /* Setup some board specific values for the default environment variables */
 178 #ifndef CONFIG_YELLOWSTONE
 179 #define CONFIG_HOSTNAME         yosemite
 180 #define CFG_BOOTFILE            "bootfile=/tftpboot/yosemite/uImage\0"
 181 #define CFG_ROOTPATH            "rootpath=/opt/eldk/ppc_4xxFP\0"
 182 #else
 183 #define CONFIG_HOSTNAME         yellowstone
 184 #define CFG_BOOTFILE            "bootfile=/tftpboot/yellowstone/uImage\0"
 185 #define CFG_ROOTPATH            "rootpath=/opt/eldk/ppc_4xx\0"
 186 #endif
 187
 188 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 189         CFG_BOOTFILE                                                    \
 190         CFG_ROOTPATH                                                    \
 191         "netdev=eth0\0"                                                 \
 192         "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 193                 "nfsroot=${serverip}:${rootpath}\0"                     \
 194         "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 195         "addip=setenv bootargs ${bootargs} "                            \
 196                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 197                 ":${hostname}:${netdev}:off panic=1\0"                  \
 198         "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
 199         "flash_nfs=run nfsargs addip addtty;"                           \
 200                 "bootm ${kernel_addr}\0"                                \
 201         "flash_self=run ramargs addip addtty;"                          \
 202                 "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
 203         "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;"     \
 204                 "bootm\0"                                               \
 205         "bootfile=/tftpboot/${hostname}/uImage\0"                       \
 206         "kernel_addr=fc000000\0"                                        \
 207         "ramdisk_addr=fc180000\0"                                       \
 208         "load=tftp 200000 /tftpboot/${hostname}/u-boot.bin\0"           \
 209         "update=protect off fff80000 ffffffff;era fff80000 ffffffff;"   \
 210                 "cp.b 200000 fff80000 80000;"                           \
 211                 "setenv filesize;saveenv\0"                             \
 212         "upd=run load;run update\0"                                     \
 213         ""
 214 #define CONFIG_BOOTCOMMAND      "run flash_self"
 215
 216 #if 0
 217 #define CONFIG_BOOTDELAY        -1      /* autoboot disabled            */
 218 #else
 219 #define CONFIG_BOOTDELAY        5       /* autoboot after 5 seconds     */
 220 #endif
 221
 222 #define CONFIG_BAUDRATE         115200
 223
 224 #define CONFIG_LOADS_ECHO       1       /* echo on for serial download  */
 225 #define CFG_LOADS_BAUD_CHANGE   1       /* allow baudrate change        */
 226
 227 #define CONFIG_MII              1       /* MII PHY management           */
 228 #define CONFIG_NET_MULTI        1       /* required for netconsole      */
 229 #define CONFIG_PHY1_ADDR        3
 230 #define CONFIG_HAS_ETH1         1       /* add support for "eth1addr"   */
 231 #define CONFIG_PHY_ADDR         1       /* PHY address, See schematics  */
 232
 233 #define CFG_RX_ETH_BUFFER       32      /* Number of ethernet rx buffers & descriptors */
 234
 235 #define CONFIG_NETCONSOLE               /* include NetConsole support   */
 236
 237 /* Partitions */
 238 #define CONFIG_MAC_PARTITION
 239 #define CONFIG_DOS_PARTITION
 240 #define CONFIG_ISO_PARTITION
 241
 242 #ifdef CONFIG_440EP
 243 /* USB */
 244 #define CONFIG_USB_OHCI_NEW
 245 #define CONFIG_USB_STORAGE
 246 #define CFG_OHCI_BE_CONTROLLER
 247
 248 #undef CFG_USB_OHCI_BOARD_INIT
 249 #define CFG_USB_OHCI_CPU_INIT   1
 250 #define CFG_USB_OHCI_REGS_BASE  (CFG_PERIPHERAL_BASE | 0x1000)
 251 #define CFG_USB_OHCI_SLOT_NAME  "ppc440"
 252 #define CFG_USB_OHCI_MAX_ROOT_PORTS     15
 253
 254 /* Comment this out to enable USB 1.1 device */
 255 #define USB_2_0_DEVICE
 256
 257 #define CONFIG_SUPPORT_VFAT
 258 #endif /* CONFIG_440EP */
 259
 260 #ifdef DEBUG
 261 #define CONFIG_PANIC_HANG
 262 #else
 263 #define CONFIG_HW_WATCHDOG                      /* watchdog */
 264 #endif
 265
 266
 267 /*
 268  * BOOTP options
 269  */
 270 #define CONFIG_BOOTP_BOOTFILESIZE
 271 #define CONFIG_BOOTP_BOOTPATH
 272 #define CONFIG_BOOTP_GATEWAY
 273 #define CONFIG_BOOTP_HOSTNAME
 274
 275
 276 /*
 277  * Command line configuration.
 278  */
 279 #include <config_cmd_default.h>
 280
 281 #define CONFIG_CMD_ASKENV
 282 #define CONFIG_CMD_DHCP
 283 #define CONFIG_CMD_DIAG
 284 #define CONFIG_CMD_DTT
 285 #define CONFIG_CMD_ELF
 286 #define CONFIG_CMD_EEPROM
 287 #define CONFIG_CMD_I2C
 288 #define CONFIG_CMD_IRQ
 289 #define CONFIG_CMD_MII
 290 #define CONFIG_CMD_NET
 291 #define CONFIG_CMD_NFS
 292 #define CONFIG_CMD_PCI
 293 #define CONFIG_CMD_PING
 294 #define CONFIG_CMD_REGINFO
 295 #define CONFIG_CMD_SDRAM
 296
 297 #ifdef CONFIG_440EP
 298     #define CONFIG_CMD_USB
 299     #define CONFIG_CMD_FAT
 300     #define CONFIG_CMD_EXT2
 301 #endif
 302
 303
 304 /*
 305  * Miscellaneous configurable options
 306  */
 307 #define CFG_LONGHELP                    /* undef to save memory         */
 308 #define CFG_PROMPT              "=> "   /* Monitor Command Prompt       */
 309 #if defined(CONFIG_CMD_KGDB)
 310 #define CFG_CBSIZE              1024    /* Console I/O Buffer Size      */
 311 #else
 312 #define CFG_CBSIZE              256     /* Console I/O Buffer Size      */
 313 #endif
 314 #define CFG_PBSIZE              (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
 315 #define CFG_MAXARGS             16      /* max number of command args   */
 316 #define CFG_BARGSIZE            CFG_CBSIZE /* Boot Argument Buffer Size */
 317
 318 #define CFG_MEMTEST_START       0x0400000 /* memtest works on           */
 319 #define CFG_MEMTEST_END         0x0C00000 /* 4 ... 12 MB in DRAM        */
 320
 321 #define CFG_LOAD_ADDR           0x100000        /* default load address */
 322 #define CFG_EXTBDINFO           1       /* To use extended board_into (bd_t) */
 323 #define CONFIG_LYNXKDI          1       /* support kdi files            */
 324
 325 #define CFG_HZ                  1000    /* decrementer freq: 1 ms ticks */
 326
 327 #define CONFIG_CMDLINE_EDITING  1       /* add command line history     */
 328 #define CONFIG_LOOPW            1       /* enable loopw command         */
 329 #define CONFIG_MX_CYCLIC        1       /* enable mdc/mwc commands      */
 330 #define CONFIG_ZERO_BOOTDELAY_CHECK     /* check for keypress on bootdelay==0 */
 331 #define CONFIG_VERSION_VARIABLE 1       /* include version env variable */
 332
 333 /*-----------------------------------------------------------------------
 334  * PCI stuff
 335  *-----------------------------------------------------------------------
 336  */
 337 /* General PCI */
 338 #define CONFIG_PCI                      /* include pci support          */
 339 #undef  CONFIG_PCI_PNP                  /* do (not) pci plug-and-play   */
 340 #define CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup  */
 341 #define CFG_PCI_TARGBASE        0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
 342
 343 /* Board-specific PCI */
 344 #define CFG_PCI_TARGET_INIT
 345 #define CFG_PCI_MASTER_INIT
 346
 347 #define CFG_PCI_SUBSYS_VENDORID 0x10e8  /* AMCC */
 348 #define CFG_PCI_SUBSYS_ID       0xcafe  /* Whatever */
 349
 350 /*
 351  * For booting Linux, the board info and command line data
 352  * have to be in the first 8 MB of memory, since this is
 353  * the maximum mapped by the Linux kernel during initialization.
 354  */
 355 #define CFG_BOOTMAPSZ           (8 << 20)       /* Initial Memory map for Linux */
 356
 357 /*-----------------------------------------------------------------------
 358  * External Bus Controller (EBC) Setup
 359  *----------------------------------------------------------------------*/
 360 #define CFG_FLASH               CFG_FLASH_BASE
 361 #define CFG_CPLD                0x80000000
 362
 363 /* Memory Bank 0 (NOR-FLASH) initialization                                     */
 364 #define CFG_EBC_PB0AP           0x03017300
 365 #define CFG_EBC_PB0CR           (CFG_FLASH | 0xda000)
 366
 367 /* Memory Bank 2 (CPLD) initialization                                          */
 368 #define CFG_EBC_PB2AP           0x04814500
 369 #define CFG_EBC_PB2CR           (CFG_CPLD | 0x18000)
 370
 371 #define CFG_BCSR5_PCI66EN       0x80
 372
 373 /*
 374  * Internal Definitions
 375  *
 376  * Boot Flags
 377  */
 378 #define BOOTFLAG_COLD   0x01            /* Normal Power-On: Boot from FLASH     */
 379 #define BOOTFLAG_WARM   0x02            /* Software reboot                      */
 380
 381 #if defined(CONFIG_CMD_KGDB)
 382 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 383 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
 384 #endif
 385
 386 #endif  /* __CONFIG_H */