include/configs/yosemite.h

   1 /*
   2  * (C) Copyright 2005-2007
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /************************************************************************
  25  * yosemite.h - configuration for Yosemite & Yellowstone boards
  26  ***********************************************************************/
  27 #ifndef __CONFIG_H
  28 #define __CONFIG_H
  29
  30 /*-----------------------------------------------------------------------
  31  * High Level Configuration Options
  32  *----------------------------------------------------------------------*/
  33 /* This config file is used for Yosemite (440EP) and Yellowstone (440GR)*/
  34 #ifndef CONFIG_YELLOWSTONE
  35 #define CONFIG_440EP            1       /* Specific PPC440EP support    */
  36 #define CONFIG_HOSTNAME         yosemite
  37 #else
  38 #define CONFIG_440GR            1       /* Specific PPC440GR support    */
  39 #define CONFIG_HOSTNAME         yellowstone
  40 #endif
  41 #define CONFIG_440              1       /* ... PPC440 family            */
  42 #define CONFIG_4xx              1       /* ... PPC4xx family            */
  43 #define CONFIG_SYS_CLK_FREQ     66666666    /* external freq to pll     */
  44
  45 /*
  46  * Include common defines/options for all AMCC eval boards
  47  */
  48 #include "amcc-common.h"
  49
  50 #define CONFIG_BOARD_EARLY_INIT_F 1     /* Call board_early_init_f      */
  51 #define CONFIG_MISC_INIT_R      1       /* call misc_init_r()           */
  52 #define CONFIG_BOARD_RESET      1       /* call board_reset()           */
  53
  54 /*-----------------------------------------------------------------------
  55  * Base addresses -- Note these are effective addresses where the
  56  * actual resources get mapped (not physical addresses)
  57  *----------------------------------------------------------------------*/
  58 #define CONFIG_SYS_FLASH_BASE           0xfc000000          /* start of FLASH   */
  59 #define CONFIG_SYS_PCI_MEMBASE          0xa0000000          /* mapped pci memory*/
  60 #define CONFIG_SYS_PCI_MEMBASE1        CONFIG_SYS_PCI_MEMBASE  + 0x10000000
  61 #define CONFIG_SYS_PCI_MEMBASE2        CONFIG_SYS_PCI_MEMBASE1 + 0x10000000
  62 #define CONFIG_SYS_PCI_MEMBASE3        CONFIG_SYS_PCI_MEMBASE2 + 0x10000000
  63
  64 /*Don't change either of these*/
  65 #define CONFIG_SYS_PERIPHERAL_BASE     0xef600000           /* internal peripherals*/
  66 #define CONFIG_SYS_PCI_BASE             0xe0000000          /* internal PCI regs*/
  67 /*Don't change either of these*/
  68
  69 #define CONFIG_SYS_USB_DEVICE          0x50000000
  70 #define CONFIG_SYS_NVRAM_BASE_ADDR     0x80000000
  71 #define CONFIG_SYS_BCSR_BASE            (CONFIG_SYS_NVRAM_BASE_ADDR | 0x2000)
  72 #define CONFIG_SYS_BOOT_BASE_ADDR      0xf0000000
  73
  74 /*-----------------------------------------------------------------------
  75  * Initial RAM & stack pointer (placed in SDRAM)
  76  *----------------------------------------------------------------------*/
  77 #define CONFIG_SYS_INIT_RAM_DCACHE      1               /* d-cache as init ram  */
  78 #define CONFIG_SYS_INIT_RAM_ADDR        0x70000000              /* DCache       */
  79 #define CONFIG_SYS_INIT_RAM_END (4 << 10)
  80 #define CONFIG_SYS_GBL_DATA_SIZE        256                     /* num bytes initial data*/
  81 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
  82 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
  83
  84 /*-----------------------------------------------------------------------
  85  * Serial Port
  86  *----------------------------------------------------------------------*/
  87 #define CONFIG_SYS_EXT_SERIAL_CLOCK     11059200 /* use external 11.059MHz clk  */
  88 /*define this if you want console on UART1*/
  89 #undef CONFIG_UART1_CONSOLE
  90
  91 /*-----------------------------------------------------------------------
  92  * Environment
  93  *----------------------------------------------------------------------*/
  94 /*
  95  * Define here the location of the environment variables (FLASH or EEPROM).
  96  * Note: DENX encourages to use redundant environment in FLASH.
  97  */
  98 #if 1
  99 #define CONFIG_ENV_IS_IN_FLASH     1    /* use FLASH for environment vars       */
 100 #else
 101 #define CONFIG_ENV_IS_IN_EEPROM 1       /* use EEPROM for environment vars      */
 102 #endif
 103
 104 /*-----------------------------------------------------------------------
 105  * FLASH related
 106  *----------------------------------------------------------------------*/
 107 #define CONFIG_SYS_FLASH_CFI                            /* The flash is CFI compatible  */
 108 #define CONFIG_FLASH_CFI_DRIVER                 /* Use common CFI driver        */
 109 #define CONFIG_SYS_FLASH_CFI_AMD_RESET 1                /* AMD RESET for STM 29W320DB!  */
 110
 111 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks           */
 112 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* max number of sectors on one chip    */
 113
 114 #define CONFIG_SYS_FLASH_ERASE_TOUT     120000  /* Timeout for Flash Erase (in ms)      */
 115 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Timeout for Flash Write (in ms)      */
 116
 117 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1     /* use buffered writes (20x faster)     */
 118
 119 #define CONFIG_SYS_FLASH_EMPTY_INFO             /* print 'E' for empty sector on flinfo */
 120
 121 #ifdef CONFIG_ENV_IS_IN_FLASH
 122 #define CONFIG_ENV_SECT_SIZE    0x20000 /* size of one complete sector          */
 123 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE)
 124 #define CONFIG_ENV_SIZE         0x2000  /* Total Size of Environment Sector     */
 125
 126 /* Address and size of Redundant Environment Sector     */
 127 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
 128 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
 129 #endif /* CONFIG_ENV_IS_IN_FLASH */
 130
 131 /*-----------------------------------------------------------------------
 132  * DDR SDRAM
 133  *----------------------------------------------------------------------*/
 134 #undef CONFIG_SPD_EEPROM               /* Don't use SPD EEPROM for setup    */
 135 #define CONFIG_SYS_KBYTES_SDRAM        (128 * 1024)    /* 128MB             */
 136 #define CONFIG_SYS_SDRAM_BANKS          (2)
 137
 138 /*-----------------------------------------------------------------------
 139  * I2C
 140  *----------------------------------------------------------------------*/
 141 #define CONFIG_SYS_I2C_SPEED            400000  /* I2C speed and slave address  */
 142
 143 #define CONFIG_SYS_I2C_MULTI_EEPROMS
 144 #define CONFIG_SYS_I2C_EEPROM_ADDR      (0xa8>>1)
 145 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 146 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
 147 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
 148
 149 #ifdef CONFIG_ENV_IS_IN_EEPROM
 150 #define CONFIG_ENV_SIZE         0x200       /* Size of Environment vars */
 151 #define CONFIG_ENV_OFFSET               0x0
 152 #endif /* CONFIG_ENV_IS_IN_EEPROM */
 153
 154 /* I2C SYSMON (LM75, AD7414 is almost compatible)                       */
 155 #define CONFIG_DTT_LM75         1               /* ON Semi's LM75       */
 156 #define CONFIG_DTT_AD7414       1               /* use AD7414           */
 157 #define CONFIG_DTT_SENSORS      {0}             /* Sensor addresses     */
 158 #define CONFIG_SYS_DTT_MAX_TEMP 70
 159 #define CONFIG_SYS_DTT_LOW_TEMP -30
 160 #define CONFIG_SYS_DTT_HYSTERESIS       3
 161
 162 /*
 163  * Default environment variables
 164  */
 165 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 166         CONFIG_AMCC_DEF_ENV                                             \
 167         CONFIG_AMCC_DEF_ENV_POWERPC                                     \
 168         CONFIG_AMCC_DEF_ENV_PPC_OLD                                     \
 169         CONFIG_AMCC_DEF_ENV_NOR_UPD                                     \
 170         "kernel_addr=fc000000\0"                                        \
 171         "ramdisk_addr=fc180000\0"                                       \
 172         ""
 173
 174 #define CONFIG_HAS_ETH0         1       /* add support for "ethaddr"    */
 175 #define CONFIG_HAS_ETH1         1       /* add support for "eth1addr"   */
 176 #define CONFIG_PHY_ADDR         1       /* PHY address, See schematics  */
 177 #define CONFIG_PHY1_ADDR        3
 178
 179 /* Partitions */
 180 #define CONFIG_MAC_PARTITION
 181 #define CONFIG_DOS_PARTITION
 182 #define CONFIG_ISO_PARTITION
 183
 184 #ifdef CONFIG_440EP
 185 /* USB */
 186 #define CONFIG_USB_OHCI_NEW
 187 #define CONFIG_USB_STORAGE
 188 #define CONFIG_SYS_OHCI_BE_CONTROLLER
 189
 190 #undef CONFIG_SYS_USB_OHCI_BOARD_INIT
 191 #define CONFIG_SYS_USB_OHCI_CPU_INIT    1
 192 #define CONFIG_SYS_USB_OHCI_REGS_BASE   (CONFIG_SYS_PERIPHERAL_BASE | 0x1000)
 193 #define CONFIG_SYS_USB_OHCI_SLOT_NAME   "ppc440"
 194 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      15
 195
 196 /* Comment this out to enable USB 1.1 device */
 197 #define USB_2_0_DEVICE
 198
 199 #define CONFIG_SUPPORT_VFAT
 200 #endif /* CONFIG_440EP */
 201
 202 #ifdef DEBUG
 203 #define CONFIG_PANIC_HANG
 204 #else
 205 #define CONFIG_HW_WATCHDOG                      /* watchdog */
 206 #endif
 207
 208 /*
 209  * Commands additional to the ones defined in amcc-common.h
 210  */
 211 #define CONFIG_CMD_DTT
 212 #define CONFIG_CMD_PCI
 213
 214 #ifdef CONFIG_440EP
 215     #define CONFIG_CMD_USB
 216     #define CONFIG_CMD_FAT
 217     #define CONFIG_CMD_EXT2
 218 #endif
 219
 220 /*-----------------------------------------------------------------------
 221  * PCI stuff
 222  *-----------------------------------------------------------------------
 223  */
 224 /* General PCI */
 225 #define CONFIG_PCI                      /* include pci support          */
 226 #undef  CONFIG_PCI_PNP                  /* do (not) pci plug-and-play   */
 227 #define CONFIG_PCI_SCAN_SHOW            /* show pci devices on startup  */
 228 #define CONFIG_SYS_PCI_TARGBASE        0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE*/
 229
 230 /* Board-specific PCI */
 231 #define CONFIG_SYS_PCI_TARGET_INIT
 232 #define CONFIG_SYS_PCI_MASTER_INIT
 233
 234 #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8   /* AMCC */
 235 #define CONFIG_SYS_PCI_SUBSYS_ID       0xcafe   /* Whatever */
 236
 237 /*-----------------------------------------------------------------------
 238  * External Bus Controller (EBC) Setup
 239  *----------------------------------------------------------------------*/
 240 #define CONFIG_SYS_FLASH                CONFIG_SYS_FLASH_BASE
 241 #define CONFIG_SYS_CPLD         0x80000000
 242
 243 /* Memory Bank 0 (NOR-FLASH) initialization                                     */
 244 #define CONFIG_SYS_EBC_PB0AP            0x03017300
 245 #define CONFIG_SYS_EBC_PB0CR            (CONFIG_SYS_FLASH | 0xda000)
 246
 247 /* Memory Bank 2 (CPLD) initialization                                          */
 248 #define CONFIG_SYS_EBC_PB2AP            0x04814500
 249 #define CONFIG_SYS_EBC_PB2CR            (CONFIG_SYS_CPLD | 0x18000)
 250
 251 #define CONFIG_SYS_BCSR5_PCI66EN        0x80
 252
 253 #endif  /* __CONFIG_H */