include/configs/zeus.h

   1 /*
   2  * (C) Copyright 2007
   3  * Stefan Roese, DENX Software Engineering, sr@denx.de.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 /************************************************************************
  25  * zeus.h - configuration for Zeus board
  26  ***********************************************************************/
  27 #ifndef __CONFIG_H
  28 #define __CONFIG_H
  29
  30 /*-----------------------------------------------------------------------
  31  * High Level Configuration Options
  32  *----------------------------------------------------------------------*/
  33 #define CONFIG_ZEUS             1               /* Board is Zeus        */
  34 #define CONFIG_4xx              1               /* ... PPC4xx family    */
  35 #define CONFIG_405EP            1               /* Specifc 405EP support*/
  36
  37 #define CONFIG_SYS_CLK_FREQ     33000000 /* external frequency to pll   */
  38
  39 #define CONFIG_BOARD_EARLY_INIT_F 1             /* Call board_early_init_f */
  40 #define CONFIG_MISC_INIT_R      1               /* Call misc_init_r     */
  41
  42 #define PLLMR0_DEFAULT          PLLMR0_333_111_55_111
  43 #define PLLMR1_DEFAULT          PLLMR1_333_111_55_111
  44
  45 #define CONFIG_ENV_IS_IN_FLASH     1    /* use FLASH for environment vars       */
  46
  47 #define CONFIG_OVERWRITE_ETHADDR_ONCE   1
  48
  49 #define CONFIG_PPC4xx_EMAC
  50 #define CONFIG_MII              1       /* MII PHY management           */
  51 #define CONFIG_PHY_ADDR         0x01    /* PHY address                  */
  52 #define CONFIG_HAS_ETH1         1
  53 #define CONFIG_PHY1_ADDR        0x11    /* EMAC1 PHY address            */
  54 #define CONFIG_NET_MULTI        1
  55 #define CONFIG_SYS_RX_ETH_BUFFER        16      /* Number of ethernet rx buffers & descriptors */
  56 #define CONFIG_PHY_RESET        1
  57 #define CONFIG_PHY_RESET_DELAY  300     /* PHY RESET recovery delay     */
  58
  59 /*
  60  * BOOTP options
  61  */
  62 #define CONFIG_BOOTP_BOOTFILESIZE
  63 #define CONFIG_BOOTP_BOOTPATH
  64 #define CONFIG_BOOTP_GATEWAY
  65 #define CONFIG_BOOTP_HOSTNAME
  66
  67 /*
  68  * Command line configuration.
  69  */
  70 #include <config_cmd_default.h>
  71
  72 #define CONFIG_CMD_ASKENV
  73 #define CONFIG_CMD_CACHE
  74 #define CONFIG_CMD_DHCP
  75 #define CONFIG_CMD_DIAG
  76 #define CONFIG_CMD_EEPROM
  77 #define CONFIG_CMD_ELF
  78 #define CONFIG_CMD_I2C
  79 #define CONFIG_CMD_IRQ
  80 #define CONFIG_CMD_LOG
  81 #define CONFIG_CMD_MII
  82 #define CONFIG_CMD_NET
  83 #define CONFIG_CMD_NFS
  84 #define CONFIG_CMD_PING
  85 #define CONFIG_CMD_REGINFO
  86
  87 /* POST support */
  88 #define CONFIG_POST             (CONFIG_SYS_POST_MEMORY   | \
  89                                  CONFIG_SYS_POST_CPU       | \
  90                                  CONFIG_SYS_POST_CACHE     | \
  91                                  CONFIG_SYS_POST_UART      | \
  92                                  CONFIG_SYS_POST_ETHER)
  93
  94 #define CONFIG_SYS_POST_ETHER_EXT_LOOPBACK      /* eth POST using ext loopack connector */
  95
  96 /* Define here the base-addresses of the UARTs to test in POST */
  97 #define CONFIG_SYS_POST_UART_TABLE      {UART0_BASE}
  98
  99 #define CONFIG_LOGBUFFER
 100 #define CONFIG_SYS_POST_CACHE_ADDR      0x00800000 /* free virtual address      */
 101
 102 #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
 103
 104 #undef CONFIG_WATCHDOG                  /* watchdog disabled            */
 105
 106 /*-----------------------------------------------------------------------
 107  * SDRAM
 108  *----------------------------------------------------------------------*/
 109 /*
 110  * SDRAM configuration (please see cpu/ppc/sdram.[ch])
 111  */
 112 #define CONFIG_SDRAM_BANK0      1       /* init onboard SDRAM bank 0 */
 113 #define CONFIG_SDRAM_BANK1      1       /* init onboard SDRAM bank 1 */
 114
 115 /* SDRAM timings used in datasheet */
 116 #define CONFIG_SYS_SDRAM_CL            3        /* CAS latency */
 117 #define CONFIG_SYS_SDRAM_tRP           20       /* PRECHARGE command period */
 118 #define CONFIG_SYS_SDRAM_tRC           66       /* ACTIVE-to-ACTIVE command period */
 119 #define CONFIG_SYS_SDRAM_tRCD          20       /* ACTIVE-to-READ delay */
 120 #define CONFIG_SYS_SDRAM_tRFC           66      /* Auto refresh period */
 121
 122 /*-----------------------------------------------------------------------
 123  * Serial Port
 124  *----------------------------------------------------------------------*/
 125 #undef  CONFIG_SYS_EXT_SERIAL_CLOCK                     /* external serial clock */
 126 #define CONFIG_SYS_BASE_BAUD            691200
 127 #define CONFIG_BAUDRATE         115200
 128 #define CONFIG_SERIAL_MULTI
 129
 130 /* The following table includes the supported baudrates */
 131 #define CONFIG_SYS_BAUDRATE_TABLE       \
 132         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
 133
 134 /*-----------------------------------------------------------------------
 135  * Miscellaneous configurable options
 136  *----------------------------------------------------------------------*/
 137 #define CONFIG_SYS_LONGHELP                     /* undef to save memory         */
 138 #define CONFIG_SYS_PROMPT               "=> "   /* Monitor Command Prompt       */
 139 #if defined(CONFIG_CMD_KGDB)
 140 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size      */
 141 #else
 142 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size      */
 143 #endif
 144 #define CONFIG_SYS_PBSIZE              (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
 145 #define CONFIG_SYS_MAXARGS              16      /* max number of command args   */
 146 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size  */
 147
 148 #define CONFIG_SYS_MEMTEST_START        0x0400000 /* memtest works on           */
 149 #define CONFIG_SYS_MEMTEST_END          0x0C00000 /* 4 ... 12 MB in DRAM        */
 150
 151 #define CONFIG_SYS_LOAD_ADDR            0x100000  /* default load address       */
 152 #define CONFIG_SYS_EXTBDINFO            1       /* To use extended board_into (bd_t) */
 153
 154 #define CONFIG_SYS_HZ                   1000    /* decrementer freq: 1 ms ticks */
 155
 156 #define CONFIG_LOADS_ECHO       1       /* echo on for serial download  */
 157 #define CONFIG_SYS_LOADS_BAUD_CHANGE    1       /* allow baudrate change        */
 158
 159 #define CONFIG_CMDLINE_EDITING  1       /* add command line history     */
 160 #define CONFIG_LOOPW            1       /* enable loopw command         */
 161 #define CONFIG_MX_CYCLIC        1       /* enable mdc/mwc commands      */
 162 #define CONFIG_ZERO_BOOTDELAY_CHECK     /* check for keypress on bootdelay==0 */
 163 #define CONFIG_VERSION_VARIABLE 1       /* include version env variable */
 164
 165 /*-----------------------------------------------------------------------
 166  * I2C
 167  *----------------------------------------------------------------------*/
 168 #define CONFIG_HARD_I2C         1               /* I2C with hardware support    */
 169 #undef  CONFIG_SOFT_I2C                         /* I2C bit-banged               */
 170 #define CONFIG_PPC4XX_I2C               /* use PPC4xx driver            */
 171 #define CONFIG_SYS_I2C_SPEED            400000          /* I2C speed and slave address  */
 172 #define CONFIG_SYS_I2C_SLAVE            0x7F
 173
 174 /* these are for the ST M24C02 2kbit serial i2c eeprom */
 175 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50            /* base address */
 176 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1               /* bytes of address */
 177 /* mask of address bits that overflow into the "EEPROM chip address"    */
 178 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW     0x07
 179
 180 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       3       /* 8 byte write page size */
 181 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* and takes up to 10 msec */
 182
 183 /*
 184  * The layout of the I2C EEPROM, used for bootstrap setup and for board-
 185  * specific values, like ethaddr... that can be restored via the sw-reset
 186  * button
 187  */
 188 #define FACTORY_RESET_I2C_EEPROM        0x50
 189 #define FACTORY_RESET_ENV_OFFS          0x80
 190 #define FACTORY_RESET_ENV_SIZE          0x80
 191
 192 /*-----------------------------------------------------------------------
 193  * Start addresses for the final memory configuration
 194  * (Set up by the startup code)
 195  * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
 196  */
 197 #define CONFIG_SYS_SDRAM_BASE           0x00000000
 198 #define CONFIG_SYS_FLASH_BASE           0xFF000000
 199 #define CONFIG_SYS_MONITOR_LEN          (256 * 1024)    /* Reserve 256 kB for Monitor   */
 200 #define CONFIG_SYS_MALLOC_LEN           (128 * 1024)    /* Reserve 128 kB for malloc()  */
 201 #define CONFIG_SYS_MONITOR_BASE (-CONFIG_SYS_MONITOR_LEN)
 202
 203 /*
 204  * For booting Linux, the board info and command line data
 205  * have to be in the first 8 MB of memory, since this is
 206  * the maximum mapped by the Linux kernel during initialization.
 207  */
 208 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)       /* Initial Memory map for Linux */
 209
 210 /*-----------------------------------------------------------------------
 211  * FLASH organization
 212  */
 213 #define CONFIG_SYS_FLASH_CFI                            /* The flash is CFI compatible  */
 214 #define CONFIG_FLASH_CFI_DRIVER                 /* Use common CFI driver        */
 215
 216 #define CONFIG_SYS_FLASH_BANKS_LIST     { CONFIG_SYS_FLASH_BASE }
 217
 218 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks           */
 219 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* max number of sectors on one chip    */
 220
 221 #define CONFIG_SYS_FLASH_ERASE_TOUT     120000  /* Timeout for Flash Erase (in ms)      */
 222 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Timeout for Flash Write (in ms)      */
 223
 224 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1     /* use buffered writes (20x faster)     */
 225 #define CONFIG_SYS_FLASH_PROTECTION     1       /* use hardware flash protection        */
 226
 227 #define CONFIG_SYS_FLASH_EMPTY_INFO             /* print 'E' for empty sector on flinfo */
 228 #define CONFIG_SYS_FLASH_QUIET_TEST     1       /* don't warn upon unknown flash        */
 229
 230 #ifdef CONFIG_ENV_IS_IN_FLASH
 231 #define CONFIG_ENV_SECT_SIZE    0x20000 /* size of one complete sector          */
 232 #define CONFIG_ENV_ADDR         ((-CONFIG_SYS_MONITOR_LEN)-CONFIG_ENV_SECT_SIZE)
 233 #define CONFIG_ENV_SIZE         0x2000  /* Total Size of Environment Sector     */
 234
 235 /* Address and size of Redundant Environment Sector     */
 236 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
 237 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
 238 #endif
 239
 240 /*-----------------------------------------------------------------------
 241  * Definitions for initial stack pointer and data area (in data cache)
 242  */
 243 /* use on chip memory (OCM) for temperary stack until sdram is tested */
 244 #define CONFIG_SYS_TEMP_STACK_OCM       1
 245
 246 /* On Chip Memory location */
 247 #define CONFIG_SYS_OCM_DATA_ADDR        0xF8000000
 248 #define CONFIG_SYS_OCM_DATA_SIZE        0x1000
 249 #define CONFIG_SYS_INIT_RAM_ADDR        CONFIG_SYS_OCM_DATA_ADDR /* inside of OCM               */
 250 #define CONFIG_SYS_INIT_RAM_END CONFIG_SYS_OCM_DATA_SIZE /* End of used area in RAM     */
 251
 252 #define CONFIG_SYS_GBL_DATA_SIZE        128  /* size in bytes reserved for initial data */
 253 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
 254 /* reserve some memory for POST and BOOT limit info */
 255 #define CONFIG_SYS_INIT_SP_OFFSET       (CONFIG_SYS_GBL_DATA_OFFSET - 16)
 256
 257 /* extra data in OCM */
 258 #define CONFIG_SYS_POST_MAGIC           \
 259                 (CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 8)
 260 #define CONFIG_SYS_POST_VAL             \
 261                 (CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 12)
 262
 263 /*-----------------------------------------------------------------------
 264  * External Bus Controller (EBC) Setup
 265  */
 266
 267 /* Memory Bank 0 (Flash 16M) initialization                                     */
 268 #define CONFIG_SYS_EBC_PB0AP            0x05815600
 269 #define CONFIG_SYS_EBC_PB0CR            0xFF09A000  /* BAS=0xFF0,BS=16MB,BU=R/W,BW=16bit  */
 270
 271 /*-----------------------------------------------------------------------
 272  * Definitions for GPIO setup (PPC405EP specific)
 273  *
 274  * GPIO0[0]     - External Bus Controller BLAST output
 275  * GPIO0[1-9]   - Instruction trace outputs
 276  * GPIO0[10-13] - External Bus Controller CS_1 - CS_4 outputs
 277  * GPIO0[14-16] - External Bus Controller ABUS3-ABUS5 outputs
 278  * GPIO0[17-23] - External Interrupts IRQ0 - IRQ6 inputs
 279  * GPIO0[24-27] - UART0 control signal inputs/outputs
 280  * GPIO0[28-29] - UART1 data signal input/output
 281  * GPIO0[30-31] - EMAC0 and EMAC1 reject packet inputs
 282  */
 283 #define CONFIG_SYS_GPIO0_OSRH           0x15555550      /* Chip selects */
 284 #define CONFIG_SYS_GPIO0_OSRL           0x00000110      /* UART_DTR-pin 27 alt out */
 285 #define CONFIG_SYS_GPIO0_ISR1H          0x10000041      /* Pin 2, 12 is input */
 286 #define CONFIG_SYS_GPIO0_ISR1L          0x15505440      /* OUT: LEDs 22/23; IN: pin12,2, NVALID# */
 287 #define CONFIG_SYS_GPIO0_TSRH           0x00000000
 288 #define CONFIG_SYS_GPIO0_TSRL           0x00000000
 289 #define CONFIG_SYS_GPIO0_TCR            0xBFF68317      /* 3-state OUT: 22/23/29; 12,2 is not 3-state */
 290 #define CONFIG_SYS_GPIO0_ODR            0x00000000
 291
 292 #define CONFIG_SYS_GPIO_SW_RESET        1
 293 #define CONFIG_SYS_GPIO_ZEUS_PE 12
 294 #define CONFIG_SYS_GPIO_LED_RED 22
 295 #define CONFIG_SYS_GPIO_LED_GREEN       23
 296
 297 /* Time in milli-seconds */
 298 #define CONFIG_SYS_TIME_POST            5000
 299 #define CONFIG_SYS_TIME_FACTORY_RESET   10000
 300
 301 /*
 302  * Internal Definitions
 303  *
 304  * Boot Flags
 305  */
 306 #define BOOTFLAG_COLD           0x01            /* Normal Power-On: Boot from FLASH     */
 307 #define BOOTFLAG_WARM           0x02            /* Software reboot                      */
 308
 309 #if defined(CONFIG_CMD_KGDB)
 310 #define CONFIG_KGDB_BAUDRATE    230400          /* speed to run kgdb serial port */
 311 #define CONFIG_KGDB_SER_INDEX   2               /* which serial port to use */
 312 #endif
 313
 314 /*
 315  * Pass open firmware flat tree
 316  */
 317 #define CONFIG_OF_LIBFDT
 318 #define CONFIG_OF_BOARD_SETUP
 319
 320 /* ENVIRONMENT VARS */
 321
 322 #define CONFIG_PREBOOT          "echo;echo Welcome to Bulletendpoints board v1.1;echo"
 323 #define CONFIG_IPADDR           192.168.1.10
 324 #define CONFIG_SERVERIP         192.168.1.100
 325 #define CONFIG_GATEWAYIP        192.168.1.100
 326 #define CONFIG_ETHADDR          50:00:00:00:06:00
 327 #define CONFIG_ETH1ADDR         50:00:00:00:06:01
 328 #if 0
 329 #define CONFIG_BOOTDELAY        -1      /* autoboot disabled        */
 330 #else
 331 #define CONFIG_BOOTDELAY        3       /* autoboot after 5 seconds */
 332 #endif
 333
 334 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 335         "logversion=2\0"                                                \
 336         "hostname=zeus\0"                                               \
 337         "netdev=eth0\0"                                                 \
 338         "ethact=ppc_4xx_eth0\0"                                         \
 339         "netmask=255.255.255.0\0"                                       \
 340         "ramdisk_size=50000\0"                                          \
 341         "nfsargs=setenv bootargs root=/dev/nfs rw"                      \
 342                 " nfsroot=${serverip}:${rootpath}\0"                    \
 343         "ramargs=setenv bootargs root=/dev/ram rw"                      \
 344                 " ramdisk_size=${ramdisk_size}\0"                       \
 345         "addip=setenv bootargs ${bootargs} "                            \
 346                 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 347                 ":${hostname}:${netdev}:off panic=1\0"                  \
 348         "addtty=setenv bootargs ${bootargs} console=ttyS0,"             \
 349                 "${baudrate}\0"                                         \
 350         "net_nfs=tftp ${kernel_mem_addr} ${file_kernel};"               \
 351                 "run nfsargs addip addtty;bootm\0"                      \
 352         "net_ram=tftp ${kernel_mem_addr} ${file_kernel};"               \
 353                 "tftp ${ramdisk_mem_addr} ${file_fs};"                  \
 354                 "run ramargs addip addtty;"                             \
 355                 "bootm ${kernel_mem_addr} ${ramdisk_mem_addr}\0"        \
 356         "rootpath=/target_fs/zeus\0"                                    \
 357         "kernel_fl_addr=ff000000\0"                                     \
 358         "kernel_mem_addr=200000\0"                                      \
 359         "ramdisk_fl_addr=ff300000\0"                                    \
 360         "ramdisk_mem_addr=4000000\0"                                    \
 361         "uboot_fl_addr=fffc0000\0"                                      \
 362         "uboot_mem_addr=100000\0"                                       \
 363         "file_uboot=/zeus/u-boot.bin\0"                                 \
 364         "tftp_uboot=tftp 100000 ${file_uboot}\0"                        \
 365         "update_uboot=protect off fffc0000 ffffffff;"                   \
 366                 "era fffc0000 ffffffff;cp.b 100000 fffc0000 40000;"     \
 367                 "protect on fffc0000 ffffffff\0"                        \
 368         "upd_uboot=run tftp_uboot;run update_uboot\0"                   \
 369         "file_kernel=/zeus/uImage_ba\0"                                 \
 370         "tftp_kernel=tftp 100000 ${file_kernel}\0"                      \
 371         "update_kernel=protect off ff000000 ff17ffff;"                  \
 372                 "era ff000000 ff17ffff;cp.b 100000 ff000000 180000\0"   \
 373         "upd_kernel=run tftp_kernel;run update_kernel\0"                \
 374         "file_fs=/zeus/rootfs_ba.img\0"                                 \
 375         "tftp_fs=tftp 100000 ${file_fs}\0"                              \
 376         "update_fs=protect off ff300000 ff87ffff;era ff300000 ff87ffff;"\
 377                 "cp.b 100000 ff300000 580000\0"                         \
 378         "upd_fs=run tftp_fs;run update_fs\0"                            \
 379         "bootcmd=chkreset;run ramargs addip addtty addmisc;"            \
 380                 "bootm ${kernel_fl_addr} ${ramdisk_fl_addr}\0"          \
 381         ""
 382
 383 #endif  /* __CONFIG_H */