include/configs/zmx25.h

   1 /*
   2  * (c) 2011 Graf-Syteco, Matthias Weisser
   3  * <weisserm@arcor.de>
   4  *
   5  * Configuation settings for the zmx25 board
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #ifndef __CONFIG_H
  11 #define __CONFIG_H
  12
  13 #include <asm/arch/imx-regs.h>
  14
  15 #define CONFIG_SYS_TIMER_RATE           32768
  16 #define CONFIG_SYS_TIMER_COUNTER        \
  17         (&((struct gpt_regs *)IMX_GPT1_BASE)->counter)
  18
  19 #define CONFIG_MACH_TYPE        MACH_TYPE_ZMX25
  20 /*
  21  * Environment settings
  22  */
  23 #define CONFIG_EXTRA_ENV_SETTINGS \
  24         "gs_fast_boot=setenv bootdelay 5\0" \
  25         "gs_slow_boot=setenv bootdelay 10\0" \
  26         "bootcmd=dcache off; mw.l 0x81000000 0 1024; usb start;" \
  27                 "fatls usb 0; fatload usb 0 0x81000000 zmx25-init.bin;" \
  28                 "bootm 0x81000000; bootelf 0x81000000\0"
  29
  30 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs      */
  31 #define CONFIG_SETUP_MEMORY_TAGS
  32 #define CONFIG_INITRD_TAG
  33
  34 /*
  35  * Hardware drivers
  36  */
  37
  38 /*
  39  * Serial
  40  */
  41 #define CONFIG_MXC_UART
  42 #define CONFIG_MXC_UART_BASE    UART2_BASE
  43 #define CONFIG_CONS_INDEX       1       /* use UART2 for console */
  44
  45 /*
  46  * Ethernet
  47  */
  48 #define CONFIG_FEC_MXC
  49 #define CONFIG_FEC_MXC_PHYADDR          0x00
  50 #define CONFIG_MII
  51
  52 /*
  53  * BOOTP options
  54  */
  55 #define CONFIG_BOOTP_BOOTFILESIZE
  56 #define CONFIG_BOOTP_BOOTPATH
  57 #define CONFIG_BOOTP_GATEWAY
  58 #define CONFIG_BOOTP_HOSTNAME
  59
  60 /*
  61  * Command line configuration.
  62  */
  63
  64 /*
  65  * Additional command
  66  */
  67
  68 /*
  69  * USB
  70  */
  71 #ifdef CONFIG_CMD_USB
  72 #define CONFIG_USB_EHCI_MXC
  73 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
  74 #define CONFIG_MXC_USB_PORT     1
  75 #define CONFIG_MXC_USB_PORTSC   MXC_EHCI_MODE_SERIAL
  76 #define CONFIG_MXC_USB_FLAGS    (MXC_EHCI_INTERNAL_PHY | MXC_EHCI_IPPUE_DOWN)
  77 #define CONFIG_EHCI_IS_TDI
  78 #endif /* CONFIG_CMD_USB */
  79
  80 /* SDRAM */
  81 #define CONFIG_NR_DRAM_BANKS    1
  82 #define PHYS_SDRAM              0x80000000      /* start address of LPDDRRAM */
  83 #define PHYS_SDRAM_SIZE         0x04000000      /* 64 megs */
  84
  85 #define CONFIG_SYS_SDRAM_BASE   PHYS_SDRAM
  86 #define CONFIG_SYS_INIT_SP_ADDR 0x78020000      /* end of internal SRAM */
  87
  88 /*
  89  * FLASH and environment organization
  90  */
  91 #define CONFIG_SYS_FLASH_BASE           0xA0000000
  92 #define CONFIG_SYS_MAX_FLASH_BANKS      1
  93 #define CONFIG_SYS_MAX_FLASH_SECT       256
  94
  95 #define CONFIG_ENV_ADDR                 (CONFIG_SYS_FLASH_BASE + 0x00040000)
  96 #define CONFIG_ENV_SECT_SIZE            (128 * 1024)
  97 #define CONFIG_ENV_SIZE                 (128 * 1024)
  98
  99 /*
 100  * CFI FLASH driver setup
 101  */
 102 #define CONFIG_SYS_FLASH_CFI
 103 #define CONFIG_FLASH_CFI_DRIVER
 104 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       /* ~10x faster */
 105
 106 #define CONFIG_SYS_LOAD_ADDR            CONFIG_SYS_SDRAM_BASE
 107
 108 #define CONFIG_SYS_MEMTEST_START        (PHYS_SDRAM + (512*1024))
 109 #define CONFIG_SYS_MEMTEST_END          (PHYS_SDRAM + PHYS_SDRAM_SIZE)
 110
 111 #define CONFIG_SYS_LONGHELP
 112 #define CONFIG_CMDLINE_EDITING
 113
 114 #define CONFIG_PREBOOT  ""
 115
 116
 117 /*
 118  * Size of malloc() pool
 119  */
 120 #define CONFIG_SYS_MALLOC_LEN           (0x400000 - 0x8000)
 121
 122 #endif  /* __CONFIG_H */