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arm: zynq: Fix SPL SD boot mode
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1 /*
2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
3 * (C) Copyright 2013 Xilinx, Inc.
4 *
5 * Common configuration options for all Zynq boards.
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef __CONFIG_ZYNQ_COMMON_H
11 #define __CONFIG_ZYNQ_COMMON_H
12
13 /* CPU clock */
14 #ifndef CONFIG_CPU_FREQ_HZ
15 # define CONFIG_CPU_FREQ_HZ 800000000
16 #endif
17
18 /* Cache options */
19 #define CONFIG_SYS_L2CACHE_OFF
20 #ifndef CONFIG_SYS_L2CACHE_OFF
21 # define CONFIG_SYS_L2_PL310
22 # define CONFIG_SYS_PL310_BASE 0xf8f02000
23 #endif
24
25 #define ZYNQ_SCUTIMER_BASEADDR 0xF8F00600
26 #define CONFIG_SYS_TIMERBASE ZYNQ_SCUTIMER_BASEADDR
27 #define CONFIG_SYS_TIMER_COUNTS_DOWN
28 #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4)
29
30 /* Serial drivers */
31 /* The following table includes the supported baudrates */
32 #define CONFIG_SYS_BAUDRATE_TABLE \
33 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
34
35 #define CONFIG_ARM_DCC
36
37 /* Ethernet driver */
38 #if defined(CONFIG_ZYNQ_GEM)
39 # define CONFIG_MII
40 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
41 # define CONFIG_PHY_MARVELL
42 # define CONFIG_PHY_REALTEK
43 # define CONFIG_PHY_XILINX
44 # define CONFIG_BOOTP_BOOTPATH
45 # define CONFIG_BOOTP_GATEWAY
46 # define CONFIG_BOOTP_HOSTNAME
47 # define CONFIG_BOOTP_MAY_FAIL
48 #endif
49
50 /* SPI */
51 #ifdef CONFIG_ZYNQ_SPI
52 #endif
53
54 /* QSPI */
55 #ifdef CONFIG_ZYNQ_QSPI
56 # define CONFIG_SF_DEFAULT_SPEED 30000000
57 # define CONFIG_SPI_FLASH_ISSI
58 #endif
59
60 /* NOR */
61 #ifdef CONFIG_MTD_NOR_FLASH
62 # define CONFIG_SYS_FLASH_BASE 0xE2000000
63 # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024)
64 # define CONFIG_SYS_MAX_FLASH_BANKS 1
65 # define CONFIG_SYS_MAX_FLASH_SECT 512
66 # define CONFIG_SYS_FLASH_ERASE_TOUT 1000
67 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000
68 # define CONFIG_FLASH_SHOW_PROGRESS 10
69 # define CONFIG_SYS_FLASH_CFI
70 # undef CONFIG_SYS_FLASH_EMPTY_INFO
71 # define CONFIG_FLASH_CFI_DRIVER
72 # undef CONFIG_SYS_FLASH_PROTECTION
73 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
74 #endif
75
76 #ifdef CONFIG_NAND_ZYNQ
77 #define CONFIG_SYS_MAX_NAND_DEVICE 1
78 #define CONFIG_SYS_NAND_ONFI_DETECTION
79 #define CONFIG_MTD_DEVICE
80 #endif
81
82 /* MMC */
83 #if defined(CONFIG_MMC_SDHCI_ZYNQ)
84 # define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000
85 #endif
86
87 #ifdef CONFIG_USB_EHCI_ZYNQ
88 # define CONFIG_EHCI_IS_TDI
89
90 # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000
91 # define DFU_DEFAULT_POLL_TIMEOUT 300
92 # define CONFIG_USB_CABLE_CHECK
93 # define CONFIG_THOR_RESET_OFF
94 # define CONFIG_USB_FUNCTION_THOR
95 # define DFU_ALT_INFO_RAM \
96 "dfu_ram_info=" \
97 "set dfu_alt_info " \
98 "${kernel_image} ram 0x3000000 0x500000\\\\;" \
99 "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
100 "${ramdisk_image} ram 0x2000000 0x600000\0" \
101 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
102 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
103
104 # if defined(CONFIG_MMC_SDHCI_ZYNQ)
105 # define DFU_ALT_INFO_MMC \
106 "dfu_mmc_info=" \
107 "set dfu_alt_info " \
108 "${kernel_image} fat 0 1\\\\;" \
109 "${devicetree_image} fat 0 1\\\\;" \
110 "${ramdisk_image} fat 0 1\0" \
111 "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
112 "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
113
114 # define DFU_ALT_INFO \
115 DFU_ALT_INFO_RAM \
116 DFU_ALT_INFO_MMC
117 # else
118 # define DFU_ALT_INFO \
119 DFU_ALT_INFO_RAM
120 # endif
121 #endif
122
123 #if !defined(DFU_ALT_INFO)
124 # define DFU_ALT_INFO
125 #endif
126
127 #if defined(CONFIG_MMC_SDHCI_ZYNQ) || defined(CONFIG_ZYNQ_USB)
128 # define CONFIG_SUPPORT_VFAT
129 #endif
130
131 #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
132 #define CONFIG_SYS_I2C_ZYNQ
133 #endif
134
135 /* I2C */
136 #if defined(CONFIG_SYS_I2C_ZYNQ)
137 # define CONFIG_SYS_I2C
138 # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
139 # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
140 #endif
141
142 /* EEPROM */
143 #ifdef CONFIG_ZYNQ_EEPROM
144 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
145 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
146 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
147 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
148 # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */
149 #endif
150
151 /* Total Size of Environment Sector */
152 #define CONFIG_ENV_SIZE (128 << 10)
153
154 /* Allow to overwrite serial and ethaddr */
155 #define CONFIG_ENV_OVERWRITE
156
157 /* Environment */
158 #ifndef CONFIG_ENV_IS_NOWHERE
159 # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
160 # define CONFIG_ENV_OFFSET 0xE0000
161 #endif
162
163 /* enable preboot to be loaded before CONFIG_BOOTDELAY */
164 #define CONFIG_PREBOOT
165
166 /* Boot configuration */
167 #define CONFIG_BOOTCOMMAND "run $modeboot || run distro_bootcmd"
168 #define CONFIG_SYS_LOAD_ADDR 0 /* default? */
169
170 /* Distro boot enablement */
171
172 #ifdef CONFIG_SPL_BUILD
173 #define BOOTENV
174 #else
175 #include <config_distro_defaults.h>
176
177 #ifdef CONFIG_CMD_MMC
178 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
179 #else
180 #define BOOT_TARGET_DEVICES_MMC(func)
181 #endif
182
183 #ifdef CONFIG_CMD_USB
184 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
185 #else
186 #define BOOT_TARGET_DEVICES_USB(func)
187 #endif
188
189 #if defined(CONFIG_CMD_PXE)
190 #define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
191 #else
192 #define BOOT_TARGET_DEVICES_PXE(func)
193 #endif
194
195 #if defined(CONFIG_CMD_DHCP)
196 #define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
197 #else
198 #define BOOT_TARGET_DEVICES_DHCP(func)
199 #endif
200
201 #define BOOT_TARGET_DEVICES(func) \
202 BOOT_TARGET_DEVICES_MMC(func) \
203 BOOT_TARGET_DEVICES_USB(func) \
204 BOOT_TARGET_DEVICES_PXE(func) \
205 BOOT_TARGET_DEVICES_DHCP(func)
206
207 #include <config_distro_bootcmd.h>
208 #endif /* CONFIG_SPL_BUILD */
209
210 /* Default environment */
211 #ifndef CONFIG_EXTRA_ENV_SETTINGS
212 #define CONFIG_EXTRA_ENV_SETTINGS \
213 "fit_image=fit.itb\0" \
214 "load_addr=0x2000000\0" \
215 "fit_size=0x800000\0" \
216 "flash_off=0x100000\0" \
217 "nor_flash_off=0xE2100000\0" \
218 "fdt_high=0x20000000\0" \
219 "initrd_high=0x20000000\0" \
220 "loadbootenv_addr=0x2000000\0" \
221 "fdt_addr_r=0x1f00000\0" \
222 "pxefile_addr_r=0x2000000\0" \
223 "kernel_addr_r=0x2000000\0" \
224 "scriptaddr=0x3000000\0" \
225 "ramdisk_addr_r=0x3100000\0" \
226 "bootenv=uEnv.txt\0" \
227 "bootenv_dev=mmc\0" \
228 "loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
229 "importbootenv=echo Importing environment from ${bootenv_dev} ...; " \
230 "env import -t ${loadbootenv_addr} $filesize\0" \
231 "bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \
232 "setbootenv=if env run bootenv_existence_test; then " \
233 "if env run loadbootenv; then " \
234 "env run importbootenv; " \
235 "fi; " \
236 "fi; \0" \
237 "sd_loadbootenv=set bootenv_dev mmc && " \
238 "run setbootenv \0" \
239 "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv \0" \
240 "preboot=if test $modeboot = sdboot; then " \
241 "run sd_loadbootenv; " \
242 "echo Checking if uenvcmd is set ...; " \
243 "if test -n $uenvcmd; then " \
244 "echo Running uenvcmd ...; " \
245 "run uenvcmd; " \
246 "fi; " \
247 "fi; \0" \
248 "norboot=echo Copying FIT from NOR flash to RAM... && " \
249 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
250 "bootm ${load_addr}\0" \
251 "sdboot=echo Copying FIT from SD to RAM... && " \
252 "load mmc 0 ${load_addr} ${fit_image} && " \
253 "bootm ${load_addr}\0" \
254 "jtagboot=echo TFTPing FIT to RAM... && " \
255 "tftpboot ${load_addr} ${fit_image} && " \
256 "bootm ${load_addr}\0" \
257 "usbboot=if usb start; then " \
258 "echo Copying FIT from USB to RAM... && " \
259 "load usb 0 ${load_addr} ${fit_image} && " \
260 "bootm ${load_addr}; fi\0" \
261 DFU_ALT_INFO \
262 BOOTENV
263 #endif
264
265 /* Miscellaneous configurable options */
266
267 #define CONFIG_CMDLINE_EDITING
268 #define CONFIG_AUTO_COMPLETE
269 #define CONFIG_SYS_LONGHELP
270 #define CONFIG_CLOCKS
271 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
272
273 #ifndef CONFIG_NR_DRAM_BANKS
274 # define CONFIG_NR_DRAM_BANKS 1
275 #endif
276
277 #define CONFIG_SYS_MEMTEST_START 0
278 #define CONFIG_SYS_MEMTEST_END 0x1000
279
280 #define CONFIG_SYS_MALLOC_LEN 0x1400000
281
282 #define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
283 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000
284 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
285 CONFIG_SYS_INIT_RAM_SIZE - \
286 GENERATED_GBL_DATA_SIZE)
287
288 /* Enable the PL to be downloaded */
289 #define CONFIG_FPGA_ZYNQPL
290
291 /* FIT support */
292 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
293
294 /* Extend size of kernel image for uncompression */
295 #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
296
297 /* Boot FreeBSD/vxWorks from an ELF image */
298 #define CONFIG_SYS_MMC_MAX_DEVICE 1
299
300 #define CONFIG_SYS_LDSCRIPT "arch/arm/mach-zynq/u-boot.lds"
301
302 /* Commands */
303
304 /* SPL part */
305 #define CONFIG_SPL_FRAMEWORK
306
307 /* MMC support */
308 #ifdef CONFIG_MMC_SDHCI_ZYNQ
309 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
310 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
311 #endif
312
313 /* Disable dcache for SPL just for sure */
314 #ifdef CONFIG_SPL_BUILD
315 #define CONFIG_SYS_DCACHE_OFF
316 #endif
317
318 /* Address in RAM where the parameters must be copied by SPL. */
319 #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000
320
321 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb"
322 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
323
324 /* Not using MMC raw mode - just for compilation purpose */
325 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0
326 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0
327 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
328
329 /* qspi mode is working fine */
330 #ifdef CONFIG_ZYNQ_QSPI
331 #define CONFIG_SPL_SPI_LOAD
332 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
333 #define CONFIG_SYS_SPI_ARGS_OFFS 0x200000
334 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
335 #define CONFIG_SYS_SPI_KERNEL_OFFS (CONFIG_SYS_SPI_ARGS_OFFS + \
336 CONFIG_SYS_SPI_ARGS_SIZE)
337 #endif
338
339 /* for booting directly linux */
340
341 /* SP location before relocation, must use scratch RAM */
342 #define CONFIG_SPL_TEXT_BASE 0x0
343
344 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
345 #define CONFIG_SPL_MAX_SIZE 0x30000
346
347 /* On the top of OCM space */
348 #define CONFIG_SYS_SPL_MALLOC_START CONFIG_SPL_STACK_R_ADDR
349 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000000
350
351 /*
352 * SPL stack position - and stack goes down
353 * 0xfffffe00 is used for putting wfi loop.
354 * Set it up as limit for now.
355 */
356 #define CONFIG_SPL_STACK 0xfffffe00
357
358 /* BSS setup */
359 #define CONFIG_SPL_BSS_START_ADDR 0x100000
360 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000
361
362 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
363
364 #endif /* __CONFIG_ZYNQ_COMMON_H */