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1 /*
2 * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
3 * (C) Copyright 2013 Xilinx, Inc.
4 *
5 * Common configuration options for all Zynq boards.
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef __CONFIG_ZYNQ_COMMON_H
11 #define __CONFIG_ZYNQ_COMMON_H
12
13 /* CPU clock */
14 #ifndef CONFIG_CPU_FREQ_HZ
15 # define CONFIG_CPU_FREQ_HZ 800000000
16 #endif
17
18 /* Cache options */
19 #define CONFIG_CMD_CACHE
20 #define CONFIG_SYS_CACHELINE_SIZE 32
21
22 #define CONFIG_SYS_L2CACHE_OFF
23 #ifndef CONFIG_SYS_L2CACHE_OFF
24 # define CONFIG_SYS_L2_PL310
25 # define CONFIG_SYS_PL310_BASE 0xf8f02000
26 #endif
27
28 /* Serial drivers */
29 #define CONFIG_BAUDRATE 115200
30 /* The following table includes the supported baudrates */
31 #define CONFIG_SYS_BAUDRATE_TABLE \
32 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
33
34 /* DCC driver */
35 #if defined(CONFIG_ZYNQ_DCC)
36 # define CONFIG_ARM_DCC
37 # define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */
38 #else
39 # define CONFIG_ZYNQ_SERIAL
40 #endif
41
42 /* Ethernet driver */
43 #if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1)
44 # define CONFIG_NET_MULTI
45 # define CONFIG_ZYNQ_GEM
46 # define CONFIG_MII
47 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
48 # define CONFIG_PHYLIB
49 # define CONFIG_PHY_MARVELL
50 # define CONFIG_BOOTP_SERVERIP
51 # define CONFIG_BOOTP_BOOTPATH
52 # define CONFIG_BOOTP_GATEWAY
53 # define CONFIG_BOOTP_HOSTNAME
54 # define CONFIG_BOOTP_MAY_FAIL
55 # if !defined(CONFIG_ZYNQ_GEM_EMIO0)
56 # define CONFIG_ZYNQ_GEM_EMIO0 0
57 # endif
58 # if !defined(CONFIG_ZYNQ_GEM_EMIO1)
59 # define CONFIG_ZYNQ_GEM_EMIO1 0
60 # endif
61 #endif
62
63 /* SPI */
64 #ifdef CONFIG_ZYNQ_SPI
65 # define CONFIG_SPI_FLASH
66 # define CONFIG_SPI_FLASH_SST
67 # define CONFIG_CMD_SF
68 #endif
69
70 /* NOR */
71 #ifndef CONFIG_SYS_NO_FLASH
72 # define CONFIG_SYS_FLASH_BASE 0xE2000000
73 # define CONFIG_SYS_FLASH_SIZE (16 * 1024 * 1024)
74 # define CONFIG_SYS_MAX_FLASH_BANKS 1
75 # define CONFIG_SYS_MAX_FLASH_SECT 512
76 # define CONFIG_SYS_FLASH_ERASE_TOUT 1000
77 # define CONFIG_SYS_FLASH_WRITE_TOUT 5000
78 # define CONFIG_FLASH_SHOW_PROGRESS 10
79 # define CONFIG_SYS_FLASH_CFI
80 # undef CONFIG_SYS_FLASH_EMPTY_INFO
81 # define CONFIG_FLASH_CFI_DRIVER
82 # undef CONFIG_SYS_FLASH_PROTECTION
83 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
84 #endif
85
86 /* MMC */
87 #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
88 # define CONFIG_MMC
89 # define CONFIG_GENERIC_MMC
90 # define CONFIG_SDHCI
91 # define CONFIG_ZYNQ_SDHCI
92 # define CONFIG_CMD_MMC
93 #endif
94
95 #ifdef CONFIG_ZYNQ_USB
96 # define CONFIG_USB_EHCI
97 # define CONFIG_CMD_USB
98 # define CONFIG_USB_STORAGE
99 # define CONFIG_USB_EHCI_ZYNQ
100 # define CONFIG_USB_ULPI_VIEWPORT
101 # define CONFIG_USB_ULPI
102 # define CONFIG_EHCI_IS_TDI
103 # define CONFIG_USB_MAX_CONTROLLER_COUNT 2
104
105 # define CONFIG_CI_UDC /* ChipIdea CI13xxx UDC */
106 # define CONFIG_USB_GADGET
107 # define CONFIG_USB_GADGET_DUALSPEED
108 # define CONFIG_USBDOWNLOAD_GADGET
109 # define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x600000
110 # define DFU_DEFAULT_POLL_TIMEOUT 300
111 # define CONFIG_DFU_FUNCTION
112 # define CONFIG_DFU_RAM
113 # define CONFIG_USB_GADGET_VBUS_DRAW 2
114 # define CONFIG_G_DNL_VENDOR_NUM 0x03FD
115 # define CONFIG_G_DNL_PRODUCT_NUM 0x0300
116 # define CONFIG_G_DNL_MANUFACTURER "Xilinx"
117 # define CONFIG_USB_GADGET
118 # define CONFIG_USB_CABLE_CHECK
119 # define CONFIG_CMD_DFU
120 # define CONFIG_CMD_THOR_DOWNLOAD
121 # define CONFIG_THOR_FUNCTION
122 # define DFU_ALT_INFO_RAM \
123 "dfu_ram_info=" \
124 "set dfu_alt_info " \
125 "${kernel_image} ram 0x3000000 0x500000\\\\;" \
126 "${devicetree_image} ram 0x2A00000 0x20000\\\\;" \
127 "${ramdisk_image} ram 0x2000000 0x600000\0" \
128 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
129 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
130
131 # if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
132 # define CONFIG_DFU_MMC
133 # define DFU_ALT_INFO_MMC \
134 "dfu_mmc_info=" \
135 "set dfu_alt_info " \
136 "${kernel_image} fat 0 1\\\\;" \
137 "${devicetree_image} fat 0 1\\\\;" \
138 "${ramdisk_image} fat 0 1\0" \
139 "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
140 "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"
141
142 # define DFU_ALT_INFO \
143 DFU_ALT_INFO_RAM \
144 DFU_ALT_INFO_MMC
145 # else
146 # define DFU_ALT_INFO \
147 DFU_ALT_INFO_RAM
148 # endif
149 #endif
150
151 #if !defined(DFU_ALT_INFO)
152 # define DFU_ALT_INFO
153 #endif
154
155 #if defined(CONFIG_ZYNQ_SDHCI) || defined(CONFIG_ZYNQ_USB)
156 # define CONFIG_SUPPORT_VFAT
157 # define CONFIG_CMD_FAT
158 # define CONFIG_CMD_EXT2
159 # define CONFIG_FAT_WRITE
160 # define CONFIG_DOS_PARTITION
161 # define CONFIG_CMD_EXT4
162 # define CONFIG_CMD_EXT4_WRITE
163 # define CONFIG_CMD_FS_GENERIC
164 #endif
165
166 #define CONFIG_SYS_I2C_ZYNQ
167 /* I2C */
168 #if defined(CONFIG_SYS_I2C_ZYNQ)
169 # define CONFIG_CMD_I2C
170 # define CONFIG_SYS_I2C
171 # define CONFIG_SYS_I2C_ZYNQ_SPEED 100000
172 # define CONFIG_SYS_I2C_ZYNQ_SLAVE 0
173 #endif
174
175 /* EEPROM */
176 #ifdef CONFIG_ZYNQ_EEPROM
177 # define CONFIG_CMD_EEPROM
178 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
179 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
180 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4
181 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5
182 # define CONFIG_SYS_EEPROM_SIZE 1024 /* Bytes */
183 #endif
184
185 /* Total Size of Environment Sector */
186 #define CONFIG_ENV_SIZE (128 << 10)
187
188 /* Allow to overwrite serial and ethaddr */
189 #define CONFIG_ENV_OVERWRITE
190
191 /* Environment */
192 #ifndef CONFIG_ENV_IS_NOWHERE
193 # ifndef CONFIG_SYS_NO_FLASH
194 # define CONFIG_ENV_IS_IN_FLASH
195 # elif defined(CONFIG_SYS_NO_FLASH)
196 # define CONFIG_ENV_IS_NOWHERE
197 # endif
198
199 # define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
200 # define CONFIG_ENV_OFFSET 0xE0000
201 # define CONFIG_CMD_SAVEENV
202 #endif
203
204 /* Default environment */
205 #define CONFIG_EXTRA_ENV_SETTINGS \
206 "fit_image=fit.itb\0" \
207 "load_addr=0x2000000\0" \
208 "fit_size=0x800000\0" \
209 "flash_off=0x100000\0" \
210 "nor_flash_off=0xE2100000\0" \
211 "fdt_high=0x20000000\0" \
212 "initrd_high=0x20000000\0" \
213 "norboot=echo Copying FIT from NOR flash to RAM... && " \
214 "cp.b ${nor_flash_off} ${load_addr} ${fit_size} && " \
215 "bootm ${load_addr}\0" \
216 "sdboot=echo Copying FIT from SD to RAM... && " \
217 "load mmc 0 ${load_addr} ${fit_image} && " \
218 "bootm ${load_addr}\0" \
219 "jtagboot=echo TFTPing FIT to RAM... && " \
220 "tftpboot ${load_addr} ${fit_image} && " \
221 "bootm ${load_addr}\0" \
222 "usbboot=if usb start; then " \
223 "echo Copying FIT from USB to RAM... && " \
224 "load usb 0 ${load_addr} ${fit_image} && " \
225 "bootm ${load_addr}\0" \
226 "fi\0" \
227 DFU_ALT_INFO
228
229 #define CONFIG_BOOTCOMMAND "run $modeboot"
230 #define CONFIG_BOOTDELAY 3 /* -1 to Disable autoboot */
231 #define CONFIG_SYS_LOAD_ADDR 0 /* default? */
232
233 /* Miscellaneous configurable options */
234 #define CONFIG_SYS_PROMPT "zynq-uboot> "
235 #define CONFIG_SYS_HUSH_PARSER
236
237 #define CONFIG_CMDLINE_EDITING
238 #define CONFIG_AUTO_COMPLETE
239 #define CONFIG_BOARD_LATE_INIT
240 #define CONFIG_DISPLAY_BOARDINFO
241 #define CONFIG_SYS_LONGHELP
242 #define CONFIG_CLOCKS
243 #define CONFIG_CMD_CLK
244 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
245 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
246 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
247 sizeof(CONFIG_SYS_PROMPT) + 16)
248
249 /* Physical Memory map */
250 #define CONFIG_SYS_TEXT_BASE 0x4000000
251
252 #define CONFIG_NR_DRAM_BANKS 1
253 #define CONFIG_SYS_SDRAM_BASE 0
254
255 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
256 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x1000)
257
258 #define CONFIG_SYS_MALLOC_LEN 0xC00000
259 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SDRAM_BASE
260 #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
261 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
262 CONFIG_SYS_INIT_RAM_SIZE - \
263 GENERATED_GBL_DATA_SIZE)
264
265 /* Enable the PL to be downloaded */
266 #define CONFIG_FPGA
267 #define CONFIG_FPGA_XILINX
268 #define CONFIG_FPGA_ZYNQPL
269 #define CONFIG_CMD_FPGA
270 #define CONFIG_CMD_FPGA_LOADMK
271 #define CONFIG_CMD_FPGA_LOADP
272 #define CONFIG_CMD_FPGA_LOADBP
273 #define CONFIG_CMD_FPGA_LOADFS
274
275 /* Open Firmware flat tree */
276 #define CONFIG_OF_LIBFDT
277
278 /* FIT support */
279 #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */
280
281 /* FDT support */
282 #define CONFIG_DISPLAY_BOARDINFO_LATE
283
284 /* Extend size of kernel image for uncompression */
285 #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
286
287 /* Boot FreeBSD/vxWorks from an ELF image */
288 #if defined(CONFIG_ZYNQ_BOOT_FREEBSD)
289 # define CONFIG_API
290 # define CONFIG_CMD_ELF
291 # define CONFIG_SYS_MMC_MAX_DEVICE 1
292 #endif
293
294 #define CONFIG_SYS_LDSCRIPT "arch/arm/cpu/armv7/zynq/u-boot.lds"
295
296 /* Commands */
297 #include <config_cmd_default.h>
298
299 #define CONFIG_CMD_PING
300 #define CONFIG_CMD_DHCP
301 #define CONFIG_CMD_MII
302 #define CONFIG_CMD_TFTPPUT
303
304 /* SPL part */
305 #define CONFIG_CMD_SPL
306 #define CONFIG_SPL_FRAMEWORK
307 #define CONFIG_SPL_LIBCOMMON_SUPPORT
308 #define CONFIG_SPL_LIBGENERIC_SUPPORT
309 #define CONFIG_SPL_SERIAL_SUPPORT
310 #define CONFIG_SPL_BOARD_INIT
311
312 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/zynq/u-boot-spl.lds"
313
314 /* MMC support */
315 #ifdef CONFIG_ZYNQ_SDHCI0
316 #define CONFIG_SPL_MMC_SUPPORT
317 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
318 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
319 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
320 #define CONFIG_SPL_LIBDISK_SUPPORT
321 #define CONFIG_SPL_FAT_SUPPORT
322 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img"
323 #endif
324
325 /* Disable dcache for SPL just for sure */
326 #ifdef CONFIG_SPL_BUILD
327 #define CONFIG_SYS_DCACHE_OFF
328 #undef CONFIG_FPGA
329 #endif
330
331 /* Address in RAM where the parameters must be copied by SPL. */
332 #define CONFIG_SYS_SPL_ARGS_ADDR 0x10000000
333
334 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "system.dtb"
335 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
336
337 /* Not using MMC raw mode - just for compilation purpose */
338 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0
339 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0
340 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0
341
342 /* qspi mode is working fine */
343 #ifdef CONFIG_ZYNQ_QSPI
344 #define CONFIG_SPL_SPI_SUPPORT
345 #define CONFIG_SPL_SPI_LOAD
346 #define CONFIG_SPL_SPI_FLASH_SUPPORT
347 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000
348 #endif
349
350 /* for booting directly linux */
351 #define CONFIG_SPL_OS_BOOT
352
353 /* SP location before relocation, must use scratch RAM */
354 #define CONFIG_SPL_TEXT_BASE 0x0
355
356 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */
357 #define CONFIG_SPL_MAX_SIZE 0x30000
358
359 /* The highest 64k OCM address */
360 #define OCM_HIGH_ADDR 0xffff0000
361
362 /* Just define any reasonable size */
363 #define CONFIG_SPL_STACK_SIZE 0x1000
364
365 /* SPL stack position - and stack goes down */
366 #define CONFIG_SPL_STACK (OCM_HIGH_ADDR + CONFIG_SPL_STACK_SIZE)
367
368 /* On the top of OCM space */
369 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_STACK + \
370 GENERATED_GBL_DATA_SIZE)
371 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x1000
372
373 /* BSS setup */
374 #define CONFIG_SPL_BSS_START_ADDR 0x100000
375 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000
376
377 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
378
379 #define CONFIG_SYS_GENERIC_BOARD
380
381 #endif /* __CONFIG_ZYNQ_COMMON_H */