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dfu: Fix up the Kconfig mess
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1 /*
2 * Copyright (c) 2013 Google, Inc
3 *
4 * (C) Copyright 2012
5 * Pavel Herrmann <morpheus.ibis@gmail.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10 #ifndef _DM_UCLASS_ID_H
11 #define _DM_UCLASS_ID_H
12
13 /* TODO(sjg@chromium.org): this could be compile-time generated */
14 enum uclass_id {
15 /* These are used internally by driver model */
16 UCLASS_ROOT = 0,
17 UCLASS_DEMO,
18 UCLASS_TEST,
19 UCLASS_TEST_FDT,
20 UCLASS_TEST_BUS,
21 UCLASS_TEST_PROBE,
22 UCLASS_SPI_EMUL, /* sandbox SPI device emulator */
23 UCLASS_I2C_EMUL, /* sandbox I2C device emulator */
24 UCLASS_PCI_EMUL, /* sandbox PCI device emulator */
25 UCLASS_USB_EMUL, /* sandbox USB bus device emulator */
26 UCLASS_SIMPLE_BUS, /* bus with child devices */
27
28 /* U-Boot uclasses start here - in alphabetical order */
29 UCLASS_ADC, /* Analog-to-digital converter */
30 UCLASS_AHCI, /* SATA disk controller */
31 UCLASS_BLK, /* Block device */
32 UCLASS_CLK, /* Clock source, e.g. used by peripherals */
33 UCLASS_CPU, /* CPU, typically part of an SoC */
34 UCLASS_CROS_EC, /* Chrome OS EC */
35 UCLASS_DISPLAY, /* Display (e.g. DisplayPort, HDMI) */
36 UCLASS_DMA, /* Direct Memory Access */
37 UCLASS_EFI, /* EFI managed devices */
38 UCLASS_ETH, /* Ethernet device */
39 UCLASS_GPIO, /* Bank of general-purpose I/O pins */
40 UCLASS_FIRMWARE, /* Firmware */
41 UCLASS_I2C, /* I2C bus */
42 UCLASS_I2C_EEPROM, /* I2C EEPROM device */
43 UCLASS_I2C_GENERIC, /* Generic I2C device */
44 UCLASS_I2C_MUX, /* I2C multiplexer */
45 UCLASS_IDE, /* IDE device */
46 UCLASS_IRQ, /* Interrupt controller */
47 UCLASS_KEYBOARD, /* Keyboard input device */
48 UCLASS_LED, /* Light-emitting diode (LED) */
49 UCLASS_LPC, /* x86 'low pin count' interface */
50 UCLASS_MAILBOX, /* Mailbox controller */
51 UCLASS_MASS_STORAGE, /* Mass storage device */
52 UCLASS_MISC, /* Miscellaneous device */
53 UCLASS_MMC, /* SD / MMC card or chip */
54 UCLASS_MOD_EXP, /* RSA Mod Exp device */
55 UCLASS_MTD, /* Memory Technology Device (MTD) device */
56 UCLASS_NORTHBRIDGE, /* Intel Northbridge / SDRAM controller */
57 UCLASS_NVME, /* NVM Express device */
58 UCLASS_PANEL, /* Display panel, such as an LCD */
59 UCLASS_PANEL_BACKLIGHT, /* Backlight controller for panel */
60 UCLASS_PCH, /* x86 platform controller hub */
61 UCLASS_PCI, /* PCI bus */
62 UCLASS_PCI_GENERIC, /* Generic PCI bus device */
63 UCLASS_PHY, /* Physical Layer (PHY) device */
64 UCLASS_PINCONFIG, /* Pin configuration node device */
65 UCLASS_PINCTRL, /* Pinctrl (pin muxing/configuration) device */
66 UCLASS_PMIC, /* PMIC I/O device */
67 UCLASS_PWM, /* Pulse-width modulator */
68 UCLASS_POWER_DOMAIN, /* (SoC) Power domains */
69 UCLASS_PWRSEQ, /* Power sequence device */
70 UCLASS_RAM, /* RAM controller */
71 UCLASS_REGULATOR, /* Regulator device */
72 UCLASS_REMOTEPROC, /* Remote Processor device */
73 UCLASS_RESET, /* Reset controller device */
74 UCLASS_RTC, /* Real time clock device */
75 UCLASS_SCSI, /* SCSI device */
76 UCLASS_SERIAL, /* Serial UART */
77 UCLASS_SPI, /* SPI bus */
78 UCLASS_SPMI, /* System Power Management Interface bus */
79 UCLASS_SPI_FLASH, /* SPI flash */
80 UCLASS_SPI_GENERIC, /* Generic SPI flash target */
81 UCLASS_SYSCON, /* System configuration device */
82 UCLASS_SYSRESET, /* System reset device */
83 UCLASS_THERMAL, /* Thermal sensor */
84 UCLASS_TIMER, /* Timer device */
85 UCLASS_TPM, /* Trusted Platform Module TIS interface */
86 UCLASS_USB, /* USB bus */
87 UCLASS_USB_DEV_GENERIC, /* USB generic device */
88 UCLASS_USB_HUB, /* USB hub */
89 UCLASS_VIDEO, /* Video or LCD device */
90 UCLASS_VIDEO_BRIDGE, /* Video bridge, e.g. DisplayPort to LVDS */
91 UCLASS_VIDEO_CONSOLE, /* Text console driver for video device */
92 UCLASS_WDT, /* Watchdot Timer driver */
93
94 UCLASS_COUNT,
95 UCLASS_INVALID = -1,
96 };
97
98 #endif