include/i2c.h

   1 /*
   2  * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
   3  * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
   4  * Changes for multibus/multiadapter I2C support.
   5  *
   6  * (C) Copyright 2001
   7  * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
   8  *
   9  * SPDX-License-Identifier:     GPL-2.0+
  10  *
  11  * The original I2C interface was
  12  *   (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
  13  *   AIRVENT SAM s.p.a - RIMINI(ITALY)
  14  * but has been changed substantially.
  15  */
  16
  17 #ifndef _I2C_H_
  18 #define _I2C_H_
  19
  20 /*
  21  * For now there are essentially two parts to this file - driver model
  22  * here at the top, and the older code below (with CONFIG_SYS_I2C being
  23  * most recent). The plan is to migrate everything to driver model.
  24  * The driver model structures and API are separate as they are different
  25  * enough as to be incompatible for compilation purposes.
  26  */
  27
  28 #ifdef CONFIG_DM_I2C
  29
  30 enum dm_i2c_chip_flags {
  31         DM_I2C_CHIP_10BIT       = 1 << 0, /* Use 10-bit addressing */
  32         DM_I2C_CHIP_RD_ADDRESS  = 1 << 1, /* Send address for each read byte */
  33         DM_I2C_CHIP_WR_ADDRESS  = 1 << 2, /* Send address for each write byte */
  34 };
  35
  36 /**
  37  * struct dm_i2c_chip - information about an i2c chip
  38  *
  39  * An I2C chip is a device on the I2C bus. It sits at a particular address
  40  * and normally supports 7-bit or 10-bit addressing.
  41  *
  42  * To obtain this structure, use dev_get_parent_platdata(dev) where dev is
  43  * the chip to examine.
  44  *
  45  * @chip_addr:  Chip address on bus
  46  * @offset_len: Length of offset in bytes. A single byte offset can
  47  *              represent up to 256 bytes. A value larger than 1 may be
  48  *              needed for larger devices.
  49  * @flags:      Flags for this chip (dm_i2c_chip_flags)
  50  * @emul: Emulator for this chip address (only used for emulation)
  51  */
  52 struct dm_i2c_chip {
  53         uint chip_addr;
  54         uint offset_len;
  55         uint flags;
  56 #ifdef CONFIG_SANDBOX
  57         struct udevice *emul;
  58 #endif
  59 };
  60
  61 /**
  62  * struct dm_i2c_bus- information about an i2c bus
  63  *
  64  * An I2C bus contains 0 or more chips on it, each at its own address. The
  65  * bus can operate at different speeds (measured in Hz, typically 100KHz
  66  * or 400KHz).
  67  *
  68  * To obtain this structure, use bus->uclass_priv where bus is the I2C
  69  * bus udevice.
  70  *
  71  * @speed_hz: Bus speed in hertz (typically 100000)
  72  */
  73 struct dm_i2c_bus {
  74         int speed_hz;
  75 };
  76
  77 /**
  78  * dm_i2c_read() - read bytes from an I2C chip
  79  *
  80  * To obtain an I2C device (called a 'chip') given the I2C bus address you
  81  * can use i2c_get_chip(). To obtain a bus by bus number use
  82  * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
  83  *
  84  * To set the address length of a devce use i2c_set_addr_len(). It
  85  * defaults to 1.
  86  *
  87  * @dev:        Chip to read from
  88  * @offset:     Offset within chip to start reading
  89  * @buffer:     Place to put data
  90  * @len:        Number of bytes to read
  91  *
  92  * @return 0 on success, -ve on failure
  93  */
  94 int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
  95
  96 /**
  97  * dm_i2c_write() - write bytes to an I2C chip
  98  *
  99  * See notes for dm_i2c_read() above.
 100  *
 101  * @dev:        Chip to write to
 102  * @offset:     Offset within chip to start writing
 103  * @buffer:     Buffer containing data to write
 104  * @len:        Number of bytes to write
 105  *
 106  * @return 0 on success, -ve on failure
 107  */
 108 int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
 109                  int len);
 110
 111 /**
 112  * dm_i2c_probe() - probe a particular chip address
 113  *
 114  * This can be useful to check for the existence of a chip on the bus.
 115  * It is typically implemented by writing the chip address to the bus
 116  * and checking that the chip replies with an ACK.
 117  *
 118  * @bus:        Bus to probe
 119  * @chip_addr:  7-bit address to probe (10-bit and others are not supported)
 120  * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
 121  * @devp:       Returns the device found, or NULL if none
 122  * @return 0 if a chip was found at that address, -ve if not
 123  */
 124 int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
 125                  struct udevice **devp);
 126
 127 /**
 128  * i2c_set_bus_speed() - set the speed of a bus
 129  *
 130  * @bus:        Bus to adjust
 131  * @speed:      Requested speed in Hz
 132  * @return 0 if OK, -EINVAL for invalid values
 133  */
 134 int i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
 135
 136 /**
 137  * i2c_get_bus_speed() - get the speed of a bus
 138  *
 139  * @bus:        Bus to check
 140  * @return speed of selected I2C bus in Hz, -ve on error
 141  */
 142 int i2c_get_bus_speed(struct udevice *bus);
 143
 144 /**
 145  * i2c_set_chip_flags() - set flags for a chip
 146  *
 147  * Typically addresses are 7 bits, but for 10-bit addresses you should set
 148  * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
 149  *
 150  * @dev:        Chip to adjust
 151  * @flags:      New flags
 152  * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
 153  */
 154 int i2c_set_chip_flags(struct udevice *dev, uint flags);
 155
 156 /**
 157  * i2c_get_chip_flags() - get flags for a chip
 158  *
 159  * @dev:        Chip to check
 160  * @flagsp:     Place to put flags
 161  * @return 0 if OK, other -ve value on error
 162  */
 163 int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
 164
 165 /**
 166  * i2c_set_offset_len() - set the offset length for a chip
 167  *
 168  * The offset used to access a chip may be up to 4 bytes long. Typically it
 169  * is only 1 byte, which is enough for chips with 256 bytes of memory or
 170  * registers. The default value is 1, but you can call this function to
 171  * change it.
 172  *
 173  * @offset_len: New offset length value (typically 1 or 2)
 174  */
 175
 176 int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
 177 /**
 178  * i2c_deblock() - recover a bus that is in an unknown state
 179  *
 180  * See the deblock() method in 'struct dm_i2c_ops' for full information
 181  *
 182  * @bus:        Bus to recover
 183  * @return 0 if OK, -ve on error
 184  */
 185 int i2c_deblock(struct udevice *bus);
 186
 187 #ifdef CONFIG_DM_I2C_COMPAT
 188 /**
 189  * i2c_probe() - Compatibility function for driver model
 190  *
 191  * Calls dm_i2c_probe() on the current bus
 192  */
 193 int i2c_probe(uint8_t chip_addr);
 194
 195 /**
 196  * i2c_read() - Compatibility function for driver model
 197  *
 198  * Calls dm_i2c_read() with the device corresponding to @chip_addr, and offset
 199  * set to @addr. @alen must match the current setting for the device.
 200  */
 201 int i2c_read(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
 202              int len);
 203
 204 /**
 205  * i2c_write() - Compatibility function for driver model
 206  *
 207  * Calls dm_i2c_write() with the device corresponding to @chip_addr, and offset
 208  * set to @addr. @alen must match the current setting for the device.
 209  */
 210 int i2c_write(uint8_t chip_addr, unsigned int addr, int alen, uint8_t *buffer,
 211               int len);
 212
 213 /**
 214  * i2c_get_bus_num_fdt() - Compatibility function for driver model
 215  *
 216  * @return the bus number associated with the given device tree node
 217  */
 218 int i2c_get_bus_num_fdt(int node);
 219
 220 /**
 221  * i2c_get_bus_num() - Compatibility function for driver model
 222  *
 223  * @return the 'current' bus number
 224  */
 225 unsigned int i2c_get_bus_num(void);
 226
 227 /**
 228  * i2c_set_bus_num() - Compatibility function for driver model
 229  *
 230  * Sets the 'current' bus
 231  */
 232 int i2c_set_bus_num(unsigned int bus);
 233
 234 static inline void I2C_SET_BUS(unsigned int bus)
 235 {
 236         i2c_set_bus_num(bus);
 237 }
 238
 239 static inline unsigned int I2C_GET_BUS(void)
 240 {
 241         return i2c_get_bus_num();
 242 }
 243
 244 /**
 245  * i2c_init() - Compatibility function for driver model
 246  *
 247  * This function does nothing.
 248  */
 249 void i2c_init(int speed, int slaveaddr);
 250
 251 /**
 252  * board_i2c_init() - Compatibility function for driver model
 253  *
 254  * @param blob  Device tree blbo
 255  * @return the number of I2C bus
 256  */
 257 void board_i2c_init(const void *blob);
 258
 259 #endif
 260
 261 /*
 262  * Not all of these flags are implemented in the U-Boot API
 263  */
 264 enum dm_i2c_msg_flags {
 265         I2C_M_TEN               = 0x0010, /* ten-bit chip address */
 266         I2C_M_RD                = 0x0001, /* read data, from slave to master */
 267         I2C_M_STOP              = 0x8000, /* send stop after this message */
 268         I2C_M_NOSTART           = 0x4000, /* no start before this message */
 269         I2C_M_REV_DIR_ADDR      = 0x2000, /* invert polarity of R/W bit */
 270         I2C_M_IGNORE_NAK        = 0x1000, /* continue after NAK */
 271         I2C_M_NO_RD_ACK         = 0x0800, /* skip the Ack bit on reads */
 272         I2C_M_RECV_LEN          = 0x0400, /* length is first received byte */
 273 };
 274
 275 /**
 276  * struct i2c_msg - an I2C message
 277  *
 278  * @addr:       Slave address
 279  * @flags:      Flags (see enum dm_i2c_msg_flags)
 280  * @len:        Length of buffer in bytes, may be 0 for a probe
 281  * @buf:        Buffer to send/receive, or NULL if no data
 282  */
 283 struct i2c_msg {
 284         uint addr;
 285         uint flags;
 286         uint len;
 287         u8 *buf;
 288 };
 289
 290 /**
 291  * struct i2c_msg_list - a list of I2C messages
 292  *
 293  * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
 294  * appropriate in U-Boot.
 295  *
 296  * @msg:        Pointer to i2c_msg array
 297  * @nmsgs:      Number of elements in the array
 298  */
 299 struct i2c_msg_list {
 300         struct i2c_msg *msgs;
 301         uint nmsgs;
 302 };
 303
 304 /**
 305  * struct dm_i2c_ops - driver operations for I2C uclass
 306  *
 307  * Drivers should support these operations unless otherwise noted. These
 308  * operations are intended to be used by uclass code, not directly from
 309  * other code.
 310  */
 311 struct dm_i2c_ops {
 312         /**
 313          * xfer() - transfer a list of I2C messages
 314          *
 315          * @bus:        Bus to read from
 316          * @msg:        List of messages to transfer
 317          * @nmsgs:      Number of messages in the list
 318          * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
 319          *      -ECOMM if the speed cannot be supported, -EPROTO if the chip
 320          *      flags cannot be supported, other -ve value on some other error
 321          */
 322         int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
 323
 324         /**
 325          * probe_chip() - probe for the presense of a chip address
 326          *
 327          * This function is optional. If omitted, the uclass will send a zero
 328          * length message instead.
 329          *
 330          * @bus:        Bus to probe
 331          * @chip_addr:  Chip address to probe
 332          * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
 333          * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
 334          * to default probem other -ve value on error
 335          */
 336         int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
 337
 338         /**
 339          * set_bus_speed() - set the speed of a bus (optional)
 340          *
 341          * The bus speed value will be updated by the uclass if this function
 342          * does not return an error. This method is optional - if it is not
 343          * provided then the driver can read the speed from
 344          * bus->uclass_priv->speed_hz
 345          *
 346          * @bus:        Bus to adjust
 347          * @speed:      Requested speed in Hz
 348          * @return 0 if OK, -EINVAL for invalid values
 349          */
 350         int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
 351
 352         /**
 353          * get_bus_speed() - get the speed of a bus (optional)
 354          *
 355          * Normally this can be provided by the uclass, but if you want your
 356          * driver to check the bus speed by looking at the hardware, you can
 357          * implement that here. This method is optional. This method would
 358          * normally be expected to return bus->uclass_priv->speed_hz.
 359          *
 360          * @bus:        Bus to check
 361          * @return speed of selected I2C bus in Hz, -ve on error
 362          */
 363         int (*get_bus_speed)(struct udevice *bus);
 364
 365         /**
 366          * set_flags() - set the flags for a chip (optional)
 367          *
 368          * This is generally implemented by the uclass, but drivers can
 369          * check the value to ensure that unsupported options are not used.
 370          * This method is optional. If provided, this method will always be
 371          * called when the flags change.
 372          *
 373          * @dev:        Chip to adjust
 374          * @flags:      New flags value
 375          * @return 0 if OK, -EINVAL if value is unsupported
 376          */
 377         int (*set_flags)(struct udevice *dev, uint flags);
 378
 379         /**
 380          * deblock() - recover a bus that is in an unknown state
 381          *
 382          * I2C is a synchronous protocol and resets of the processor in the
 383          * middle of an access can block the I2C Bus until a powerdown of
 384          * the full unit is done. This is because slaves can be stuck
 385          * waiting for addition bus transitions for a transaction that will
 386          * never complete. Resetting the I2C master does not help. The only
 387          * way is to force the bus through a series of transitions to make
 388          * sure that all slaves are done with the transaction. This method
 389          * performs this 'deblocking' if support by the driver.
 390          *
 391          * This method is optional.
 392          */
 393         int (*deblock)(struct udevice *bus);
 394 };
 395
 396 #define i2c_get_ops(dev)        ((struct dm_i2c_ops *)(dev)->driver->ops)
 397
 398 /**
 399  * i2c_get_chip() - get a device to use to access a chip on a bus
 400  *
 401  * This returns the device for the given chip address. The device can then
 402  * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
 403  *
 404  * @bus:        Bus to examine
 405  * @chip_addr:  Chip address for the new device
 406  * @offset_len: Length of a register offset in bytes (normally 1)
 407  * @devp:       Returns pointer to new device if found or -ENODEV if not
 408  *              found
 409  */
 410 int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
 411                  struct udevice **devp);
 412
 413 /**
 414  * i2c_get_chip() - get a device to use to access a chip on a bus number
 415  *
 416  * This returns the device for the given chip address on a particular bus
 417  * number.
 418  *
 419  * @busnum:     Bus number to examine
 420  * @chip_addr:  Chip address for the new device
 421  * @offset_len: Length of a register offset in bytes (normally 1)
 422  * @devp:       Returns pointer to new device if found or -ENODEV if not
 423  *              found
 424  */
 425 int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
 426                             struct udevice **devp);
 427
 428 /**
 429  * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
 430  *
 431  * This decodes the chip address from a device tree node and puts it into
 432  * its dm_i2c_chip structure. This should be called in your driver's
 433  * ofdata_to_platdata() method.
 434  *
 435  * @blob:       Device tree blob
 436  * @node:       Node offset to read from
 437  * @spi:        Place to put the decoded information
 438  */
 439 int i2c_chip_ofdata_to_platdata(const void *blob, int node,
 440                                 struct dm_i2c_chip *chip);
 441
 442 #endif
 443
 444 #ifndef CONFIG_DM_I2C
 445
 446 /*
 447  * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
 448  *
 449  * The implementation MUST NOT use static or global variables if the
 450  * I2C routines are used to read SDRAM configuration information
 451  * because this is done before the memories are initialized. Limited
 452  * use of stack-based variables are OK (the initial stack size is
 453  * limited).
 454  *
 455  * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
 456  */
 457
 458 /*
 459  * Configuration items.
 460  */
 461 #define I2C_RXTX_LEN    128     /* maximum tx/rx buffer length */
 462
 463 #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
 464 /* no muxes used bus = i2c adapters */
 465 #define CONFIG_SYS_I2C_DIRECT_BUS       1
 466 #define CONFIG_SYS_I2C_MAX_HOPS         0
 467 #define CONFIG_SYS_NUM_I2C_BUSES        ll_entry_count(struct i2c_adapter, i2c)
 468 #else
 469 /* we use i2c muxes */
 470 #undef CONFIG_SYS_I2C_DIRECT_BUS
 471 #endif
 472
 473 /* define the I2C bus number for RTC and DTT if not already done */
 474 #if !defined(CONFIG_SYS_RTC_BUS_NUM)
 475 #define CONFIG_SYS_RTC_BUS_NUM          0
 476 #endif
 477 #if !defined(CONFIG_SYS_DTT_BUS_NUM)
 478 #define CONFIG_SYS_DTT_BUS_NUM          0
 479 #endif
 480 #if !defined(CONFIG_SYS_SPD_BUS_NUM)
 481 #define CONFIG_SYS_SPD_BUS_NUM          0
 482 #endif
 483
 484 struct i2c_adapter {
 485         void            (*init)(struct i2c_adapter *adap, int speed,
 486                                 int slaveaddr);
 487         int             (*probe)(struct i2c_adapter *adap, uint8_t chip);
 488         int             (*read)(struct i2c_adapter *adap, uint8_t chip,
 489                                 uint addr, int alen, uint8_t *buffer,
 490                                 int len);
 491         int             (*write)(struct i2c_adapter *adap, uint8_t chip,
 492                                 uint addr, int alen, uint8_t *buffer,
 493                                 int len);
 494         uint            (*set_bus_speed)(struct i2c_adapter *adap,
 495                                 uint speed);
 496         int             speed;
 497         int             waitdelay;
 498         int             slaveaddr;
 499         int             init_done;
 500         int             hwadapnr;
 501         char            *name;
 502 };
 503
 504 #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
 505                 _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
 506         { \
 507                 .init           =       _init, \
 508                 .probe          =       _probe, \
 509                 .read           =       _read, \
 510                 .write          =       _write, \
 511                 .set_bus_speed  =       _set_speed, \
 512                 .speed          =       _speed, \
 513                 .slaveaddr      =       _slaveaddr, \
 514                 .init_done      =       0, \
 515                 .hwadapnr       =       _hwadapnr, \
 516                 .name           =       #_name \
 517 };
 518
 519 #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
 520                         _set_speed, _speed, _slaveaddr, _hwadapnr) \
 521         ll_entry_declare(struct i2c_adapter, _name, i2c) = \
 522         U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
 523                  _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
 524
 525 struct i2c_adapter *i2c_get_adapter(int index);
 526
 527 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
 528 struct i2c_mux {
 529         int     id;
 530         char    name[16];
 531 };
 532
 533 struct i2c_next_hop {
 534         struct i2c_mux          mux;
 535         uint8_t         chip;
 536         uint8_t         channel;
 537 };
 538
 539 struct i2c_bus_hose {
 540         int     adapter;
 541         struct i2c_next_hop     next_hop[CONFIG_SYS_I2C_MAX_HOPS];
 542 };
 543 #define I2C_NULL_HOP    {{-1, ""}, 0, 0}
 544 extern struct i2c_bus_hose      i2c_bus[];
 545
 546 #define I2C_ADAPTER(bus)        i2c_bus[bus].adapter
 547 #else
 548 #define I2C_ADAPTER(bus)        bus
 549 #endif
 550 #define I2C_BUS                 gd->cur_i2c_bus
 551
 552 #define I2C_ADAP_NR(bus)        i2c_get_adapter(I2C_ADAPTER(bus))
 553 #define I2C_ADAP                I2C_ADAP_NR(gd->cur_i2c_bus)
 554 #define I2C_ADAP_HWNR           (I2C_ADAP->hwadapnr)
 555
 556 #ifndef CONFIG_SYS_I2C_DIRECT_BUS
 557 #define I2C_MUX_PCA9540_ID      1
 558 #define I2C_MUX_PCA9540         {I2C_MUX_PCA9540_ID, "PCA9540B"}
 559 #define I2C_MUX_PCA9542_ID      2
 560 #define I2C_MUX_PCA9542         {I2C_MUX_PCA9542_ID, "PCA9542A"}
 561 #define I2C_MUX_PCA9544_ID      3
 562 #define I2C_MUX_PCA9544         {I2C_MUX_PCA9544_ID, "PCA9544A"}
 563 #define I2C_MUX_PCA9547_ID      4
 564 #define I2C_MUX_PCA9547         {I2C_MUX_PCA9547_ID, "PCA9547A"}
 565 #define I2C_MUX_PCA9548_ID      5
 566 #define I2C_MUX_PCA9548         {I2C_MUX_PCA9548_ID, "PCA9548"}
 567 #endif
 568
 569 #ifndef I2C_SOFT_DECLARATIONS
 570 # if defined(CONFIG_MPC8260)
 571 #  define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT);
 572 # elif defined(CONFIG_8xx)
 573 #  define I2C_SOFT_DECLARATIONS volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
 574
 575 # elif (defined(CONFIG_AT91RM9200) || \
 576         defined(CONFIG_AT91SAM9260) ||  defined(CONFIG_AT91SAM9261) || \
 577         defined(CONFIG_AT91SAM9263))
 578 #  define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
 579 # else
 580 #  define I2C_SOFT_DECLARATIONS
 581 # endif
 582 #endif
 583
 584 #ifdef CONFIG_8xx
 585 /* Set default value for the I2C bus speed on 8xx. In the
 586  * future, we'll define these in all 8xx board config files.
 587  */
 588 #ifndef CONFIG_SYS_I2C_SPEED
 589 #define CONFIG_SYS_I2C_SPEED    50000
 590 #endif
 591 #endif
 592
 593 /*
 594  * Many boards/controllers/drivers don't support an I2C slave interface so
 595  * provide a default slave address for them for use in common code.  A real
 596  * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
 597  * support a slave interface.
 598  */
 599 #ifndef CONFIG_SYS_I2C_SLAVE
 600 #define CONFIG_SYS_I2C_SLAVE    0xfe
 601 #endif
 602
 603 /*
 604  * Initialization, must be called once on start up, may be called
 605  * repeatedly to change the speed and slave addresses.
 606  */
 607 void i2c_init(int speed, int slaveaddr);
 608 void i2c_init_board(void);
 609 #ifdef CONFIG_SYS_I2C_BOARD_LATE_INIT
 610 void i2c_board_late_init(void);
 611 #endif
 612
 613 #ifdef CONFIG_SYS_I2C
 614 /*
 615  * i2c_get_bus_num:
 616  *
 617  *  Returns index of currently active I2C bus.  Zero-based.
 618  */
 619 unsigned int i2c_get_bus_num(void);
 620
 621 /*
 622  * i2c_set_bus_num:
 623  *
 624  *  Change the active I2C bus.  Subsequent read/write calls will
 625  *  go to this one.
 626  *
 627  *      bus - bus index, zero based
 628  *
 629  *      Returns: 0 on success, not 0 on failure
 630  *
 631  */
 632 int i2c_set_bus_num(unsigned int bus);
 633
 634 /*
 635  * i2c_init_all():
 636  *
 637  * Initializes all I2C adapters in the system. All i2c_adap structures must
 638  * be initialized beforehead with function pointers and data, including
 639  * speed and slaveaddr. Returns 0 on success, non-0 on failure.
 640  */
 641 void i2c_init_all(void);
 642
 643 /*
 644  * Probe the given I2C chip address.  Returns 0 if a chip responded,
 645  * not 0 on failure.
 646  */
 647 int i2c_probe(uint8_t chip);
 648
 649 /*
 650  * Read/Write interface:
 651  *   chip:    I2C chip address, range 0..127
 652  *   addr:    Memory (register) address within the chip
 653  *   alen:    Number of bytes to use for addr (typically 1, 2 for larger
 654  *              memories, 0 for register type devices with only one
 655  *              register)
 656  *   buffer:  Where to read/write the data
 657  *   len:     How many bytes to read/write
 658  *
 659  *   Returns: 0 on success, not 0 on failure
 660  */
 661 int i2c_read(uint8_t chip, unsigned int addr, int alen,
 662                                 uint8_t *buffer, int len);
 663
 664 int i2c_write(uint8_t chip, unsigned int addr, int alen,
 665                                 uint8_t *buffer, int len);
 666
 667 /*
 668  * Utility routines to read/write registers.
 669  */
 670 uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
 671
 672 void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
 673
 674 /*
 675  * i2c_set_bus_speed:
 676  *
 677  *  Change the speed of the active I2C bus
 678  *
 679  *      speed - bus speed in Hz
 680  *
 681  *      Returns: new bus speed
 682  *
 683  */
 684 unsigned int i2c_set_bus_speed(unsigned int speed);
 685
 686 /*
 687  * i2c_get_bus_speed:
 688  *
 689  *  Returns speed of currently active I2C bus in Hz
 690  */
 691
 692 unsigned int i2c_get_bus_speed(void);
 693
 694 /*
 695  * i2c_reloc_fixup:
 696  *
 697  * Adjusts I2C pointers after U-Boot is relocated to DRAM
 698  */
 699 void i2c_reloc_fixup(void);
 700 #if defined(CONFIG_SYS_I2C_SOFT)
 701 void i2c_soft_init(void);
 702 void i2c_soft_active(void);
 703 void i2c_soft_tristate(void);
 704 int i2c_soft_read(void);
 705 void i2c_soft_sda(int bit);
 706 void i2c_soft_scl(int bit);
 707 void i2c_soft_delay(void);
 708 #endif
 709 #else
 710
 711 /*
 712  * Probe the given I2C chip address.  Returns 0 if a chip responded,
 713  * not 0 on failure.
 714  */
 715 int i2c_probe(uchar chip);
 716
 717 /*
 718  * Read/Write interface:
 719  *   chip:    I2C chip address, range 0..127
 720  *   addr:    Memory (register) address within the chip
 721  *   alen:    Number of bytes to use for addr (typically 1, 2 for larger
 722  *              memories, 0 for register type devices with only one
 723  *              register)
 724  *   buffer:  Where to read/write the data
 725  *   len:     How many bytes to read/write
 726  *
 727  *   Returns: 0 on success, not 0 on failure
 728  */
 729 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
 730 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
 731
 732 /*
 733  * Utility routines to read/write registers.
 734  */
 735 static inline u8 i2c_reg_read(u8 addr, u8 reg)
 736 {
 737         u8 buf;
 738
 739 #ifdef CONFIG_8xx
 740         /* MPC8xx needs this.  Maybe one day we can get rid of it. */
 741         i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 742 #endif
 743
 744 #ifdef DEBUG
 745         printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
 746 #endif
 747
 748         i2c_read(addr, reg, 1, &buf, 1);
 749
 750         return buf;
 751 }
 752
 753 static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
 754 {
 755 #ifdef CONFIG_8xx
 756         /* MPC8xx needs this.  Maybe one day we can get rid of it. */
 757         i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 758 #endif
 759
 760 #ifdef DEBUG
 761         printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
 762                __func__, addr, reg, val);
 763 #endif
 764
 765         i2c_write(addr, reg, 1, &val, 1);
 766 }
 767
 768 /*
 769  * Functions for setting the current I2C bus and its speed
 770  */
 771
 772 /*
 773  * i2c_set_bus_num:
 774  *
 775  *  Change the active I2C bus.  Subsequent read/write calls will
 776  *  go to this one.
 777  *
 778  *      bus - bus index, zero based
 779  *
 780  *      Returns: 0 on success, not 0 on failure
 781  *
 782  */
 783 int i2c_set_bus_num(unsigned int bus);
 784
 785 /*
 786  * i2c_get_bus_num:
 787  *
 788  *  Returns index of currently active I2C bus.  Zero-based.
 789  */
 790
 791 unsigned int i2c_get_bus_num(void);
 792
 793 /*
 794  * i2c_set_bus_speed:
 795  *
 796  *  Change the speed of the active I2C bus
 797  *
 798  *      speed - bus speed in Hz
 799  *
 800  *      Returns: 0 on success, not 0 on failure
 801  *
 802  */
 803 int i2c_set_bus_speed(unsigned int);
 804
 805 /*
 806  * i2c_get_bus_speed:
 807  *
 808  *  Returns speed of currently active I2C bus in Hz
 809  */
 810
 811 unsigned int i2c_get_bus_speed(void);
 812 #endif /* CONFIG_SYS_I2C */
 813
 814 /*
 815  * only for backwardcompatibility, should go away if we switched
 816  * completely to new multibus support.
 817  */
 818 #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
 819 # if !defined(CONFIG_SYS_MAX_I2C_BUS)
 820 #  define CONFIG_SYS_MAX_I2C_BUS                2
 821 # endif
 822 # define I2C_MULTI_BUS                          1
 823 #else
 824 # define CONFIG_SYS_MAX_I2C_BUS         1
 825 # define I2C_MULTI_BUS                          0
 826 #endif
 827
 828 /* NOTE: These two functions MUST be always_inline to avoid code growth! */
 829 static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
 830 static inline unsigned int I2C_GET_BUS(void)
 831 {
 832         return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
 833 }
 834
 835 static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
 836 static inline void I2C_SET_BUS(unsigned int bus)
 837 {
 838         if (I2C_MULTI_BUS)
 839                 i2c_set_bus_num(bus);
 840 }
 841
 842 /* Multi I2C definitions */
 843 enum {
 844         I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
 845         I2C_8, I2C_9, I2C_10,
 846 };
 847
 848 /* Multi I2C busses handling */
 849 #ifdef CONFIG_SOFT_I2C_MULTI_BUS
 850 extern int get_multi_scl_pin(void);
 851 extern int get_multi_sda_pin(void);
 852 extern int multi_i2c_init(void);
 853 #endif
 854
 855 /**
 856  * Get FDT values for i2c bus.
 857  *
 858  * @param blob  Device tree blbo
 859  * @return the number of I2C bus
 860  */
 861 void board_i2c_init(const void *blob);
 862
 863 /**
 864  * Find the I2C bus number by given a FDT I2C node.
 865  *
 866  * @param blob  Device tree blbo
 867  * @param node  FDT I2C node to find
 868  * @return the number of I2C bus (zero based), or -1 on error
 869  */
 870 int i2c_get_bus_num_fdt(int node);
 871
 872 /**
 873  * Reset the I2C bus represented by the given a FDT I2C node.
 874  *
 875  * @param blob  Device tree blbo
 876  * @param node  FDT I2C node to find
 877  * @return 0 if port was reset, -1 if not found
 878  */
 879 int i2c_reset_port_fdt(const void *blob, int node);
 880
 881 #endif /* !CONFIG_DM_I2C */
 882
 883 #endif  /* _I2C_H_ */