include/lcd.h

   1 /*
   2  * MPC823 and PXA LCD Controller
   3  *
   4  * Modeled after video interface by Paolo Scaffardi
   5  *
   6  *
   7  * (C) Copyright 2001
   8  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef _LCD_H_
  14 #define _LCD_H_
  15
  16 extern char lcd_is_enabled;
  17
  18 extern int lcd_line_length;
  19
  20 extern struct vidinfo panel_info;
  21
  22 void lcd_ctrl_init(void *lcdbase);
  23 void lcd_enable(void);
  24
  25 /* setcolreg used in 8bpp/16bpp; initcolregs used in monochrome */
  26 void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue);
  27 void lcd_initcolregs(void);
  28
  29 int lcd_getfgcolor(void);
  30
  31 /* gunzip_bmp used if CONFIG_VIDEO_BMP_GZIP */
  32 struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp,
  33                              void **alloc_addr);
  34 int bmp_display(ulong addr, int x, int y);
  35
  36 /**
  37  * Set whether we need to flush the dcache when changing the LCD image. This
  38  * defaults to off.
  39  *
  40  * @param flush         non-zero to flush cache after update, 0 to skip
  41  */
  42 void lcd_set_flush_dcache(int flush);
  43
  44 #if defined CONFIG_MPC823
  45 /*
  46  * LCD controller stucture for MPC823 CPU
  47  */
  48 typedef struct vidinfo {
  49         ushort  vl_col;         /* Number of columns (i.e. 640) */
  50         ushort  vl_row;         /* Number of rows (i.e. 480) */
  51         ushort  vl_width;       /* Width of display area in millimeters */
  52         ushort  vl_height;      /* Height of display area in millimeters */
  53
  54         /* LCD configuration register */
  55         u_char  vl_clkp;        /* Clock polarity */
  56         u_char  vl_oep;         /* Output Enable polarity */
  57         u_char  vl_hsp;         /* Horizontal Sync polarity */
  58         u_char  vl_vsp;         /* Vertical Sync polarity */
  59         u_char  vl_dp;          /* Data polarity */
  60         u_char  vl_bpix;        /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8 */
  61         u_char  vl_lbw;         /* LCD Bus width, 0 = 4, 1 = 8 */
  62         u_char  vl_splt;        /* Split display, 0 = single-scan, 1 = dual-scan */
  63         u_char  vl_clor;        /* Color, 0 = mono, 1 = color */
  64         u_char  vl_tft;         /* 0 = passive, 1 = TFT */
  65
  66         /* Horizontal control register. Timing from data sheet */
  67         ushort  vl_wbl;         /* Wait between lines */
  68
  69         /* Vertical control register */
  70         u_char  vl_vpw;         /* Vertical sync pulse width */
  71         u_char  vl_lcdac;       /* LCD AC timing */
  72         u_char  vl_wbf;         /* Wait between frames */
  73 } vidinfo_t;
  74
  75 #elif defined(CONFIG_CPU_PXA25X) || defined(CONFIG_CPU_PXA27X) || \
  76         defined CONFIG_CPU_MONAHANS
  77 /*
  78  * PXA LCD DMA descriptor
  79  */
  80 struct pxafb_dma_descriptor {
  81         u_long  fdadr;          /* Frame descriptor address register */
  82         u_long  fsadr;          /* Frame source address register */
  83         u_long  fidr;           /* Frame ID register */
  84         u_long  ldcmd;          /* Command register */
  85 };
  86
  87 /*
  88  * PXA LCD info
  89  */
  90 struct pxafb_info {
  91
  92         /* Misc registers */
  93         u_long  reg_lccr3;
  94         u_long  reg_lccr2;
  95         u_long  reg_lccr1;
  96         u_long  reg_lccr0;
  97         u_long  fdadr0;
  98         u_long  fdadr1;
  99
 100         /* DMA descriptors */
 101         struct  pxafb_dma_descriptor *  dmadesc_fblow;
 102         struct  pxafb_dma_descriptor *  dmadesc_fbhigh;
 103         struct  pxafb_dma_descriptor *  dmadesc_palette;
 104
 105         u_long  screen;         /* physical address of frame buffer */
 106         u_long  palette;        /* physical address of palette memory */
 107         u_int   palette_size;
 108 };
 109
 110 /*
 111  * LCD controller stucture for PXA CPU
 112  */
 113 typedef struct vidinfo {
 114         ushort  vl_col;         /* Number of columns (i.e. 640) */
 115         ushort  vl_row;         /* Number of rows (i.e. 480) */
 116         ushort  vl_width;       /* Width of display area in millimeters */
 117         ushort  vl_height;      /* Height of display area in millimeters */
 118
 119         /* LCD configuration register */
 120         u_char  vl_clkp;        /* Clock polarity */
 121         u_char  vl_oep;         /* Output Enable polarity */
 122         u_char  vl_hsp;         /* Horizontal Sync polarity */
 123         u_char  vl_vsp;         /* Vertical Sync polarity */
 124         u_char  vl_dp;          /* Data polarity */
 125         u_char  vl_bpix;        /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
 126         u_char  vl_lbw;         /* LCD Bus width, 0 = 4, 1 = 8 */
 127         u_char  vl_splt;        /* Split display, 0 = single-scan, 1 = dual-scan */
 128         u_char  vl_clor;        /* Color, 0 = mono, 1 = color */
 129         u_char  vl_tft;         /* 0 = passive, 1 = TFT */
 130
 131         /* Horizontal control register. Timing from data sheet */
 132         ushort  vl_hpw;         /* Horz sync pulse width */
 133         u_char  vl_blw;         /* Wait before of line */
 134         u_char  vl_elw;         /* Wait end of line */
 135
 136         /* Vertical control register. */
 137         u_char  vl_vpw;         /* Vertical sync pulse width */
 138         u_char  vl_bfw;         /* Wait before of frame */
 139         u_char  vl_efw;         /* Wait end of frame */
 140
 141         /* PXA LCD controller params */
 142         struct  pxafb_info pxa;
 143 } vidinfo_t;
 144
 145 #elif defined(CONFIG_ATMEL_LCD) || defined(CONFIG_ATMEL_HLCD)
 146
 147 typedef struct vidinfo {
 148         ushort vl_col;          /* Number of columns (i.e. 640) */
 149         ushort vl_row;          /* Number of rows (i.e. 480) */
 150         u_long vl_clk;  /* pixel clock in ps    */
 151
 152         /* LCD configuration register */
 153         u_long vl_sync;         /* Horizontal / vertical sync */
 154         u_long vl_bpix;         /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
 155         u_long vl_tft;          /* 0 = passive, 1 = TFT */
 156         u_long vl_cont_pol_low; /* contrast polarity is low */
 157         u_long vl_clk_pol;      /* clock polarity */
 158
 159         /* Horizontal control register. */
 160         u_long vl_hsync_len;    /* Length of horizontal sync */
 161         u_long vl_left_margin;  /* Time from sync to picture */
 162         u_long vl_right_margin; /* Time from picture to sync */
 163
 164         /* Vertical control register. */
 165         u_long vl_vsync_len;    /* Length of vertical sync */
 166         u_long vl_upper_margin; /* Time from sync to picture */
 167         u_long vl_lower_margin; /* Time from picture to sync */
 168
 169         u_long  mmio;           /* Memory mapped registers */
 170 } vidinfo_t;
 171
 172 #elif defined(CONFIG_EXYNOS_FB)
 173
 174 enum {
 175         FIMD_RGB_INTERFACE = 1,
 176         FIMD_CPU_INTERFACE = 2,
 177 };
 178
 179 enum exynos_fb_rgb_mode_t {
 180         MODE_RGB_P = 0,
 181         MODE_BGR_P = 1,
 182         MODE_RGB_S = 2,
 183         MODE_BGR_S = 3,
 184 };
 185
 186 typedef struct vidinfo {
 187         ushort vl_col;          /* Number of columns (i.e. 640) */
 188         ushort vl_row;          /* Number of rows (i.e. 480) */
 189         ushort vl_width;        /* Width of display area in millimeters */
 190         ushort vl_height;       /* Height of display area in millimeters */
 191
 192         /* LCD configuration register */
 193         u_char vl_freq;         /* Frequency */
 194         u_char vl_clkp;         /* Clock polarity */
 195         u_char vl_oep;          /* Output Enable polarity */
 196         u_char vl_hsp;          /* Horizontal Sync polarity */
 197         u_char vl_vsp;          /* Vertical Sync polarity */
 198         u_char vl_dp;           /* Data polarity */
 199         u_char vl_bpix;         /* Bits per pixel */
 200
 201         /* Horizontal control register. Timing from data sheet */
 202         u_char vl_hspw;         /* Horz sync pulse width */
 203         u_char vl_hfpd;         /* Wait before of line */
 204         u_char vl_hbpd;         /* Wait end of line */
 205
 206         /* Vertical control register. */
 207         u_char  vl_vspw;        /* Vertical sync pulse width */
 208         u_char  vl_vfpd;        /* Wait before of frame */
 209         u_char  vl_vbpd;        /* Wait end of frame */
 210         u_char  vl_cmd_allow_len; /* Wait end of frame */
 211
 212         unsigned int win_id;
 213         unsigned int init_delay;
 214         unsigned int power_on_delay;
 215         unsigned int reset_delay;
 216         unsigned int interface_mode;
 217         unsigned int mipi_enabled;
 218         unsigned int dp_enabled;
 219         unsigned int cs_setup;
 220         unsigned int wr_setup;
 221         unsigned int wr_act;
 222         unsigned int wr_hold;
 223         unsigned int logo_on;
 224         unsigned int logo_width;
 225         unsigned int logo_height;
 226         int logo_x_offset;
 227         int logo_y_offset;
 228         unsigned long logo_addr;
 229         unsigned int rgb_mode;
 230         unsigned int resolution;
 231
 232         /* parent clock name(MPLL, EPLL or VPLL) */
 233         unsigned int pclk_name;
 234         /* ratio value for source clock from parent clock. */
 235         unsigned int sclk_div;
 236
 237         unsigned int dual_lcd_enabled;
 238 } vidinfo_t;
 239
 240 void init_panel_info(vidinfo_t *vid);
 241
 242 #else
 243
 244 typedef struct vidinfo {
 245         ushort  vl_col;         /* Number of columns (i.e. 160) */
 246         ushort  vl_row;         /* Number of rows (i.e. 100) */
 247
 248         u_char  vl_bpix;        /* Bits per pixel, 0 = 1 */
 249
 250         ushort  *cmap;          /* Pointer to the colormap */
 251
 252         void    *priv;          /* Pointer to driver-specific data */
 253 } vidinfo_t;
 254
 255 #endif /* CONFIG_MPC823, CONFIG_CPU_PXA25X, CONFIG_MCC200, CONFIG_ATMEL_LCD */
 256
 257 extern vidinfo_t panel_info;
 258
 259 /* Video functions */
 260
 261 #if defined(CONFIG_RBC823)
 262 void    lcd_disable(void);
 263 #endif
 264
 265 void    lcd_putc(const char c);
 266 void    lcd_puts(const char *s);
 267 void    lcd_printf(const char *fmt, ...);
 268 void    lcd_clear(void);
 269 int     lcd_display_bitmap(ulong bmp_image, int x, int y);
 270
 271 /**
 272  * Get the width of the LCD in pixels
 273  *
 274  * @return width of LCD in pixels
 275  */
 276 int lcd_get_pixel_width(void);
 277
 278 /**
 279  * Get the height of the LCD in pixels
 280  *
 281  * @return height of LCD in pixels
 282  */
 283 int lcd_get_pixel_height(void);
 284
 285 /**
 286  * Get the number of text lines/rows on the LCD
 287  *
 288  * @return number of rows
 289  */
 290 int lcd_get_screen_rows(void);
 291
 292 /**
 293  * Get the number of text columns on the LCD
 294  *
 295  * @return number of columns
 296  */
 297 int lcd_get_screen_columns(void);
 298
 299 /**
 300  * Set the position of the text cursor
 301  *
 302  * @param col   Column to place cursor (0 = left side)
 303  * @param row   Row to place cursor (0 = top line)
 304  */
 305 void lcd_position_cursor(unsigned col, unsigned row);
 306
 307 /* Allow boards to customize the information displayed */
 308 void lcd_show_board_info(void);
 309
 310 /* Return the size of the LCD frame buffer, and the line length */
 311 int lcd_get_size(int *line_length);
 312
 313 int lcd_dt_simplefb_add_node(void *blob);
 314 int lcd_dt_simplefb_enable_existing_node(void *blob);
 315
 316 /* Update the LCD / flush the cache */
 317 void lcd_sync(void);
 318
 319 /************************************************************************/
 320 /* ** BITMAP DISPLAY SUPPORT                                            */
 321 /************************************************************************/
 322 #if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
 323 # include <bmp_layout.h>
 324 # include <asm/byteorder.h>
 325 #endif
 326
 327 /*
 328  *  Information about displays we are using. This is for configuring
 329  *  the LCD controller and memory allocation. Someone has to know what
 330  *  is connected, as we can't autodetect anything.
 331  */
 332 #define CONFIG_SYS_HIGH 0       /* Pins are active high                 */
 333 #define CONFIG_SYS_LOW  1       /* Pins are active low                  */
 334
 335 #define LCD_MONOCHROME  0
 336 #define LCD_COLOR2      1
 337 #define LCD_COLOR4      2
 338 #define LCD_COLOR8      3
 339 #define LCD_COLOR16     4
 340
 341 /*----------------------------------------------------------------------*/
 342 #if defined(CONFIG_LCD_INFO_BELOW_LOGO)
 343 # define LCD_INFO_X             0
 344 # define LCD_INFO_Y             (BMP_LOGO_HEIGHT + VIDEO_FONT_HEIGHT)
 345 #elif defined(CONFIG_LCD_LOGO)
 346 # define LCD_INFO_X             (BMP_LOGO_WIDTH + 4 * VIDEO_FONT_WIDTH)
 347 # define LCD_INFO_Y             VIDEO_FONT_HEIGHT
 348 #else
 349 # define LCD_INFO_X             VIDEO_FONT_WIDTH
 350 # define LCD_INFO_Y             VIDEO_FONT_HEIGHT
 351 #endif
 352
 353 /* Default to 8bpp if bit depth not specified */
 354 #ifndef LCD_BPP
 355 # define LCD_BPP                        LCD_COLOR8
 356 #endif
 357 #ifndef LCD_DF
 358 # define LCD_DF                 1
 359 #endif
 360
 361 /* Calculate nr. of bits per pixel  and nr. of colors */
 362 #define NBITS(bit_code)         (1 << (bit_code))
 363 #define NCOLORS(bit_code)       (1 << NBITS(bit_code))
 364
 365 /************************************************************************/
 366 /* ** CONSOLE CONSTANTS                                                 */
 367 /************************************************************************/
 368 #if LCD_BPP == LCD_MONOCHROME
 369
 370 /*
 371  * Simple black/white definitions
 372  */
 373 # define CONSOLE_COLOR_BLACK    0
 374 # define CONSOLE_COLOR_WHITE    1       /* Must remain last / highest   */
 375
 376 #elif LCD_BPP == LCD_COLOR8
 377
 378 /*
 379  * 8bpp color definitions
 380  */
 381 # define CONSOLE_COLOR_BLACK    0
 382 # define CONSOLE_COLOR_RED      1
 383 # define CONSOLE_COLOR_GREEN    2
 384 # define CONSOLE_COLOR_YELLOW   3
 385 # define CONSOLE_COLOR_BLUE     4
 386 # define CONSOLE_COLOR_MAGENTA  5
 387 # define CONSOLE_COLOR_CYAN     6
 388 # define CONSOLE_COLOR_GREY     14
 389 # define CONSOLE_COLOR_WHITE    15      /* Must remain last / highest   */
 390
 391 #else
 392
 393 /*
 394  * 16bpp color definitions
 395  */
 396 # define CONSOLE_COLOR_BLACK    0x0000
 397 # define CONSOLE_COLOR_WHITE    0xffff  /* Must remain last / highest   */
 398
 399 #endif /* color definitions */
 400
 401 /************************************************************************/
 402 #ifndef PAGE_SIZE
 403 # define PAGE_SIZE      4096
 404 #endif
 405
 406 /************************************************************************/
 407
 408 #endif  /* _LCD_H_ */