include/lcd.h

   1 /*
   2  * MPC823 and PXA LCD Controller
   3  *
   4  * Modeled after video interface by Paolo Scaffardi
   5  *
   6  *
   7  * (C) Copyright 2001
   8  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   9  *
  10  * SPDX-License-Identifier:     GPL-2.0+
  11  */
  12
  13 #ifndef _LCD_H_
  14 #define _LCD_H_
  15
  16 extern char lcd_is_enabled;
  17
  18 extern int lcd_line_length;
  19
  20 extern struct vidinfo panel_info;
  21
  22 void lcd_ctrl_init(void *lcdbase);
  23 void lcd_enable(void);
  24
  25 /* setcolreg used in 8bpp/16bpp; initcolregs used in monochrome */
  26 void lcd_setcolreg(ushort regno, ushort red, ushort green, ushort blue);
  27 void lcd_initcolregs(void);
  28
  29 int lcd_getfgcolor(void);
  30
  31 /* gunzip_bmp used if CONFIG_VIDEO_BMP_GZIP */
  32 struct bmp_image *gunzip_bmp(unsigned long addr, unsigned long *lenp,
  33                              void **alloc_addr);
  34 int bmp_display(ulong addr, int x, int y);
  35
  36 /**
  37  * Set whether we need to flush the dcache when changing the LCD image. This
  38  * defaults to off.
  39  *
  40  * @param flush         non-zero to flush cache after update, 0 to skip
  41  */
  42 void lcd_set_flush_dcache(int flush);
  43
  44 #if defined CONFIG_MPC823
  45 /*
  46  * LCD controller stucture for MPC823 CPU
  47  */
  48 typedef struct vidinfo {
  49         ushort  vl_col;         /* Number of columns (i.e. 640) */
  50         ushort  vl_row;         /* Number of rows (i.e. 480) */
  51         ushort  vl_width;       /* Width of display area in millimeters */
  52         ushort  vl_height;      /* Height of display area in millimeters */
  53
  54         /* LCD configuration register */
  55         u_char  vl_clkp;        /* Clock polarity */
  56         u_char  vl_oep;         /* Output Enable polarity */
  57         u_char  vl_hsp;         /* Horizontal Sync polarity */
  58         u_char  vl_vsp;         /* Vertical Sync polarity */
  59         u_char  vl_dp;          /* Data polarity */
  60         u_char  vl_bpix;        /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8 */
  61         u_char  vl_lbw;         /* LCD Bus width, 0 = 4, 1 = 8 */
  62         u_char  vl_splt;        /* Split display, 0 = single-scan, 1 = dual-scan */
  63         u_char  vl_clor;        /* Color, 0 = mono, 1 = color */
  64         u_char  vl_tft;         /* 0 = passive, 1 = TFT */
  65
  66         /* Horizontal control register. Timing from data sheet */
  67         ushort  vl_wbl;         /* Wait between lines */
  68
  69         /* Vertical control register */
  70         u_char  vl_vpw;         /* Vertical sync pulse width */
  71         u_char  vl_lcdac;       /* LCD AC timing */
  72         u_char  vl_wbf;         /* Wait between frames */
  73 } vidinfo_t;
  74
  75 #elif defined(CONFIG_CPU_PXA25X) || defined(CONFIG_CPU_PXA27X) || \
  76         defined CONFIG_CPU_MONAHANS
  77 /*
  78  * PXA LCD DMA descriptor
  79  */
  80 struct pxafb_dma_descriptor {
  81         u_long  fdadr;          /* Frame descriptor address register */
  82         u_long  fsadr;          /* Frame source address register */
  83         u_long  fidr;           /* Frame ID register */
  84         u_long  ldcmd;          /* Command register */
  85 };
  86
  87 /*
  88  * PXA LCD info
  89  */
  90 struct pxafb_info {
  91
  92         /* Misc registers */
  93         u_long  reg_lccr3;
  94         u_long  reg_lccr2;
  95         u_long  reg_lccr1;
  96         u_long  reg_lccr0;
  97         u_long  fdadr0;
  98         u_long  fdadr1;
  99
 100         /* DMA descriptors */
 101         struct  pxafb_dma_descriptor *  dmadesc_fblow;
 102         struct  pxafb_dma_descriptor *  dmadesc_fbhigh;
 103         struct  pxafb_dma_descriptor *  dmadesc_palette;
 104
 105         u_long  screen;         /* physical address of frame buffer */
 106         u_long  palette;        /* physical address of palette memory */
 107         u_int   palette_size;
 108 };
 109
 110 /*
 111  * LCD controller stucture for PXA CPU
 112  */
 113 typedef struct vidinfo {
 114         ushort  vl_col;         /* Number of columns (i.e. 640) */
 115         ushort  vl_row;         /* Number of rows (i.e. 480) */
 116         ushort  vl_width;       /* Width of display area in millimeters */
 117         ushort  vl_height;      /* Height of display area in millimeters */
 118
 119         /* LCD configuration register */
 120         u_char  vl_clkp;        /* Clock polarity */
 121         u_char  vl_oep;         /* Output Enable polarity */
 122         u_char  vl_hsp;         /* Horizontal Sync polarity */
 123         u_char  vl_vsp;         /* Vertical Sync polarity */
 124         u_char  vl_dp;          /* Data polarity */
 125         u_char  vl_bpix;        /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
 126         u_char  vl_lbw;         /* LCD Bus width, 0 = 4, 1 = 8 */
 127         u_char  vl_splt;        /* Split display, 0 = single-scan, 1 = dual-scan */
 128         u_char  vl_clor;        /* Color, 0 = mono, 1 = color */
 129         u_char  vl_tft;         /* 0 = passive, 1 = TFT */
 130
 131         /* Horizontal control register. Timing from data sheet */
 132         ushort  vl_hpw;         /* Horz sync pulse width */
 133         u_char  vl_blw;         /* Wait before of line */
 134         u_char  vl_elw;         /* Wait end of line */
 135
 136         /* Vertical control register. */
 137         u_char  vl_vpw;         /* Vertical sync pulse width */
 138         u_char  vl_bfw;         /* Wait before of frame */
 139         u_char  vl_efw;         /* Wait end of frame */
 140
 141         /* PXA LCD controller params */
 142         struct  pxafb_info pxa;
 143 } vidinfo_t;
 144
 145 #elif defined(CONFIG_ATMEL_LCD) || defined(CONFIG_ATMEL_HLCD)
 146
 147 typedef struct vidinfo {
 148         ushort vl_col;          /* Number of columns (i.e. 640) */
 149         ushort vl_row;          /* Number of rows (i.e. 480) */
 150         u_long vl_clk;  /* pixel clock in ps    */
 151
 152         /* LCD configuration register */
 153         u_long vl_sync;         /* Horizontal / vertical sync */
 154         u_long vl_bpix;         /* Bits per pixel, 0 = 1, 1 = 2, 2 = 4, 3 = 8, 4 = 16 */
 155         u_long vl_tft;          /* 0 = passive, 1 = TFT */
 156         u_long vl_cont_pol_low; /* contrast polarity is low */
 157         u_long vl_clk_pol;      /* clock polarity */
 158
 159         /* Horizontal control register. */
 160         u_long vl_hsync_len;    /* Length of horizontal sync */
 161         u_long vl_left_margin;  /* Time from sync to picture */
 162         u_long vl_right_margin; /* Time from picture to sync */
 163
 164         /* Vertical control register. */
 165         u_long vl_vsync_len;    /* Length of vertical sync */
 166         u_long vl_upper_margin; /* Time from sync to picture */
 167         u_long vl_lower_margin; /* Time from picture to sync */
 168
 169         u_long  mmio;           /* Memory mapped registers */
 170 } vidinfo_t;
 171
 172 #elif defined(CONFIG_EXYNOS_FB)
 173
 174 enum {
 175         FIMD_RGB_INTERFACE = 1,
 176         FIMD_CPU_INTERFACE = 2,
 177 };
 178
 179 enum exynos_fb_rgb_mode_t {
 180         MODE_RGB_P = 0,
 181         MODE_BGR_P = 1,
 182         MODE_RGB_S = 2,
 183         MODE_BGR_S = 3,
 184 };
 185
 186 typedef struct vidinfo {
 187         ushort vl_col;          /* Number of columns (i.e. 640) */
 188         ushort vl_row;          /* Number of rows (i.e. 480) */
 189         ushort vl_width;        /* Width of display area in millimeters */
 190         ushort vl_height;       /* Height of display area in millimeters */
 191
 192         /* LCD configuration register */
 193         u_char vl_freq;         /* Frequency */
 194         u_char vl_clkp;         /* Clock polarity */
 195         u_char vl_oep;          /* Output Enable polarity */
 196         u_char vl_hsp;          /* Horizontal Sync polarity */
 197         u_char vl_vsp;          /* Vertical Sync polarity */
 198         u_char vl_dp;           /* Data polarity */
 199         u_char vl_bpix;         /* Bits per pixel */
 200
 201         /* Horizontal control register. Timing from data sheet */
 202         u_char vl_hspw;         /* Horz sync pulse width */
 203         u_char vl_hfpd;         /* Wait before of line */
 204         u_char vl_hbpd;         /* Wait end of line */
 205
 206         /* Vertical control register. */
 207         u_char  vl_vspw;        /* Vertical sync pulse width */
 208         u_char  vl_vfpd;        /* Wait before of frame */
 209         u_char  vl_vbpd;        /* Wait end of frame */
 210         u_char  vl_cmd_allow_len; /* Wait end of frame */
 211
 212         unsigned int win_id;
 213         unsigned int init_delay;
 214         unsigned int power_on_delay;
 215         unsigned int reset_delay;
 216         unsigned int interface_mode;
 217         unsigned int mipi_enabled;
 218         unsigned int dp_enabled;
 219         unsigned int cs_setup;
 220         unsigned int wr_setup;
 221         unsigned int wr_act;
 222         unsigned int wr_hold;
 223         unsigned int logo_on;
 224         unsigned int logo_width;
 225         unsigned int logo_height;
 226         unsigned long logo_addr;
 227         unsigned int rgb_mode;
 228         unsigned int resolution;
 229
 230         /* parent clock name(MPLL, EPLL or VPLL) */
 231         unsigned int pclk_name;
 232         /* ratio value for source clock from parent clock. */
 233         unsigned int sclk_div;
 234
 235         unsigned int dual_lcd_enabled;
 236 } vidinfo_t;
 237
 238 void init_panel_info(vidinfo_t *vid);
 239
 240 #else
 241
 242 typedef struct vidinfo {
 243         ushort  vl_col;         /* Number of columns (i.e. 160) */
 244         ushort  vl_row;         /* Number of rows (i.e. 100) */
 245
 246         u_char  vl_bpix;        /* Bits per pixel, 0 = 1 */
 247
 248         ushort  *cmap;          /* Pointer to the colormap */
 249
 250         void    *priv;          /* Pointer to driver-specific data */
 251 } vidinfo_t;
 252
 253 #endif /* CONFIG_MPC823, CONFIG_CPU_PXA25X, CONFIG_MCC200, CONFIG_ATMEL_LCD */
 254
 255 extern vidinfo_t panel_info;
 256
 257 /* Video functions */
 258
 259 #if defined(CONFIG_RBC823)
 260 void    lcd_disable(void);
 261 #endif
 262
 263 void    lcd_putc(const char c);
 264 void    lcd_puts(const char *s);
 265 void    lcd_printf(const char *fmt, ...);
 266 void    lcd_clear(void);
 267 int     lcd_display_bitmap(ulong bmp_image, int x, int y);
 268
 269 /**
 270  * Get the width of the LCD in pixels
 271  *
 272  * @return width of LCD in pixels
 273  */
 274 int lcd_get_pixel_width(void);
 275
 276 /**
 277  * Get the height of the LCD in pixels
 278  *
 279  * @return height of LCD in pixels
 280  */
 281 int lcd_get_pixel_height(void);
 282
 283 /**
 284  * Get the number of text lines/rows on the LCD
 285  *
 286  * @return number of rows
 287  */
 288 int lcd_get_screen_rows(void);
 289
 290 /**
 291  * Get the number of text columns on the LCD
 292  *
 293  * @return number of columns
 294  */
 295 int lcd_get_screen_columns(void);
 296
 297 /**
 298  * Set the position of the text cursor
 299  *
 300  * @param col   Column to place cursor (0 = left side)
 301  * @param row   Row to place cursor (0 = top line)
 302  */
 303 void lcd_position_cursor(unsigned col, unsigned row);
 304
 305 /* Allow boards to customize the information displayed */
 306 void lcd_show_board_info(void);
 307
 308 /* Return the size of the LCD frame buffer, and the line length */
 309 int lcd_get_size(int *line_length);
 310
 311 int lcd_dt_simplefb_add_node(void *blob);
 312 int lcd_dt_simplefb_enable_existing_node(void *blob);
 313
 314 /************************************************************************/
 315 /* ** BITMAP DISPLAY SUPPORT                                            */
 316 /************************************************************************/
 317 #if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
 318 # include <bmp_layout.h>
 319 # include <asm/byteorder.h>
 320 #endif
 321
 322 /*
 323  *  Information about displays we are using. This is for configuring
 324  *  the LCD controller and memory allocation. Someone has to know what
 325  *  is connected, as we can't autodetect anything.
 326  */
 327 #define CONFIG_SYS_HIGH 0       /* Pins are active high                 */
 328 #define CONFIG_SYS_LOW  1       /* Pins are active low                  */
 329
 330 #define LCD_MONOCHROME  0
 331 #define LCD_COLOR2      1
 332 #define LCD_COLOR4      2
 333 #define LCD_COLOR8      3
 334 #define LCD_COLOR16     4
 335
 336 /*----------------------------------------------------------------------*/
 337 #if defined(CONFIG_LCD_INFO_BELOW_LOGO)
 338 # define LCD_INFO_X             0
 339 # define LCD_INFO_Y             (BMP_LOGO_HEIGHT + VIDEO_FONT_HEIGHT)
 340 #elif defined(CONFIG_LCD_LOGO)
 341 # define LCD_INFO_X             (BMP_LOGO_WIDTH + 4 * VIDEO_FONT_WIDTH)
 342 # define LCD_INFO_Y             VIDEO_FONT_HEIGHT
 343 #else
 344 # define LCD_INFO_X             VIDEO_FONT_WIDTH
 345 # define LCD_INFO_Y             VIDEO_FONT_HEIGHT
 346 #endif
 347
 348 /* Default to 8bpp if bit depth not specified */
 349 #ifndef LCD_BPP
 350 # define LCD_BPP                        LCD_COLOR8
 351 #endif
 352 #ifndef LCD_DF
 353 # define LCD_DF                 1
 354 #endif
 355
 356 /* Calculate nr. of bits per pixel  and nr. of colors */
 357 #define NBITS(bit_code)         (1 << (bit_code))
 358 #define NCOLORS(bit_code)       (1 << NBITS(bit_code))
 359
 360 /************************************************************************/
 361 /* ** CONSOLE CONSTANTS                                                 */
 362 /************************************************************************/
 363 #if LCD_BPP == LCD_MONOCHROME
 364
 365 /*
 366  * Simple black/white definitions
 367  */
 368 # define CONSOLE_COLOR_BLACK    0
 369 # define CONSOLE_COLOR_WHITE    1       /* Must remain last / highest   */
 370
 371 #elif LCD_BPP == LCD_COLOR8
 372
 373 /*
 374  * 8bpp color definitions
 375  */
 376 # define CONSOLE_COLOR_BLACK    0
 377 # define CONSOLE_COLOR_RED      1
 378 # define CONSOLE_COLOR_GREEN    2
 379 # define CONSOLE_COLOR_YELLOW   3
 380 # define CONSOLE_COLOR_BLUE     4
 381 # define CONSOLE_COLOR_MAGENTA  5
 382 # define CONSOLE_COLOR_CYAN     6
 383 # define CONSOLE_COLOR_GREY     14
 384 # define CONSOLE_COLOR_WHITE    15      /* Must remain last / highest   */
 385
 386 #else
 387
 388 /*
 389  * 16bpp color definitions
 390  */
 391 # define CONSOLE_COLOR_BLACK    0x0000
 392 # define CONSOLE_COLOR_WHITE    0xffff  /* Must remain last / highest   */
 393
 394 #endif /* color definitions */
 395
 396 /************************************************************************/
 397 #ifndef PAGE_SIZE
 398 # define PAGE_SIZE      4096
 399 #endif
 400
 401 /************************************************************************/
 402
 403 #endif  /* _LCD_H_ */