include/linux/mtd/fsmc_nand.h

   1 /*
   2  * (C) Copyright 2010
   3  * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #ifndef __FSMC_NAND_H__
  25 #define __FSMC_NAND_H__
  26
  27 #include <linux/mtd/nand.h>
  28
  29 struct fsmc_regs {
  30         u32 ctrl;                       /* 0x00 */
  31         u8 reserved_1[0x40 - 0x04];
  32         u32 pc;                         /* 0x40 */
  33         u32 sts;                        /* 0x44 */
  34         u32 comm;                       /* 0x48 */
  35         u32 attrib;                     /* 0x4c */
  36         u32 ioata;                      /* 0x50 */
  37         u32 ecc1;                       /* 0x54 */
  38         u32 ecc2;                       /* 0x58 */
  39         u32 ecc3;                       /* 0x5c */
  40         u8 reserved_2[0xfe0 - 0x60];
  41         u32 peripid0;                   /* 0xfe0 */
  42         u32 peripid1;                   /* 0xfe4 */
  43         u32 peripid2;                   /* 0xfe8 */
  44         u32 peripid3;                   /* 0xfec */
  45         u32 pcellid0;                   /* 0xff0 */
  46         u32 pcellid1;                   /* 0xff4 */
  47         u32 pcellid2;                   /* 0xff8 */
  48         u32 pcellid3;                   /* 0xffc */
  49 };
  50
  51 /* ctrl register definitions */
  52 #define FSMC_WP                 (1 << 7)
  53
  54 /* pc register definitions */
  55 #define FSMC_RESET              (1 << 0)
  56 #define FSMC_WAITON             (1 << 1)
  57 #define FSMC_ENABLE             (1 << 2)
  58 #define FSMC_DEVTYPE_NAND       (1 << 3)
  59 #define FSMC_DEVWID_8           (0 << 4)
  60 #define FSMC_DEVWID_16          (1 << 4)
  61 #define FSMC_ECCEN              (1 << 6)
  62 #define FSMC_ECCPLEN_512        (0 << 7)
  63 #define FSMC_ECCPLEN_256        (1 << 7)
  64 #define FSMC_TCLR_1             (1 << 9)
  65 #define FSMC_TAR_1              (1 << 13)
  66
  67 /* sts register definitions */
  68 #define FSMC_CODE_RDY           (1 << 15)
  69
  70 /* comm register definitions */
  71 #define FSMC_TSET_0             (0 << 0)
  72 #define FSMC_TWAIT_6            (6 << 8)
  73 #define FSMC_THOLD_4            (4 << 16)
  74 #define FSMC_THIZ_1             (1 << 24)
  75
  76 /* peripid2 register definitions */
  77 #define FSMC_REVISION_MSK       (0xf)
  78 #define FSMC_REVISION_SHFT      (0x4)
  79
  80 #define FSMC_VER8               0x8
  81
  82 /*
  83  * There are 13 bytes of ecc for every 512 byte block and it has to be read
  84  * consecutively and immediately after the 512 byte data block for hardware to
  85  * generate the error bit offsets
  86  * Managing the ecc bytes in the following way is easier. This way is similar to
  87  * oobfree structure maintained already in u-boot nand driver
  88  */
  89 #define FSMC_MAX_ECCPLACE_ENTRIES       32
  90
  91 struct fsmc_nand_eccplace {
  92         u32 offset;
  93         u32 length;
  94 };
  95
  96 struct fsmc_eccplace {
  97         struct fsmc_nand_eccplace eccplace[FSMC_MAX_ECCPLACE_ENTRIES];
  98 };
  99
 100 extern int fsmc_nand_init(struct nand_chip *nand);
 101 #endif